2 Commits

Author	SHA1	Message	Date
Oliver Stannard	db9081bf89	[AArch64] ldr= pseudo-instruction silently ignored if register invalid ... The AArch64 assembler was silently ignoring instructions like this: ldr foo, =bar AArch64AsmParser::parseOperand was returning true as the parse failed, but was not calling AArch64AsmParser::Error to report this to the user, so the instruction was ignored without printing an error message. Differential Revision: http://reviews.llvm.org/D14651 llvm-svn: 253193	2015-11-16 10:25:19 +00:00
David Peixotto	ae5ba76221	MC: support different sized constants in constant pools ... On AArch64 the pseudo instruction ldr <reg>, =... supports both 32-bit and 64-bit constants. Add support for 64 bit constants for the pools to support the pseudo instruction fully. Changes the AArch64 ldr-pseudo tests to use 32-bit registers and adds tests with 64-bit registers. Patch by Janne Grunau! Differential Revision: http://reviews.llvm.org/D4279 llvm-svn: 213387	2014-07-18 16:05:14 +00:00