Commit Graph

3893 Commits

Author SHA1 Message Date
Adrian Prantl fac32f3f6a Explicitly pass an isysroot to avoid the SDKROOT overriding the deployment target.
This fixes the green dragon builders after r284416.

llvm-svn: 284423
2016-10-17 20:37:56 +00:00
Davide Italiano 877428dee1 [Coverage] Update test after r284418.
We now strip coverage metadata if debug info are not present.

llvm-svn: 284419
2016-10-17 20:06:32 +00:00
Adrian Prantl 119a998ae3 Update testcase for r284416.
llvm-svn: 284417
2016-10-17 19:46:26 +00:00
Arnold Schwaighofer b715eb4504 Add more swift calling convention tests
llvm-svn: 284285
2016-10-14 21:55:56 +00:00
Douglas Katzman 3ed0f643fc Implement no_sanitize_address for global vars
llvm-svn: 284272
2016-10-14 19:55:09 +00:00
Albert Gutowski 1deab38717 Implement __stosb intrinsic as a volatile memset
Summary: We need `__stosb` to be an intrinsic, because SecureZeroMemory function uses it without including intrin.h. Implementing it as a volatile memset is not consistent with MSDN specification, but it gives us target-independent IR while keeping the most important properties of `__stosb`.

Reviewers: rnk, hans, thakis, majnemer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25334

llvm-svn: 284253
2016-10-14 17:33:05 +00:00
Michael Zuckerman 387530ffe3 [x86][ms-inline-asm] use of "jmp short" in asm is not supported
Test linked to: https://reviews.llvm.org/D24957

Committing in the name of Ziv Izhar: After check-all and LGTM .

Differential Revision: https://reviews.llvm.org/D24958

llvm-svn: 284213
2016-10-14 08:13:27 +00:00
Arnold Schwaighofer 18fad46fe3 Disable swiftcall test on windows: More brutal way to appease windows bots
The backtrace on the bot does not give me any indication what is wrong.
The test case interestingly passes in stage2 of the build.
I don't have a way of debugging this.

Disable the test on windows and hope if there is truly a bug in the code that
was causing we will eventually run into this on other platforms.

llvm-svn: 284174
2016-10-13 22:47:03 +00:00
Albert Gutowski 5e08df0266 Add 64-bit MS _Interlocked functions as builtins again
Summary: Previously global 64-bit versions of _Interlocked functions broke buildbots on i386, so now I'm adding them as builtins for x86-64 and ARM only (should they be also on AArch64? I had problems with testing it for AArch64, so I left it)

Reviewers: hans, majnemer, mstorsjo, rnk

Subscribers: cfe-commits, aemerson

Differential Revision: https://reviews.llvm.org/D25576

llvm-svn: 284172
2016-10-13 22:35:07 +00:00
Arnold Schwaighofer c45025e763 Add required targets to tests to (hopefully) appease bots
llvm-svn: 284162
2016-10-13 20:59:23 +00:00
Arnold Schwaighofer 3d01ad116c Swift Calling Convention: Fix out of bounds access
Use iterator instead of address of element in vector

It is not valid to access one after the last element.

rdar://28759508

llvm-svn: 284150
2016-10-13 19:19:37 +00:00
Arnold Schwaighofer 2d556f2d06 Add more 64bit swiftcall convention tests
llvm-svn: 284133
2016-10-13 17:17:36 +00:00
Albert Gutowski 397d81bb9a Implement MS _ReturnAddress and _AddressOfReturnAddress intrinsics
Reviewers: rnk, thakis, majnemer, hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25540

llvm-svn: 284131
2016-10-13 16:03:42 +00:00
Albert Gutowski 1255c19656 fix ms-intrinsics labels code to work with builds with assertions
llvm-svn: 284083
2016-10-12 23:52:38 +00:00
Albert Gutowski 85d54d6bcb fix regexes for label names in ms-intrinsics test
llvm-svn: 284062
2016-10-12 22:22:34 +00:00
Albert Gutowski 2a0621e58a Implement MS _BitScan intrinsics
Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin.

Reviewers: hans, thakis, rnk, majnemer

Subscribers: RKSimon, cfe-commits, aemerson

Differential Revision: https://reviews.llvm.org/D25264

llvm-svn: 284060
2016-10-12 22:01:05 +00:00
Arnold Schwaighofer b574b07564 Remove basic block label in test case
Another attempt to make a bot happy

llvm-svn: 284055
2016-10-12 21:36:15 +00:00
Arnold Schwaighofer bcb927a2ad Specify a target cpu in test case
Hopefully, this makes the bots happy

llvm-svn: 284048
2016-10-12 20:30:24 +00:00
Arnold Schwaighofer 4fc955e669 Declare WinX86_64ABIInfo to satisfy SwiftABI info
This is minimal support that allows swift's test cases on non windows platforms
to pass.

rdar://28738985

llvm-svn: 284032
2016-10-12 18:59:24 +00:00
Albert Gutowski 0fd6e9608e Move x86-64 builtins from SemaChecking.cpp to BuiltinsX86_64.def
Summary: Follow-up to https://reviews.llvm.org/D24598 (separating builtins for x84-64 and i386).

Reviewers: hans, thakis, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25494

llvm-svn: 284026
2016-10-12 17:28:44 +00:00
Hal Finkel 8f96e82cb8 Add an option to save the backend-produced YAML optimization record to a file
The backend now has the capability to save information from optimizations, the
same information that can be used to generate optimization diagnostics but in
machine-consumable form, into an output file. This can be enabled when using
opt (see r282539), and this change enables it when using clang. The idea is
that other tools will be able to consume these files, and perhaps in
combination with the original source code, produce various kinds of
optimization reports for users (and for compiler developers).

We now have at-least two tools that can consume these files:
  * tools/llvm-opt-report
  * utils/opt-viewer

Using the flag -fsave-optimization-record will cause the YAML file to be
generated; the file name will be based on the output file name (if we're using
-c or -S and have an output name), or the input file name. When we're using
CUDA, or some other offloading mechanism, separate files are generated for each
backend target. The output file name can be specified by the user using
-foptimization-record-file=filename.

Differential Revision: https://reviews.llvm.org/D25225

llvm-svn: 283834
2016-10-11 00:26:09 +00:00
Albert Gutowski fcea61c563 Implement MS read/write barriers and __faststorefence intrinsic
Reviewers: hans, rnk, majnemer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25442

llvm-svn: 283793
2016-10-10 19:40:51 +00:00
Albert Gutowski 7216f17653 Implement __emul, __emulu, _mul128 and _umul128 MS intrinsics
Reviewers: rnk, thakis, majnemer, hans

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25353

llvm-svn: 283785
2016-10-10 18:09:27 +00:00
Daniel Jasper 1eb779b5ae Revert "[x86][inline-asm][clang] accept 'v' constraint"
This reverts commit r283716.

Breaks buildbot:
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/9155/testReport/junit/Clang/CodeGen/x86_inline_asm_v_constraint_c/

llvm-svn: 283743
2016-10-10 11:40:28 +00:00
Michael Zuckerman fe2b9b4fbf [x86][inline-asm][clang] accept 'v' constraint
Commit in the name of: Coby Tayree 

1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)

This patch applies the needed changes to clang
 LLVM patch: https://reviews.llvm.org/D25005

Differential Revision: D25004 

llvm-svn: 283716
2016-10-10 05:45:54 +00:00
Nemanja Ivanovic 06d550b85a Removing optimization from the RUN lines and adjusting the checks
to not rely on optimization.

llvm-svn: 283363
2016-10-05 19:11:36 +00:00
Michael Zuckerman 9e43ccfe68 [Clang][AVX512][BuiltIn]Adding missing intrinsics move_{sd|ss} to clang
Differential Revision: http://reviews.llvm.org/D21021

llvm-svn: 283314
2016-10-05 12:56:06 +00:00
Albert Gutowski f3a0bce155 Separate builtins for x84-64 and i386; implement __mulh and __umulh
Summary: We need x86-64-specific builtins if we want to implement some of the MS intrinsics - winnt.h contains definitions of some functions for i386, but not for x86-64 (for example _InterlockedOr64), which means that we cannot treat them as builtins for both i386 and x86-64, because then we have definitions of builtin functions in winnt.h on i386.

Reviewers: thakis, majnemer, hans, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24598

llvm-svn: 283264
2016-10-04 22:29:49 +00:00
Sanjay Patel 0bb72c1424 [clang] make reciprocal estimate codegen a function attribute
The motivation for the change is that we can't have pseudo-global settings
for codegen living in TargetOptions because that doesn't work with LTO.

Ideally, these reciprocal attributes will be moved to the instruction-level
via FMF, metadata, or something else. But making them function attributes is
at least an improvement over the current state.

I'm committing this patch ahead of the related LLVM patch to avoid bot failures,
but if that patch needs to be reverted, then this should be reverted too.

Differential Revision: https://reviews.llvm.org/D24815

llvm-svn: 283251
2016-10-04 20:44:05 +00:00
Craig Topper c4a8228bcc [AVX-512] Use native IR for masked 512-bit add/sub/mul/div ps/pd intrinsics when rounding mode isn't used.
llvm-svn: 283073
2016-10-02 17:43:00 +00:00
Hal Finkel 415c2a38f2 [PowerPC] Enable soft-float for PPC64, and +soft-float -> -hard-float
Enable soft-float support on PPC64, as the backend now supports it. Also, the
backend now uses -hard-float instead of +soft-float, so set the target features
accordingly.

Fixes PR26970.

llvm-svn: 283061
2016-10-02 02:10:45 +00:00
Craig Topper 4910755107 [AVX-512] Add _MM_FROUND_NO_EXC to test cases that pass a rounding mode intrinsics. This is preparation for a follow up commit that will check validity of rounding mode argument.
llvm-svn: 283053
2016-10-01 21:03:46 +00:00
Martin Storsjo ed95a08ea4 [MS] Implement __iso_volatile loads/stores as builtins
These are supposed to produce the same as normal volatile
pointer loads/stores. When -volatile:ms is specified,
normal volatile pointers are forced to have atomic semantics
(as is the default on x86 in MSVC mode). In that case,
these builtins should still produce non-atomic volatile
loads/stores without acquire/release semantics, which
the new test verifies.

These are only available on ARM (and on AArch64,
although clang doesn't support AArch64/Windows yet).

This implements what is missing for PR30394, making it possible
to compile C++ for ARM in MSVC mode with MSVC headers.

Differential Revision: https://reviews.llvm.org/D24986

llvm-svn: 282900
2016-09-30 19:13:46 +00:00
Artem Belevich fda9905062 [CUDA] added __nvvm_atom_{sys|cta}_* builtins.
These builtins are available on sm_60+ GPU only.

Differential Revision: https://reviews.llvm.org/D24944

llvm-svn: 282609
2016-09-28 17:47:35 +00:00
Elad Cohen b107a22afb [X86] Remove the mm_malloc.h include guard hack from the X86 builtins tests
The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include
guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted
environment since it expects stdlib.h to be available - which is not the case
in these internal clang codegen tests).
This patch removes this hack and instead passes -ffreestanding to clang cc1.

Differential Revision: https://reviews.llvm.org/D24825

llvm-svn: 282581
2016-09-28 11:59:09 +00:00
Ayman Musa 2e250e8845 [avx512] Add aliases to some missing avx512 intrinsics.
Differential Revision:https: //reviews.llvm.org/D24961

llvm-svn: 282488
2016-09-27 14:06:32 +00:00
Nemanja Ivanovic 10e2b5dcaa [Power9] Builtins for ELF v.2 ABI conformance - front end portion
This patch corresponds to review:
https://reviews.llvm.org/D24397

It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with
a number of altivec.h functions (refer to the code review for a list).

llvm-svn: 282481
2016-09-27 10:45:22 +00:00
Richard Smith 9e67b9922b P0145R3 (C++17 evaluation order tweaks): consistently emit the LHS of array
subscripting before the RHS, regardless of which is the base and which is the
index.

llvm-svn: 282453
2016-09-26 23:49:47 +00:00
Renato Golin fa007aeef4 Revert "set the underlying value of “#pragma STDC FP_CONTRACT” on by default"
This reverts commit r282259, as it broke the AArch64 test-suite bots.

llvm-svn: 282289
2016-09-23 20:32:52 +00:00
Sebastian Pop 6919ae5abc set the underlying value of “#pragma STDC FP_CONTRACT” on by default
Clang has the default FP contraction setting of “-ffp-contract=on”, which
doesn't really mean “on” in the conventional sense of the word, but rather
really means “according to the per-statement effective value of the relevant
pragma”.

Before this patch, Clang has that pragma defaulting to “off”. Since the
“-ffp-contract=on” mode is really an AND of two booleans and the second of them
defaults to “off”, the whole thing effectively defaults to “off”. This patch
changes the default value of the pragma to “on”, thus making the default pair of
booleans (on, on) rather than (on, off). This makes FP optimization slightly
more aggressive than before when not using either “-Ofast”, “-ffast-math”, or
“-ffp-contract=fast”. Even with this patch the compiler still respects
“-ffp-contract=off”.

As per a suggestion by Steve Canon, the added code does _not_ require “-O3” or
higher. This is so as to try our best to preserve identical floating-point
results for unchanged source code compiling for an unchanged target when only
changing from any optimization level in the set (“-O0”, “-O1”, “-O2”, “-O3”) to
any other optimization level in that set. “-Os” and “-Oz” seem to be behaving
identically, i.e. should probably be considered a part of the aforementioned
set, but I have not reviewed this rigorously. “-Ofast” is explicitly _not_ a
member of that set.

Patch authored by Abe Skolnik [a.skolnik@samsung.com] and Stephen Canon [scanon@apple.com].

Differential Revision: https://reviews.llvm.org/D24481

llvm-svn: 282259
2016-09-23 16:16:25 +00:00
Craig Topper 5fbabd77c7 [X86] Fix some illegal rounding modes in some builtin test cases to ones that would properly compile to valid assembly.
llvm-svn: 282137
2016-09-22 06:13:33 +00:00
Simon Dardis 3d9c763816 [mips] MSA intrinsics header file
This patch adds the msa.h header file containing the shorter names for the
MSA instrinsics, e.g. msa_sll_b for builtin_msa_sll_b.

Reviewers: vkalintiris, zoran.jovanovic

Differential Review: https://reviews.llvm.org/D24674

llvm-svn: 281975
2016-09-20 15:07:36 +00:00
Dehao Chen dd6f8cab08 Remove InstructionCombining and its related pass from sample pgo passes as we can handle "invoke" correctly.
Summary: We previously relies on InstructionCombining pass to remove invoke instructions. Now that we can inline invoke instructions correctly, we do not need these passes any more.

Reviewers: dnovillo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24730

llvm-svn: 281910
2016-09-19 16:02:52 +00:00
Dean Michael Berris eeee3b17f3 [XRay] ARM 32-bit no-Thumb support in Clang
Just a test for now, adapted from x86_64 tests of XRay.
This is one of 3 commits to different repositories of XRay ARM port. The other 2 are:

https://reviews.llvm.org/D23931 (LLVM)
https://reviews.llvm.org/D23933 (compiler-rt)

Differential Revision: https://reviews.llvm.org/D23932

llvm-svn: 281879
2016-09-19 00:59:19 +00:00
Peter Collingbourne 96dd3635bf Add REQUIRES line.
llvm-svn: 281796
2016-09-16 22:56:12 +00:00
Peter Collingbourne 0a3ede0a14 Add target triples to fix test on non-x86.
llvm-svn: 281790
2016-09-16 22:26:45 +00:00
Peter Collingbourne e1b7d2520d CodeGen: Add more checks to nobuiltin.c test, add a negative test.
llvm-svn: 281785
2016-09-16 22:05:53 +00:00
Akira Hatanaka 819867191f [Sema] Allow shifting a scalar operand by a vector operand.
r278501 inadvertently introduced a bug in which it disallowed shifting
scalar operands by vector operands when not compiling for OpenCL. This
commit fixes it.

Patch by Vladimir Yakovlev.

Differential Revision: https://reviews.llvm.org/D24467

llvm-svn: 281669
2016-09-15 22:19:25 +00:00
Wei Mi 6582669aa9 Update clang unittests for rL281586.
The change in rL281586 is in llvm component and tests updated here are
in clang component, so I have to commit them consecutively.

llvm-svn: 281587
2016-09-15 06:31:30 +00:00
Albert Gutowski 727ab8a803 Add some MS aliases for existing intrinsics
Reviewers: thakis, compnerd, majnemer, rsmith, rnk

Subscribers: alexshap, cfe-commits

Differential Revision: https://reviews.llvm.org/D24330

llvm-svn: 281540
2016-09-14 21:19:43 +00:00