Commit Graph

10400 Commits

Author SHA1 Message Date
Chris Lattner 031c5fec43 remove "asmcall", using print_pcrel_imm instead of printOperand.
llvm-svn: 75080
2009-07-09 00:39:19 +00:00
Chris Lattner f0c21619f8 simplify some logic
llvm-svn: 75079
2009-07-09 00:32:12 +00:00
Chris Lattner ade55bc8dd * add some assertions for sanity checking.
* remove some old code that was needed when we'd put ESP in the scale instead of 
  the base of some instructions.
* Fix a bug with the P modifier in inline asm that caused us to drop it.

llvm-svn: 75077
2009-07-09 00:27:29 +00:00
David Goodwin 22c2fba978 Use common code for both ARM and Thumb-2 instruction and register info.
llvm-svn: 75067
2009-07-08 23:10:31 +00:00
Chris Lattner 3c043404e0 * manually concatenate two string literals
* remove some dead code: darwin doesn't support dllimport linkage.

llvm-svn: 75066
2009-07-08 23:09:14 +00:00
Evan Cheng 5edd90cbbc - Add some NEON ld / st instruction static encoding.
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.

llvm-svn: 75065
2009-07-08 22:51:32 +00:00
Evan Cheng e3a53c448b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
llvm-svn: 75048
2009-07-08 21:03:57 +00:00
Bill Wendling 0c9f367d62 Recommit r74952 with a bug fix:
DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
       pushl   %ebp
Llabel1:
       movl    %esp, %ebp
Llabel2:
       pushl   %esi
Llabel3:
       subl    $20, %esp
       call    "L1$pb"
"L1$pb":
       popl    %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.

There is some ugliness where we generate code like this:


LBB22_0:	## entry
	pushl	%ebp
Llabel280:
	movl	%esp, %ebp
Llabel281:
Llabel284:
	pushl	%ebp  <----------
	pushl	%ebx
	pushl	%edi
	pushl	%esi
Llabel282:
	subl	$328, %esp

Notice the extra "pushl %ebp". If we generate a "machine move" instruction in
the FDE for that pushl, the linker may get very confused about what value %ebp
should have when exitting the function. I.e., it'll give it the value %esp
instead of the %ebp value from the first "pushl". Not to mention that, in this
case, %ebp isn't modified in the function (that's a separate bug). I put a small
hack in to get it to work. It might be the only solution, but should be
revisited once the above case is fixed.

llvm-svn: 75047
2009-07-08 21:02:53 +00:00
Torok Edwin f8d479c1ce Missed an exit during the conversion.
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.

llvm-svn: 75045
2009-07-08 20:55:50 +00:00
Torok Edwin fb8d6d5b58 Implement changes from Chris's feedback.
Finish converting lib/Target.

llvm-svn: 75043
2009-07-08 20:53:28 +00:00
Bob Wilson 1d298fd75b Implement NEON vst1 instruction.
llvm-svn: 75037
2009-07-08 20:32:02 +00:00
David Goodwin 03ab0bbb24 Generalize opcode selection in ARMBaseRegisterInfo.
llvm-svn: 75036
2009-07-08 20:28:28 +00:00
Xerxes Ranby b009980f0b Fix cmake build.
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt

llvm-svn: 75035
2009-07-08 20:13:41 +00:00
Torok Edwin fa04002254 Convert more abort() calls to llvm_report_error().
Also remove trailing semicolon.

llvm-svn: 75027
2009-07-08 19:04:27 +00:00
David Goodwin 9ca33e8a9f Push methods into base class in preparation for sharing.
llvm-svn: 75020
2009-07-08 18:31:39 +00:00
Bob Wilson f731a2df6b Implement NEON vld1 instructions.
llvm-svn: 75019
2009-07-08 18:11:30 +00:00
Torok Edwin 6dd2730024 Start converting to new error handling API.
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)

llvm-svn: 75018
2009-07-08 18:01:40 +00:00
David Goodwin eebf58805c Start breaking out common base functionality for register info.
llvm-svn: 75016
2009-07-08 17:28:55 +00:00
David Goodwin af7451b674 Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
llvm-svn: 75010
2009-07-08 16:09:28 +00:00
Sanjiv Gupta 16019aaa4f Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags.
llvm-svn: 74992
2009-07-08 05:40:05 +00:00
Nick Lewycky a21d3daadc Remove the vicmp and vfcmp instructions. Because we never had a release with
these instructions, no autoupgrade or backwards compatibility support is
provided.

llvm-svn: 74991
2009-07-08 03:04:38 +00:00
Evan Cheng 14965760a7 Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
llvm-svn: 74988
2009-07-08 01:46:35 +00:00
Evan Cheng b61e3a83ee Add a todo.
llvm-svn: 74976
2009-07-08 00:05:05 +00:00
Evan Cheng f0080b734a Also statically set bit 25 for BR_JT instructions.
llvm-svn: 74974
2009-07-07 23:45:10 +00:00
Evan Cheng 2cff076cfe Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
llvm-svn: 74972
2009-07-07 23:40:25 +00:00
Bill Wendling 69bf0a1e2a --- Reverse-merging (from foreign repository) r74952 into '.':
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86RegisterInfo.h

Temporarily revert. This was causing an infinite loop in the linker on Leopard.

llvm-svn: 74970
2009-07-07 23:37:49 +00:00
Dale Johannesen 9e5b64b7b7 Commit the file I actually changed as part of last
patch, instead of one I didn't.

llvm-svn: 74968
2009-07-07 23:28:22 +00:00
Bill Wendling 7a87a78c6c DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
        pushl   %ebp
Llabel1:
        movl    %esp, %ebp
Llabel2:
        pushl   %esi
Llabel3:
        subl    $20, %esp
        call    "L1$pb"
"L1$pb":
        popl    %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.

llvm-svn: 74952
2009-07-07 21:53:07 +00:00
Evan Cheng d0611f9a37 Add Thumb2 movcc instructions.
llvm-svn: 74946
2009-07-07 20:39:03 +00:00
Evan Cheng 02a44edf12 Add BX and BXr9 encodings. Patch by Sean Callanan.
llvm-svn: 74938
2009-07-07 19:16:24 +00:00
Owen Anderson 5c96ef7c4e Have scoped mutexes take referenes instead of pointers.
llvm-svn: 74931
2009-07-07 18:33:04 +00:00
Evan Cheng d0f6324cdc Add Thumb2 pkhbt / pkhtb.
llvm-svn: 74895
2009-07-07 05:35:52 +00:00
Evan Cheng b24e51e2d9 Add some more Thumb2 multiplication instructions.
llvm-svn: 74889
2009-07-07 01:17:28 +00:00
Evan Cheng 7c9434399d 80 col violation.
llvm-svn: 74888
2009-07-07 01:16:41 +00:00
Dale Johannesen 56a53d02e1 Don't accept globals as matching 'i' constraint
in PIC modes (in accordance with existing comment).
gcc.apple/asm-block-25.c

llvm-svn: 74886
2009-07-07 00:18:49 +00:00
Devang Patel 8e8028eac3 Avoid directly relying on llvm.dbg.compile_unit and llvm.dbg.global_variables.
PIC16 developers, please verify. Thanks.

llvm-svn: 74880
2009-07-06 23:28:36 +00:00
Devang Patel c4744b9e22 Add FIXMEs.
llvm-svn: 74879
2009-07-06 23:11:08 +00:00
Evan Cheng 3d8ccdb4be isThumb2 really should mean thumb2 only, not thumb2+.
llvm-svn: 74871
2009-07-06 22:29:14 +00:00
Evan Cheng 40398233b7 Add bfc to armv6t2.
llvm-svn: 74868
2009-07-06 22:23:46 +00:00
Evan Cheng e63b0e6f79 Added ARM::mls for armv6t2.
llvm-svn: 74866
2009-07-06 22:05:45 +00:00
Sanjiv Gupta 0a1e2787a0 pic16 doesn't have a Data64bitsDirective. Set it NULL explicitly to tell the generic code to not pick the default.
llvm-svn: 74839
2009-07-06 18:09:11 +00:00
Sanjiv Gupta cf5ea6c26f pic16 isn't ready to handle llvm.metadata yet.
llvm-svn: 74838
2009-07-06 18:07:06 +00:00
Sanjiv Gupta b89d3db1fd Implement _CONFIG macro to allow users to se to configuration settings on the part.
Implement _section macro to allow users to place objects in specific sections.
Implement _address macro to allow users to place objects at a particular address.
Placing objects at a memory address:
crate a unique section name from varname, address, object type and put that section at specified address. Mark this section a full (size = banksize) so that other objects do not compete for it while placing objects to sections in AsmPrinter.

llvm-svn: 74822
2009-07-06 10:18:37 +00:00
Sanjiv Gupta 5d569c563d Corrected the names description. Change in a comment. No functionality change.
llvm-svn: 74819
2009-07-06 08:22:15 +00:00
Bruno Cardoso Lopes 5661ea68e7 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
Duncan Sands cac07a4cb7 Silence a warning when assertions are turned off.
llvm-svn: 74779
2009-07-03 16:11:59 +00:00
Duncan Sands c3f89b3fbb Silence a warning when assertions are turned off.
llvm-svn: 74778
2009-07-03 16:11:34 +00:00
Duncan Sands 075276e9ce Silence warning when building without assertions.
llvm-svn: 74777
2009-07-03 16:06:07 +00:00
Duncan Sands 5a16986cfc Silence warnings when assertions are turned off.
llvm-svn: 74776
2009-07-03 16:03:33 +00:00
Sanjiv Gupta a587ffe12d For extended loads of type i1 to i8, we will need to at least one byte from memory.
The change in the .td file is to mark the side effects of mov insn.

llvm-svn: 74768
2009-07-03 07:58:59 +00:00