Commit Graph

354385 Commits

Author SHA1 Message Date
Hubert Tong 940d949435 Speculative fix for build breakage from D78403
D78403 appears responsible for breaking bots:
http://lab.llvm.org:8011/builders/clang-ppc64le-linux-multistage/builds/12261/steps/build%20stage%201/logs/stdio
2020-05-14 23:57:22 -04:00
Kang Zhang aedb6615a8 [MachineVerifier] Use the for_range loop to instead llvm::any_of
Summary:
In the patch D78849, it uses llvm::any_of to instead of for loop to
simplify the function addRequired().
It's obvious that above code is not a NFC conversion. Because any_of
will return if any addRequired(Reg) is true immediately, but we want
every element to call addRequired(Reg).

This patch uses for_range loop to fix above any_of bug.

Reviewed By: MaskRay, nickdesaulniers

Differential Revision: https://reviews.llvm.org/D79872
2020-05-15 02:35:33 +00:00
Eric Christopher dad2e92eaf Temporarily Revert "[Support] Make UniqueStringSaver wrap a StringSet"
as it's causing asan failures in clangd. Followed up offline
with repro instructions.

This reverts commit 29560a89dd.
2020-05-14 19:18:20 -07:00
Valentin Clement 85725a67c7 [Flang][OpenMP] Avoid abort when collapse clause value is negative
Summary:
If the value in the collapse close is negative f18 abort without the correct error message. This PR change the size_t in name resolution to a int64_t and check appropriately for negative or zero before the privatization of induction variable.
The correct error is then catch by the OpenMP structure check.

This diff is migrated from the GitHub pull request https://github.com/flang-compiler/f18/pull/1098

Reviewers: ichoyjx, jdoerfert, sscalpone, DavidTruby

Reviewed By: ichoyjx, sscalpone, DavidTruby

Subscribers: sscalpone, klausler, yaxunl, guansong, llvm-commits

Tags: #llvm, #flang

Differential Revision: https://reviews.llvm.org/D77821
2020-05-14 21:37:25 -04:00
Jonas Devlieghere bf02bcffcf [lldb/Test] Modify more tests for API replay
Skip tests or parts thereof that aren't expected to work when run from a
reproducer. Also improve the doc comments in configuration.py to prevent
mistakes in the future.
2020-05-14 17:58:27 -07:00
Joel E. Denny 5df55bc7a4 [FileCheck] Fix isalpha/isalnum calls
D79276 caused the following builder to fail:

  http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/23489

Specifically, FileCheck dumped stack in the following tests:

  LLVM :: MC/Mips/micromips-jump-pc-region.s
  LLVM :: MC/Mips/mips-jump-pc-region.s

Those tests contained characters encoded as 160 but that render (at
least for me in vim) like a single space (32).  Those characters
appeared between the `#` and `RUN:` on several lines, and D79276
caused FileCheck to process those lines differently: `RUN:` is a
comment directive.  As a result, D79276 caused FileCheck to start
calling is `isalnum` on those characters.

The problem is that FileCheck calls `isalnum` on type `char` without
casting to `unsigned char` first, so it sign-extends 160 beyond what
`unsigned char` or `EOF` can represent.  C says that has undefined
behavior.  This problem is general to FileCheck's prefix parsing and
so exists independently of D79276.

524457edbc fixed the above tests.  This patch changes FileCheck to
use LLVM's replacements for `ctype.h` functions, and it adds tests for
cases that are representative with or without D79276.

Reviewed By: jhenderson, thopre, efriedma

Differential Revision: https://reviews.llvm.org/D79810
2020-05-14 20:24:09 -04:00
Davide Italiano da52aa2c33 [LICM] When promoting loads to the preheader, drop the location.
It's really almost going to be misleading, see the example in
https://bugs.llvm.org/show_bug.cgi?id=45820

Maybe at some point we can do something fancier, but at least
this will fix a bug where we step on dead code while debugging.
2020-05-14 17:05:23 -07:00
Leonard Chan 592303a53e [Fuchsia] Do not enable the Z3 solver for a fuchsia toolchain
gLinux started shipping incompatible versions of Z3, which can lead to a
missing `z3.h` header when building the Z3 solver locally. This patch
disables the Z3 solver when building a clang toolchain for Fuchsia.

Differential Revision: https://reviews.llvm.org/D79974
2020-05-14 17:03:58 -07:00
Nico Weber e0c1554274 Revert "[GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified"
This reverts commit 887dfeec53.
It broke irtranslator-inline-asm.ll on many bots, e.g.
http://lab.llvm.org:8011/builders/lld-x86_64-freebsd/builds/38606/steps/test-check-all/logs/FAIL%3A%20LLVM%3A%3Airtranslator-inline-asm.ll
2020-05-14 19:37:05 -04:00
Vedant Kumar 61f73f893c llvm/test: Check in suppressions file left out of f26823c9d 2020-05-14 16:08:14 -07:00
Mircea Trofin 8a2e2a6a2b [llvm] Fix refactoring bug introduced in D79042
Incorrectly copied over the GetAssumptionCache snippet.

This patch also renames a variable for clarity.
2020-05-14 15:59:43 -07:00
Jonas Devlieghere 9fde516032 [lldb/Test] Replace assertTrue with more specific checks (NFC)
Use assertEqual(a, b) instead of assertTrue(a == b) etc.
2020-05-14 15:48:48 -07:00
Vedant Kumar f26823c9dc [test/dsymutil] Suppress LeakSanitizer on ARM dsymutil tests
Just like on X86, we're getting reports of bogus leaks from
CoreFoundation in:

[_CFXPreferences(SourceAdditions) withSourceForIdentifier:user:byHost:container:cloud:perform:]

rdar://63238710
2020-05-14 15:44:49 -07:00
Stanislav Mekhanoshin 7d16a22eb0 [AMDGPU] Peephole adjacent equivalent S_SET_GPR_IDX_ON
Differential Revision: https://reviews.llvm.org/D79907
2020-05-14 15:44:33 -07:00
Leonard Chan e9802aa422 Revert "Run Coverage pass before other *San passes under new pass manager"
This reverts commit 7d5bb94d78.

Reverting since this leads to a linker error we're seeing on Fuchsia.
The underlying issue seems to be that inlining is run after sanitizers
and causes different comdat groups instrumented by Sancov to reference
non-key symbols defined in other comdat groups.

Will re-land this patch after a fix for that is landed.
2020-05-14 15:19:27 -07:00
Alexandre Rames 05eedf1f5b [clang][VerifyDiagnosticConsumer] Support filename wildcards
Differential Revision: https://reviews.llvm.org/D72100
2020-05-14 15:15:49 -07:00
Alexey Bataev 0363ae97ab [OPENMP50]Codegen for uses_allocators clause.
Summary:
Predefined allocators should not be mapped at all (they are just enumeric
constants). FOr user-defined allocators need to map the traits only as
firstprivates, the allocator itself is private.
At the beginning of the target region the user-defined allocatores must
be created and then destroyed at the end of the target region:
```
omp_allocator_handle_t my_allocator = __kmpc_init_allocator(<gtid>,
/*default memhandle*/ 0, <number_of_traits>, &<traits>);
...
call void @__kmpc_destroy_allocator(<gtid>, my_allocator);
```

Reviewers: jdoerfert, aaron.ballman

Subscribers: jholewinski, yaxunl, guansong, cfe-commits, caomhin

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79257
2020-05-14 18:02:12 -04:00
Stanislav Mekhanoshin 9d4cf5bd42 [AMDGPU] Make v16f64/v16i64 legal
This allows indirect VGPR addressing to work.

Differential Revision: https://reviews.llvm.org/D79960
2020-05-14 14:46:55 -07:00
Konstantin Schwarz 887dfeec53 [GlobalISel][InlineAsm] Add early return for memory inputs that need to be indirectified
Summary:
D78319 introduced basic support for inline asm input operands in GlobalISel.
However, that patch did not handle the case where a memory input operand still needs to
be indirectified. Later code asserts that the memory operand is already indirect.

This patch adds an early return false to trigger the SelectionDAG fallback for now.

Reviewers: arsenm, paquette

Reviewed By: arsenm

Subscribers: wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79955
2020-05-14 23:42:31 +02:00
Cameron McInally b085e51d81 [AArch64][SVE] Add some integer DestructiveBinaryComm* patterns
Add DestructiveBinaryComm* patterns for ADD, SUB, and SUBR.

Differential Revision: https://reviews.llvm.org/D76711
2020-05-14 16:35:49 -05:00
Stanislav Mekhanoshin 184b383457 Add v16f64 value type
We need to use it to handle <16 x double> indirect indexes
in the AMDGPU BE.

The only visible change from adding it is in ARM cost model.
To me it looks reasonable. With doubling a vector size it
quadruples the cost up to the size 8 and then it did only
double it. Now it also quadruples, which seems a logical
progression to me.

Actual AMDGPU code is to follow, this is a common part, plus
load/store legalization in the AMDGPU BE not to break what
works now.

Differential Revision: https://reviews.llvm.org/D79952
2020-05-14 14:28:00 -07:00
LLVM GN Syncbot b5d2bd74d7 [gn build] Port 2b7fe0863a 2020-05-14 21:21:41 +00:00
shafik 1cbd1b8f69 Revert "[lldb] Don't dissasemble large functions by default"
This reverts commit f665e80c02.

Reverting because it breaks TestFoundationDisassembly.py
2020-05-14 14:15:51 -07:00
Alex Lorenz 11d612ac99 [clang][Preprocessor] Replace the slow translateFile call by a new, faster isMainFile check
The commit 3c28a2dc6b introduced the check that checks if we're
trying to re-enter a main file when building a preamble. Unfortunately this slowed down the preamble
compilation by 80-90% in some test cases, as translateFile is really slow. This change checks
to see if the FileEntry is the main file without calling translateFile, but by using the new
isMainFile check instead. This speeds up preamble building by 1.5-2x for certain test cases that we have.

rdar://59361291

Differential Revision: https://reviews.llvm.org/D79834
2020-05-14 14:13:34 -07:00
Eli Friedman 428d0b6f77 Fix clang test failures from D77454 2020-05-14 14:10:51 -07:00
Wei Mi 67bb16049a [llvm-profdata] Update CommandGuide
Add a bunch of SampleFDO related flags added recently into llvm-profdata to
its command guide.

Differential Revision: https://reviews.llvm.org/D79911
2020-05-14 13:59:42 -07:00
Eugene Zhulenev 3a11ca7bed [MLIR] Add symbol map to mlir ExecutionEngine
Add additional symbol mapping to be able to provide custom symbols to jitted code at runtime.

Differential Revision: https://reviews.llvm.org/D79812
2020-05-14 22:30:03 +02:00
Diego Caballero bc5565f9ea [mlir][Affine] Introduce affine.vector_load and affine.vector_store
This patch adds `affine.vector_load` and `affine.vector_store` ops to
the Affine dialect and lowers them to `vector.transfer_read` and
`vector.transfer_write`, respectively, in the Vector dialect.

Reviewed By: bondhugula, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D79658
2020-05-14 13:17:58 -07:00
Eli Friedman accc6b5545 LoadInst should store Align, not MaybeAlign.
The fact that loads and stores can have the alignment missing is a
constant source of confusion: code that usually works can break down in
rare cases.  So fix the LoadInst API so the alignment is never missing.

To reduce the number of changes required to make this work, IRBuilder
and certain LoadInst constructors will grab the module's datalayout and
compute the alignment automatically.  This is the same alignment
instcombine would eventually apply anyway; we're just doing it earlier.
There's a minor risk that the way we're retrieving the datalayout
could break out-of-tree code, but I don't think that's likely.

This is the last in a series of patches, so most of the necessary
changes have already been merged.

Differential Revision: https://reviews.llvm.org/D77454
2020-05-14 13:19:21 -07:00
Wouter van Oortmerssen 2b7fe0863a [WebAssembly] Added Debug Fixup pass
This pass changes debug_value instructions referring to stackified registers into TI_OPERAND_STACK with correct stack depth.
2020-05-14 13:14:45 -07:00
Ryan Mansfield 5144e48c14 [lldb] Update stop info override callback comment.
In D31172 GetStopInfoOverrideCallback was moved and renamed.

Differential revision: https://reviews.llvm.org/D79953
2020-05-14 13:08:56 -07:00
Jonas Devlieghere 2d6f4fec07 [lldb/Test] Skip test using files to synchronize.
Files written by the inferior are not captured by the reproducers and
the inferior doesn't actually run during replay.
2020-05-14 13:08:56 -07:00
Eli Friedman 4532a50899 Infer alignment of unmarked loads in IR/bitcode parsing.
For IR generated by a compiler, this is really simple: you just take the
datalayout from the beginning of the file, and apply it to all the IR
later in the file. For optimization testcases that don't care about the
datalayout, this is also really simple: we just use the default
datalayout.

The complexity here comes from the fact that some LLVM tools allow
overriding the datalayout: some tools have an explicit flag for this,
some tools will infer a datalayout based on the code generation target.
Supporting this properly required plumbing through a bunch of new
machinery: we want to allow overriding the datalayout after the
datalayout is parsed from the file, but before we use any information
from it. Therefore, IR/bitcode parsing now has a callback to allow tools
to compute the datalayout at the appropriate time.

Not sure if I covered all the LLVM tools that want to use the callback.
(clang? lli? Misc IR manipulation tools like llvm-link?). But this is at
least enough for all the LLVM regression tests, and IR without a
datalayout is not something frontends should generate.

This change had some sort of weird effects for certain CodeGen
regression tests: if the datalayout is overridden with a datalayout with
a different program or stack address space, we now parse IR based on the
overridden datalayout, instead of the one written in the file (or the
default one, if none is specified). This broke a few AVR tests, and one
AMDGPU test.

Outside the CodeGen tests I mentioned, the test changes are all just
fixing CHECK lines and moving around datalayout lines in weird places.

Differential Revision: https://reviews.llvm.org/D78403
2020-05-14 13:03:50 -07:00
Kellie Medlin 2b920ae78c [lld] Add archive file support to Mach-O backend
With this change, basic archive files can be linked together. Input
section discovery has been refactored into a function since archive
files lazily resolve their symbols / the object files containing those
symbols.

Reviewed By: int3, smeenai

Differential Revision: https://reviews.llvm.org/D78342
2020-05-14 12:58:35 -07:00
Christopher Tetreault 920ff806d4 [SVE] Remove usages of VectorType::getNumElements() from SystemZ
Reviewers: efriedma, david-arm, c-rhodes, jnspaulsson

Reviewed By: david-arm

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79824
2020-05-14 12:46:51 -07:00
Eli Friedman 44ecaabc07 [BitcodeReader] datalayout must be specified before it is queried.
This isn't really a new invariant; it effectively already existed due to
existing DataLayout queries.  But this makes it explicit.

This is technically not backward-compatible with the existing bitcode
reader, but it's backward-compatible with the output of the bitcode
writer, which is what matters in practice.

No testcase because I don't know a good way to write one: there are no
existing tools that can generate a bitcode file that would trigger the
error.

Split off from D78403.

Differential Revision: https://reviews.llvm.org/D79900
2020-05-14 12:45:17 -07:00
Volodymyr Sapsai 6a3469f58d [ObjC] Add compatibility mode for type checking of qualified id block parameters.
Commit 73152a2ec2 fixed type checking for
blocks with qualified id parameters. But there are existing APIs in
Apple SDKs relying on the old type checking behavior. Specifically,
these are APIs using NSItemProviderCompletionHandler in
Foundation/NSItemProvider.h. To keep existing code working and to allow
developers to use affected APIs introduce a compatibility mode that
enables the previous and the fixed type checking. This mode is enabled
only on Darwin platforms.

Reviewed By: jyknight, ahatanak

Differential Revision: https://reviews.llvm.org/D79511
2020-05-14 12:08:19 -07:00
zoecarver 8f2cc889b0 [libcxx] [NFC] Add more reinterpret_pointer_cast tests.
* Add test for inheritance.
 * Test value is preserved through cast.
2020-05-14 12:04:05 -07:00
Benjamin Kramer 77346daaa5 [StringSet] Simplify code a bit. NFC. 2020-05-14 20:56:49 +02:00
Reid Kleckner 3774bcf9f8 [COFF] Fix var names cVStrTab->cvStrTab sXDataChunks->sxDataChunks
NFC
2020-05-14 11:23:07 -07:00
LLVM GN Syncbot 7b73e5e08d [gn build] Port 42a5560503 2020-05-14 17:59:56 +00:00
Craig Topper 2fdeee9c82 [X86] Add support for forming vXi16 PMULH instructions from shifts.
We already form PMULH when the shift is truncated. But we can
also do it from just a shift by extending the result.

Unfortunately, I get regressions if I try to replace the truncate
combine with this as we turn the truncate into a more complicated
sequence first. Then we are unable to combine that sequence with
the extend produced at the end of this combine.

Differential Revision: https://reviews.llvm.org/D79682
2020-05-14 10:58:00 -07:00
Jay Foad 42a5560503 [AMDGPU] New SIInsertHardClauses pass
Enable clausing of memory loads on gfx10 by adding a new pass to insert
the s_clause instructions that mark the start of each hard clause.

Differential Revision: https://reviews.llvm.org/D79792
2020-05-14 18:54:49 +01:00
Marius Brehler 426afd79da [mlir] Adopt changes in mlir-opt to standalone example
MLIRContext was moved with commit 6bce7d8

Differential Revision: https://reviews.llvm.org/D79946
2020-05-14 17:50:55 +00:00
Jonas Devlieghere e7c91e3124 [lldb/Test] Skip remaining 'side_effect' tests with reproducers.
The side_effect Python package bypasses the reproducer instrumentation
and therefore these tests are not expected to replay from a reproducer.
2020-05-14 10:38:56 -07:00
Jonas Devlieghere e29cae1e53 [lldb/Test] Skip TestExpressionInSyscall with reproducers
Skip this test because it relies on a timeout.
2020-05-14 10:38:56 -07:00
Fangrui Song 5ecb514146 [Driver] Pass -plugin-opt=O2 for -Os -Oz and -plugin-opt=O1 for -Og
Fixes PR42445 (compiler driver options -Os -Oz translate to
-plugin-opt=Os (Oz) which are not recognized by LLVMgold.so or LLD).

The optimization level mapping matches
CompilerInvocation.cpp:getOptimizationLevel() and SpeedLevel of
PassBuilder::OptimizationLevel::O*.

-plugin-opt=O* affects the way we construct regular LTO/ThinLTO pass
manager pipeline.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D79919
2020-05-14 10:37:33 -07:00
Reid Kleckner f5a79713b6 [LLD] Fix precomp-link.test
I had a stale directory at %t, so the test passed locally, but not
remotely. Skip the %t directory altogether.
2020-05-14 10:32:50 -07:00
Craig Topper 2b0b9b1148 [X86] Fix a regression caused by moving combineLoopMAddPattern to IR
When I moved combineLoopMAddPattern to an IR pass. I didn't match the behavior of canReduceVMulWidth that was used in the SelectionDAG version. canReduceVMulWidth just calls computeSignBits and assumes a truncate is always profitable. The version I put in IR just looks for constants and zext/sext. Though I neglected to check the number of bits in input of the zext/sext.

This patch adds a check for the number of input bits to the sext/zext. And it adds a special case for add/sub with zext/sext inputs which can be handled by combineTruncatedArithmetic. Match the original SelectionDAG behavior appears to be a regression in some cases if the truncate isn't removed and becomes pack and permq. So enabling only this specific case is the conservative approach.

Differential Revision: https://reviews.llvm.org/D79909
2020-05-14 10:31:28 -07:00
Simon Pilgrim acb6f1ae09 TargetLowering.cpp - remove non-constant EXTRACT_SUBVECTOR/INSERT_SUBVECTOR handling. NFC.
Now that D79814 has landed, we can assume that subvector ops use constant, in-range indices.
2020-05-14 18:13:58 +01:00