Commit Graph

11 Commits

Author SHA1 Message Date
Tony Tye 8ba5043dbf [AMDGPU][NFC] Add DWARF extension support for SIMD execution
- Add current iteration to the context of a DWARF expression evaluation.
- Add DW_AT_LLVM_iterations attribute to specify the number of
  iterations executing concurrently.
- Add DF_OP_LLVM_push_iteration to support optimizations that result in
  multiple iterations executing concurrently.
- Add DW_OP_LLVM_overlay and DW_OP_LLVM_bit_overlay to support
  expressing the location of arrays that are promoted to vector
  registers in SIMD vectorized loops.
- Generally clarify the difference between SIMT and SIMD execution.
- Change the DW_AT_LLVM_active_lane attribute to take location
  description expression so that a loclist can be used to express
  different vales at different program locations.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D117572
2022-01-18 17:36:39 +00:00
Tony Tye 0ac939f3e2 [AMDGPU][NFC] Update to DWARF extension for heterogeneous debugging
- Update documentation on the DWARF extension for heterogeneous
  debugging to better reference the DWARF Version 5 standard.
- Numerous other corrections.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D116275
2021-12-28 17:13:45 +00:00
Tony 2817e21c41 [NFC][AMDGPU] Correct typo in DWARF Extensions For Heterogeneous Debugging
A note in the defintion of DW_OP_piece had an incomplete sentence.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D98157
2021-03-09 00:23:23 +00:00
Tony f79bab3fd7 [NFC][AMDGPU] DWARF Extensions For Heterogeneous Debugging clarifications
Clarify that the base type endianity is used when creating implicit
location storage.

Remove duplicate definition of the generic type.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D98137
2021-03-07 18:34:17 +00:00
Tony ca602a72b3 [NFC][AMDGPU]DWARF Extensions For Heterogeneous Debugging generic type endianity
In "DWARF Extensions For Heterogeneous Debugging" document that the
DWARF generic type has a target architecture defined endianity.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D98126
2021-03-07 04:51:05 +00:00
Kazu Hirata e8fa9014cc [llvm] Fix typos in documentation (NFC) 2021-02-27 10:09:23 -08:00
Tony Tye 231f418295 [NFC][AMDGPU] Correct name of DWARF CFA extensions
Add LLVM to the DW_CFA_LLVM_def_aspace_cfa and
DW_CFA_LLVM_def_aspace_cfa_sf DWARF extensions.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D95640
2021-01-28 22:25:33 +00:00
YangZhihui f2bb4b8855 [docs] Fix typos
Differential Revision: https://reviews.llvm.org/D87356
2020-09-11 17:58:07 +02:00
vnalamot b9496efbb9 [AMDGPU, docs] Fix typos
Reviewed By: t-tye, Flakebi

Differential Revision: https://reviews.llvm.org/D86340
2020-08-25 00:00:23 +05:30
Kazu Hirata a31b3893c7 [docs] Fix typos 2020-08-09 19:31:49 -07:00
Tony e24f5f3149 [AMDGPU] DWARF proposal changes
- Clarify that these are extensions to DWARF 5 and not as yet a
  proposal.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D70523
2020-07-30 05:07:09 +00:00