23d855b40d
Avoid recursion in assignDFSNumber(). Move def from ET-Forest.h
...
to Dominators.h
llvm-svn: 30309
2006-09-14 01:27:42 +00:00
1463377ddb
add note about switch lowering
...
llvm-svn: 30308
2006-09-13 23:37:16 +00:00
237ccf2a51
Second half of the fix for Transforms/Inline/inline_cleanup.ll
...
This folds unconditional branches that are often produced by code
specialization.
llvm-svn: 30307
2006-09-13 21:27:00 +00:00
12efffc96b
Add some more consistency checks.
...
llvm-svn: 30305
2006-09-13 19:32:53 +00:00
51ce8d6b46
Fix unionSets so that it can merge correctly.
...
llvm-svn: 30304
2006-09-13 19:24:01 +00:00
6ef6d06d21
Implement the first half of Transforms/Inline/inline_cleanup.ll
...
llvm-svn: 30303
2006-09-13 19:23:57 +00:00
92e5113d48
Skip over first operand when determining REX prefix for two-address code.
...
llvm-svn: 30300
2006-09-13 19:07:28 +00:00
3a4dc7b489
Erase dead instructions.
...
llvm-svn: 30298
2006-09-13 18:55:37 +00:00
971e33930d
Turn X < 0 -> TEST X,X js
...
llvm-svn: 30294
2006-09-13 17:04:54 +00:00
0c9ae46c5f
The sense of this branch was inverted :(
...
llvm-svn: 30293
2006-09-13 16:56:12 +00:00
cd34779ef6
Fix a ton of jit failures
...
llvm-svn: 30292
2006-09-13 16:21:10 +00:00
3130a756ef
add shifts to addressing mode 1
...
llvm-svn: 30291
2006-09-13 12:09:43 +00:00
84cc1f7cb8
If LSR went through a lot of trouble to put constants (e.g. the addr of a global
...
in a specific BB, don't undo this!). This allows us to compile
CodeGen/X86/loop-hoist.ll into:
_foo:
xorl %eax, %eax
*** movl L_Arr$non_lazy_ptr, %ecx
movl 4(%esp), %edx
LBB1_1: #cond_true
movl %eax, (%ecx,%eax,4)
incl %eax
cmpl %edx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
instead of:
_foo:
xorl %eax, %eax
movl 4(%esp), %ecx
LBB1_1: #cond_true
*** movl L_Arr$non_lazy_ptr, %edx
movl %eax, (%edx,%eax,4)
incl %eax
cmpl %ecx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
This was noticed in 464.h264ref. This doesn't usually affect PPC,
but strikes X86 all the time.
llvm-svn: 30290
2006-09-13 06:02:42 +00:00
706dd3e0d4
Fix a regression in the 32-bit port from the 64-bit port landing.
...
We now compile CodeGen/X86/lea-2.ll into:
_test:
movl 4(%esp), %eax
movl 8(%esp), %ecx
leal -5(%ecx,%eax,4), %eax
ret
instead of:
_test:
movl 4(%esp), %eax
leal (,%eax,4), %eax
addl 8(%esp), %eax
addl $4294967291, %eax
ret
llvm-svn: 30288
2006-09-13 04:45:25 +00:00
e413fea6ac
new note
...
llvm-svn: 30286
2006-09-13 04:19:50 +00:00
3496710f25
new note
...
llvm-svn: 30285
2006-09-13 03:54:54 +00:00
72b503bcad
Compile X << 1 (where X is a long-long) to:
...
addl %ecx, %ecx
adcl %eax, %eax
instead of:
movl %ecx, %edx
addl %edx, %edx
shrl $31, %ecx
addl %eax, %eax
orl %ecx, %eax
and to:
addc r5, r5, r5
adde r4, r4, r4
instead of:
slwi r2,r9,1
srwi r0,r11,31
slwi r3,r11,1
or r2,r0,r2
on PPC.
llvm-svn: 30284
2006-09-13 03:50:39 +00:00
7a627676be
Compile X > -1 -> text X,X; js dest
...
This implements CodeGen/X86/jump_sign.ll.
llvm-svn: 30283
2006-09-13 03:22:10 +00:00
fab4972a6e
Initialize DontInternalize.
...
llvm-svn: 30281
2006-09-13 01:02:26 +00:00
9a083a4121
Reflects MachineConstantPoolEntry changes.
...
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
45fe3bc72c
Added support for machine specific constantpool values. These are useful for
...
representing expressions that can only be resolved at link time, etc.
llvm-svn: 30278
2006-09-12 21:00:35 +00:00
3228e750be
Reflect MachineConstantPoolEntry changes.
...
llvm-svn: 30277
2006-09-12 20:59:59 +00:00
1d7ec20a4d
An sinkable instruction may exist with uses, if those uses are in dead blocks.
...
Handle this. This fixes PR908 and Transforms/LICM/2006-09-12-DeadUserOfSunkInstr.ll
llvm-svn: 30275
2006-09-12 19:17:09 +00:00
cfb2c32724
add a note
...
llvm-svn: 30271
2006-09-12 06:36:01 +00:00
8b4de218d9
Testcase noticed from PR906
...
llvm-svn: 30269
2006-09-11 23:00:56 +00:00
6e7286f72a
add compilable testcase
...
llvm-svn: 30268
2006-09-11 22:57:51 +00:00
d28627009a
Fix PR905 and InstCombine/2006-09-11-EmptyStructCrash.ll
...
llvm-svn: 30266
2006-09-11 21:43:16 +00:00
c7829d62c0
implement SRL and MUL
...
llvm-svn: 30262
2006-09-11 19:24:19 +00:00
bccf9c2f1b
add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1
...
llvm-svn: 30261
2006-09-11 19:23:32 +00:00
e45a79a9e2
partial implementation of the ARM Addressing Mode 1
...
llvm-svn: 30252
2006-09-11 17:25:40 +00:00
e94f42a740
Skip the linear search if the answer is already known.
...
llvm-svn: 30251
2006-09-11 17:23:34 +00:00
ecb0d686f8
call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization
...
llvm-svn: 30246
2006-09-11 12:49:38 +00:00
21a75acc3e
Updates.
...
llvm-svn: 30245
2006-09-11 05:35:17 +00:00
9e77d9a96b
Update README file.
...
llvm-svn: 30244
2006-09-11 05:25:15 +00:00
4259a0f654
X86ISD::CMP now produces a chain as well as a flag. Make that the chain
...
operand of a conditional branch to allow load folding into CMP / TEST
instructions.
llvm-svn: 30241
2006-09-11 02:19:56 +00:00
a0d95a8da9
Behold, more work on relocations. Things are looking pretty good now.
...
llvm-svn: 30240
2006-09-10 23:03:44 +00:00
fbee8bfe48
Removed unnecessary Mangler creation.
...
llvm-svn: 30239
2006-09-10 21:17:03 +00:00
d1f8e07808
Allow tail duplication in more cases, relaxing the previous restriction a
...
bit. This fixes Regression/Transforms/TailDup/MergeTest.ll
llvm-svn: 30237
2006-09-10 18:17:58 +00:00
2e0dfb0b16
This code was trying too hard. By eliminating redundant edges in the CFG
...
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.
This fixes 458.sjeng on x86 with llc.
llvm-svn: 30236
2006-09-10 06:36:57 +00:00
9a22d7b60f
Replace EquivalenceClasses with a custom-built data structure. Many common
...
operations (like findProperties) should be faster, at the expense of
unionSets being slower in cases that are rare in practise.
Don't erase a dead Instruction. This fixes a memory corruption issue.
llvm-svn: 30235
2006-09-10 02:27:07 +00:00
0468987592
Implement Transforms/InstCombine/hoist_instr.ll
...
llvm-svn: 30234
2006-09-09 22:02:56 +00:00
27ff96d87a
Make inlining costs more accurate.
...
llvm-svn: 30231
2006-09-09 20:40:44 +00:00
d79dc79831
Turn div X, (Cond ? Y : 0) -> div X, Y
...
This implements select.ll::test18.
llvm-svn: 30230
2006-09-09 20:26:32 +00:00
fdb3a75942
Add cbe support for powi
...
llvm-svn: 30226
2006-09-09 06:17:12 +00:00
f0359b343a
Implement the fpowi now by lowering to a libcall
...
llvm-svn: 30225
2006-09-09 06:03:30 +00:00
e4bbb6c341
Allow targets to custom lower expanded BIT_CONVERT's
...
llvm-svn: 30217
2006-09-09 00:20:27 +00:00
69df6132d7
First pass at supporting relocations. Relocations are written correctly to
...
the file now, however the relocated address is currently wrong. Fixing
that will require some deep pondering.
llvm-svn: 30207
2006-09-08 22:42:09 +00:00
de33f66286
Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex
...
in addition to immediate operands.
llvm-svn: 30205
2006-09-08 21:08:13 +00:00
b2e7316b2d
Non-allocatable physregs can be killed and dead, but don't treat them as
...
safe for later allocation. This fixes McCat/18-imp with llc-beta.
llvm-svn: 30204
2006-09-08 20:21:31 +00:00
050c64c51d
This fixes Benchmarks/Prolangs-C/unix-smail
...
llvm-svn: 30198
2006-09-08 19:11:11 +00:00
9b1a6ebf20
Fix a bunch of llc-beta failures on x86 yesterday. Don't allow selection
...
of unallocatable registers, just because an alias is allocatable. We were
picking registers like SIL just because ESI was being used.
llvm-svn: 30197
2006-09-08 19:03:30 +00:00
d11fb5d13b
implement shl and sra
...
llvm-svn: 30191
2006-09-08 17:36:23 +00:00
6c003a7c2d
Use __USER_LABEL_PREFIX__ to get the prefix added by the current host.
...
llvm-svn: 30190
2006-09-08 17:03:56 +00:00
4443c7d60a
add the eor (xor) instruction
...
llvm-svn: 30189
2006-09-08 16:59:47 +00:00
177405376c
Missing tab
...
llvm-svn: 30188
2006-09-08 13:06:56 +00:00
778769aafb
implement unconditional branches
...
fix select.ll
llvm-svn: 30186
2006-09-08 12:47:03 +00:00
7348403d42
Remove TEST64mr. It's same as TEST64rm since and is commutative.
...
llvm-svn: 30178
2006-09-08 06:56:55 +00:00
11b0a5dbd4
Committing X86-64 support.
...
llvm-svn: 30177
2006-09-08 06:48:29 +00:00
c9db83306f
We actually do support object file writing, so don't return true (error)
...
llvm-svn: 30173
2006-09-08 03:42:15 +00:00
89c5d04b9b
- Identify a vector_shuffle that can be turned into an undef, e.g.
...
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
optimal code by failing to identify MOVL (move to lowest element of a
vector).
llvm-svn: 30171
2006-09-08 01:50:06 +00:00
ae92ce8798
1. Remove condition on delete.
...
2. Protect and outline createTargetAsmInfo.
3. Misc. kruft.
llvm-svn: 30169
2006-09-07 23:39:26 +00:00
0142cd129e
Untabify.
...
llvm-svn: 30168
2006-09-07 23:29:19 +00:00
b8164e6131
Use iterative do-while loop instead of recursive DFSPass calls to
...
reduce amount of stack space used at runtime.
llvm-svn: 30167
2006-09-07 23:22:37 +00:00
2785d55446
add a new value for the command line optn
...
llvm-svn: 30165
2006-09-07 22:32:28 +00:00
b9e0a9e82f
Fix a cross-build issue. The asmsyntax shouldn't be affected by the build
...
host, it should be affected by the target. Allow the command line option to
override in either case.
llvm-svn: 30164
2006-09-07 22:29:41 +00:00
261779bb45
Make target asm info a property of the target machine.
...
llvm-svn: 30162
2006-09-07 22:06:40 +00:00
0e83541f8b
Break out target asm info into separate files.
...
llvm-svn: 30161
2006-09-07 22:05:02 +00:00
c465046e65
Throttle back tail duplication to avoid creating really ugly sequences of code.
...
For Transforms/TailDup/if-tail-dup.ll, f.e., it produces:
_foo:
movl 8(%esp), %eax
movl 4(%esp), %ecx
testl $1, %ecx
je LBB1_2 #cond_next
LBB1_1: #cond_true
movl $1, (%eax)
LBB1_2: #cond_next
testl $2, %ecx
je LBB1_4 #cond_next10
LBB1_3: #cond_true6
movl $1, 4(%eax)
LBB1_4: #cond_next10
testl $4, %ecx
je LBB1_6 #cond_next18
LBB1_5: #cond_true14
movl $1, 8(%eax)
LBB1_6: #cond_next18
testl $8, %ecx
je LBB1_8 #return
LBB1_7: #cond_true22
movl $1, 12(%eax)
ret
LBB1_8: #return
ret
instead of:
_foo:
movl 4(%esp), %eax
testl $2, %eax
sete %cl
movl 8(%esp), %edx
testl $1, %eax
je LBB1_2 #cond_next
LBB1_1: #cond_true
movl $1, (%edx)
testb %cl, %cl
jne LBB1_4 #cond_next10
jmp LBB1_3 #cond_true6
LBB1_2: #cond_next
testb %cl, %cl
jne LBB1_4 #cond_next10
LBB1_3: #cond_true6
movl $1, 4(%edx)
testl $4, %eax
je LBB1_6 #cond_next18
jmp LBB1_5 #cond_true14
LBB1_4: #cond_next10
testl $4, %eax
je LBB1_6 #cond_next18
LBB1_5: #cond_true14
movl $1, 8(%edx)
testl $8, %eax
je LBB1_8 #return
jmp LBB1_7 #cond_true22
LBB1_6: #cond_next18
testl $8, %eax
je LBB1_8 #return
LBB1_7: #cond_true22
movl $1, 12(%edx)
ret
LBB1_8: #return
ret
llvm-svn: 30158
2006-09-07 21:30:15 +00:00
dc4ff5311f
Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns
...
using test, which provides nice simplifications like:
- movl %edi, %ecx
- andl $2, %ecx
- cmpl $0, %ecx
+ testl $2, %edi
je LBB1_11 #cond_next90
There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.
llvm-svn: 30156
2006-09-07 20:33:45 +00:00
1b7f09cdf7
Some notes on better load folding we could do
...
llvm-svn: 30155
2006-09-07 20:32:01 +00:00
a9411c0977
Consistency.
...
llvm-svn: 30152
2006-09-07 19:03:48 +00:00
95b3dde8bb
Fix pasto that was breaking x86 tests.
...
llvm-svn: 30151
2006-09-07 18:50:20 +00:00
721fc38342
Add new option to leave asm names alone
...
llvm-svn: 30149
2006-09-07 18:20:41 +00:00
c7abe471fe
Make the x86 asm flavor part of the subtarget info.
...
llvm-svn: 30146
2006-09-07 12:23:47 +00:00
707339a57b
Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted
...
too many phi operands when lowering a switch to branches in some cases.
llvm-svn: 30142
2006-09-07 01:59:34 +00:00
7f3f0973e6
Clean up.
...
llvm-svn: 30140
2006-09-07 01:17:57 +00:00
4c7a3fbdea
Watch out for variable_ops instructions.
...
llvm-svn: 30135
2006-09-06 20:32:45 +00:00
ac22e54131
Variable ops instructions may ignore the last few operands for code emission.
...
llvm-svn: 30134
2006-09-06 20:24:14 +00:00
ef94ebb666
Oops - forgot to update banner.
...
llvm-svn: 30131
2006-09-06 19:21:41 +00:00
681ecbb3b3
Separate target specifc asm properties from asm printers.
...
llvm-svn: 30127
2006-09-06 18:35:33 +00:00
a6211dcdad
Separate target specific asm properties from the asm printers.
...
llvm-svn: 30126
2006-09-06 18:34:40 +00:00
abd8bcbe5e
add the orr instruction
...
llvm-svn: 30125
2006-09-06 18:03:12 +00:00
ddfb10b5af
Only call isUse/isDef on register operands
...
llvm-svn: 30122
2006-09-05 20:32:06 +00:00
2656932979
Bugfix to work with the two-addr changes that have been made in the tree recently
...
llvm-svn: 30121
2006-09-05 20:27:32 +00:00
2cb238320d
Only call isUse/isDef on register operands
...
llvm-svn: 30118
2006-09-05 20:19:27 +00:00
45456d44e3
Don't call isDef on non-registers
...
llvm-svn: 30117
2006-09-05 20:02:51 +00:00
845b223da4
Fix Duraid's changes to work when TLI is null. This fixes the failing
...
lowerinvoke regtests.
llvm-svn: 30115
2006-09-05 17:48:07 +00:00
0dce3311c4
Change the default to 0, which means 'default'.
...
llvm-svn: 30114
2006-09-05 17:39:15 +00:00
7a150d3113
Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll
...
llvm-svn: 30113
2006-09-05 08:32:49 +00:00
17c28b2e0e
JIT encoding bug.
...
llvm-svn: 30112
2006-09-05 05:59:25 +00:00
e3d2e1e41e
Update the X86 JIT to make it work with the new two-addr changes. This also
...
adds assertions that check to make sure every operand gets emitted.
llvm-svn: 30110
2006-09-05 02:52:35 +00:00
af23f9b5f6
Completely eliminate def&use operands. Now a register operand is EITHER a
...
def operand or a use operand.
llvm-svn: 30109
2006-09-05 02:31:13 +00:00
13a5dcddce
Fix a long-standing wart in the code generator: two-address instruction lowering
...
actually *removes* one of the operands, instead of just assigning both operands
the same register. This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.
Changing this also gets rid of a bunch of hacky code in various places.
This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.
llvm-svn: 30108
2006-09-05 02:12:02 +00:00
3852b2ce7e
jmp_bufs are this big on alpha.
...
llvm-svn: 30107
2006-09-05 00:22:25 +00:00
8386105f3f
add support for returning 64bit values
...
llvm-svn: 30103
2006-09-04 19:05:01 +00:00
49c45d3a13
Fix some X86 JIT failures. This should really come from TargetJITInfo.
...
llvm-svn: 30102
2006-09-04 18:48:41 +00:00
1eed04d1fb
Correct fix for a crasher on functions with live in values
...
llvm-svn: 30099
2006-09-04 18:27:40 +00:00
bff0b5969f
Hack around a regression I introduced yesterday
...
llvm-svn: 30098
2006-09-04 18:20:15 +00:00
373be1d1a2
forgot this
...
llvm-svn: 30097
2006-09-04 07:44:11 +00:00
cf6749e4c0
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
...
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
llvm-svn: 30095
2006-09-04 06:21:35 +00:00
a916db12e4
new file
...
llvm-svn: 30082
2006-09-04 04:16:09 +00:00
12e97307a1
Completely rearchitect the interface between targets and the pass manager.
...
This pass:
1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
output, move all this to common code, and give targets hooks they can
implement.
3. Commonalize the target population stuff between file emission and JIT
emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
paves the way for "fast -O0" stuff in the CFE later, and now LLC could
lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
which is now orthogonal to the fact that JIT'ing is being done.
llvm-svn: 30081
2006-09-04 04:14:57 +00:00
e8ce162969
Add accessor
...
llvm-svn: 30080
2006-09-04 04:08:58 +00:00
2f77922d30
Add explicit doInitialization/doFinalization methods instead of making
...
the FunctionPassManager redo this for each function.
llvm-svn: 30079
2006-09-04 04:07:39 +00:00
2f93c0fd33
remove #include
...
llvm-svn: 30078
2006-09-04 04:06:01 +00:00
0fc4541c67
Simplify target construction.
...
llvm-svn: 30070
2006-09-03 18:44:02 +00:00
ad36544457
eliminate use of TM.getName()
...
llvm-svn: 30068
2006-09-03 18:37:12 +00:00
5328ba96e1
add the SETULT condition code
...
llvm-svn: 30067
2006-09-03 13:19:16 +00:00
8584e940b8
Avoid beating on the mi2i map when we know the answer already.
...
llvm-svn: 30066
2006-09-03 08:07:11 +00:00
774785a79d
minor speedup
...
llvm-svn: 30065
2006-09-03 07:53:50 +00:00
7cc20d418b
Fix Regression/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll on X86.
...
Just because an alias of a register is available, it doesn't mean that we
can arbitrarily evict the register.
llvm-svn: 30064
2006-09-03 07:15:37 +00:00
bd79458b0e
When deleting a machine instruction, make sure to remove it from the
...
livevariables information. This fixes several regalloc=local failures on x86
llvm-svn: 30062
2006-09-03 00:06:08 +00:00
f8f724a2b1
Move two methods out of line, make them work when the record for a machine
...
instruction includes physregs.
llvm-svn: 30061
2006-09-03 00:05:09 +00:00
5e02f4e141
Count the time for a pass to ReleaseMemory against that pass. Not doing this
...
was under accounting for the time that livevariables cost
llvm-svn: 30060
2006-09-02 23:09:24 +00:00
19b80e76df
Make ArgumentPromotion handle recursive functions that pass pointers in their recursive calls.
...
llvm-svn: 30057
2006-09-02 21:19:44 +00:00
c585b6919b
add more condition codes
...
llvm-svn: 30056
2006-09-02 20:24:25 +00:00
8e5599354a
Improve handling of SelectInst.
...
Reorder operations to remove duplicated work.
Fix to leave floating-point types out of the optimization.
Add tests to predsimplify.ll for SwitchInst and SelectInst handling.
llvm-svn: 30055
2006-09-02 19:40:38 +00:00
f2ce949ae9
improve compat with certain versions of GCC (on cygwin?)
...
llvm-svn: 30054
2006-09-02 17:37:30 +00:00
75742e532a
Iteration is required for some cases, even if they don't occur in crafty.
...
Restore it, which re-fixes X86/2006-08-21-ExtraMovInst.ll
llvm-svn: 30050
2006-09-02 05:32:53 +00:00
5a56d30906
When joining two intervals where the RHS is really simple, use a light-weight
...
method for joining the live ranges instead of the fully-general one.
llvm-svn: 30049
2006-09-02 05:26:59 +00:00
2c4e0f120f
Oops. Bad typo. Without the check of N1.hasOneUse() bad things can happen.
...
Suppose the TokenFactor can reach the Op:
[Load chain]
^
|
[Load]
^ ^
| |
/ \-
/ |
/ [Op]
/ ^ ^
| .. |
| / |
[TokenFactor] |
^ |
| |
\ /
\ /
[Store]
If we move the Load below the TokenFactor, we would have created a cycle in
the DAG.
llvm-svn: 30040
2006-09-01 22:52:28 +00:00
bad9d2ee49
Use a couple of multiclass patterns to factor some integer ops.
...
llvm-svn: 30039
2006-09-01 22:28:02 +00:00
38e6d1d5af
remove a bunch of comments
...
llvm-svn: 30038
2006-09-01 22:16:22 +00:00
6c6a70f999
- Fixed broken Win32 build
...
- Removed warning about clobbered parameter in Bytecode/Reader
llvm-svn: 30026
2006-09-01 20:35:17 +00:00
88c268b621
Remove extra spaces.
...
llvm-svn: 30025
2006-09-01 18:45:22 +00:00
31c99969a9
Last check-in was a mistake...
...
I've been told apple gcc version number is not guaranteed to increase
monotonically. Change the preprocess condition to make it less risky.
The configuration change is done during the middle 10.4 life cycle so we have
to check __APPLE_CC. For future OS X release, we should be able to assume
-fenable-cxa-atexit is the default.
llvm-svn: 30024
2006-09-01 18:42:59 +00:00
d176cdf76d
*** empty log message ***
...
llvm-svn: 30023
2006-09-01 18:40:46 +00:00
e93762d36e
Allow legalizer to expand ISD::MUL using only MULHS in the rare case that is
...
possible and the target only supports MULHS.
llvm-svn: 30022
2006-09-01 18:17:58 +00:00
5352d0cc4d
Corrections.
...
llvm-svn: 30021
2006-09-01 12:55:05 +00:00
4b8b6ae924
Better comments.
...
llvm-svn: 30017
2006-09-01 07:09:56 +00:00
c5fddc566c
Yikes. This requires checking apple gcc version.
...
llvm-svn: 30016
2006-09-01 07:00:46 +00:00
93c067dc2d
Pull some code out of a hot recursive function because the common case doesn't
...
need recursion.
llvm-svn: 30015
2006-09-01 07:00:23 +00:00
3eac2c87aa
Reserve space in the ValueNumberInfo vector. This speeds up live interval
...
analysis 16% on crafty.
Wrap long lines.
llvm-svn: 30012
2006-09-01 06:10:18 +00:00
f765351978
Iterative coallescing doesn't buy us anything (we get identical results on
...
crafty with and without it). Removing it speeds up live intervals 6%.
llvm-svn: 30010
2006-09-01 04:02:42 +00:00
f6f529d008
Don't confuse canonicalize and lookup. Fixes predsimplify.reg4.ll. Also
...
corrects missing optimization opportunity removing cases from a switch.
llvm-svn: 30009
2006-09-01 03:26:35 +00:00
31305c45da
DAG combiner fix for rotates. Previously the outer-most condition checks
...
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.
llvm-svn: 29997
2006-08-31 07:41:12 +00:00
a700a19d04
Add a special case that speeds up coallescing a bit, but not enough.
...
llvm-svn: 29996
2006-08-31 06:48:26 +00:00
78cca7243c
Delete copies as they are coallesced instead of waiting until the end.
...
llvm-svn: 29995
2006-08-31 05:58:59 +00:00
aa36808fd3
avoid calling the virtual isMoveInstr method endlessly by caching its results.
...
llvm-svn: 29994
2006-08-31 05:54:43 +00:00
08674ab707
Properties where both Values weren't in the union (as being equal to
...
another Value) weren't being found by findProperties.
This fixes predsimplify.ll test6, a missed optimization opportunity.
llvm-svn: 29991
2006-08-31 00:39:16 +00:00
cb74860cce
Fix a compiler crash bootstrapping llvm-gcc.
...
llvm-svn: 29989
2006-08-30 23:02:29 +00:00
9543866c27
Guess what happens when asserts are disabled. :(
...
Also, the assert could never fire due to || instead of &&.
llvm-svn: 29977
2006-08-30 20:37:06 +00:00
f5bed76353
Instantiate Statistic<> in one place, not in every .o file that uses it.
...
llvm-svn: 29971
2006-08-30 04:17:00 +00:00
5f8f9af65c
Move to using the EquivalenceClass ADT. Removes SynSets.
...
If a branch's condition has become a ConstantBool, simplify it immediately.
Removing the edge saves work and exposes up more optimization opportunities
in the pass.
Add support for SelectInst.
llvm-svn: 29970
2006-08-30 02:46:48 +00:00
34434e97c9
Teach the coallescer to coallesce live intervals joined by an arbitrary
...
number of copies, potentially defining live ranges that appear to have
differing value numbers that become identical when coallsced. Among other
things, this fixes CodeGen/X86/shift-coalesce.ll and PR687.
llvm-svn: 29968
2006-08-29 23:18:15 +00:00
f489d0f85c
Do not rely on std::sort and std::erase to get list of unique
...
exit blocks. The output is dependent on addresses of basic block.
Add and use Loop::getUniqueExitBlocks.
llvm-svn: 29966
2006-08-29 22:29:16 +00:00
6d464146d0
Minor asm fix.
...
llvm-svn: 29965
2006-08-29 22:14:48 +00:00
b28800f4d5
Remove dead code.
...
llvm-svn: 29962
2006-08-29 21:42:58 +00:00
dfb85155dc
Don't performance load/op/store transformation if op produces a floating point
...
or vector result. X86 does not have load/mod/store variants of those
instructions.
llvm-svn: 29957
2006-08-29 18:37:37 +00:00
358b9ed98a
- Enable x86 isel preprocessing by default unless -fast is specified.
...
- Also disable isel load folding if -fast.
llvm-svn: 29956
2006-08-29 18:28:33 +00:00
2eebe8b05e
Handle callee saved registers in dwarf frame info (lead up to exception
...
handling.)
llvm-svn: 29954
2006-08-29 16:24:26 +00:00
82dc16c0a7
Tidy up options.
...
llvm-svn: 29953
2006-08-29 15:13:10 +00:00
c07feb14b0
Avoid making unneeded load/mod/store transformation which can hurt performance.
...
llvm-svn: 29952
2006-08-29 06:44:17 +00:00
e5570a4c3f
Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG.
...
llvm-svn: 29951
2006-08-29 06:42:35 +00:00
a8a2e5c666
Clean up a bit.
...
llvm-svn: 29950
2006-08-29 06:10:56 +00:00
18f0329cfc
Make ppc64 jit kinda work right. About 2/3 of Olden passes with this,
...
there are clearly some encoding bugs lurking in there somewhere.
llvm-svn: 29949
2006-08-29 02:30:59 +00:00
b2e8ae1700
Add PredicateSimplifier pass. Collapses equal variables into one form
...
and simplifies expressions. This implements the optimization described
in PR807.
llvm-svn: 29947
2006-08-28 22:44:55 +00:00
00884b51c5
On Mac, print jump table entries after the function to work around a linker issue.
...
llvm-svn: 29946
2006-08-28 22:14:16 +00:00
64a9e28846
Add an optional pass to preprocess the DAG before x86 isel to allow selecting more load/mod/store instructions.
...
llvm-svn: 29943
2006-08-28 20:10:17 +00:00
62c84fe371
Make LoopUnroll fold excessive BasicBlocks. This results in a significant speedup of
...
gccas on 252.eon
llvm-svn: 29936
2006-08-28 02:09:46 +00:00
e7141c8be6
For PR387:
...
Close out this long standing bug by removing the remaining overloaded
virtual functions in LLVM. The -Woverloaded-virtual option is now turned on.
llvm-svn: 29934
2006-08-28 01:02:49 +00:00
97c9f20c52
simplify AnalysisGroup registration, eliminating one typeid call.
...
llvm-svn: 29932
2006-08-28 00:42:29 +00:00
7aa139994f
Silence -Woverloaded-virtual warnings.
...
llvm-svn: 29929
2006-08-28 00:09:00 +00:00
c2d3d3112e
eliminate RegisterOpt. It does the same thing as RegisterPass.
...
llvm-svn: 29925
2006-08-27 22:42:52 +00:00
a4c1bc74b9
Fit to 80 cols
...
llvm-svn: 29922
2006-08-27 22:31:12 +00:00
3c9b2420df
Eliminate RegisterAnalysis. RegisterPass now does all that is necessary.
...
llvm-svn: 29921
2006-08-27 22:30:17 +00:00
fbb46500cf
We no longer care whether something is an opt vs analysis pass, only whether
...
something is a pass vs an analysis group now. Simplify interfaces.
llvm-svn: 29920
2006-08-27 22:21:55 +00:00
2de6e33c06
Minor code cleanups
...
llvm-svn: 29917
2006-08-27 22:10:29 +00:00
3d27be1333
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
...
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
2c3683a901
typo fix
...
llvm-svn: 29910
2006-08-27 12:47:48 +00:00
3e5d60fcea
Add external definitions for commonly-used template specializations and add
...
anchor methods to others. This eliminates the vtable/template method bloat
in .o files that defining a cl::opt used to impose (~4K per .o file for one
cp::opt<unsigned>).
llvm-svn: 29909
2006-08-27 12:45:47 +00:00
c3acfc0b10
Do not use getTargetNode() and SelectNodeTo() which takes more than 3
...
SDOperand arguments. Use the variants which take an array and number instead.
llvm-svn: 29907
2006-08-27 08:14:06 +00:00
849f4bf8dd
Eliminate SelectNodeTo() and getTargetNode() variants which take more than
...
3 SDOperand operands. They are replaced by versions which take an array
of SDOperand and the number of operands.
llvm-svn: 29905
2006-08-27 08:08:54 +00:00
4042e871ce
Fix target matching weights, so that ppc-darwin modules are codegen with the
...
ppc target, not the itanium target, when run on an itanium machine.
This should fix the CodeGen/PowerPC regtest failures on itanium.
llvm-svn: 29903
2006-08-26 21:33:05 +00:00
7851db75d9
Properly size the string table, and emit symbol table and string table
...
entries in the correct order, fixing several fixmes.
llvm-svn: 29902
2006-08-26 15:46:34 +00:00
34b70eea5c
SelectNodeTo now returns a SDNode*.
...
llvm-svn: 29901
2006-08-26 08:00:10 +00:00
61413a3d72
Select() no longer require Result operand by reference.
...
llvm-svn: 29898
2006-08-26 05:34:46 +00:00
122f2bcdc2
Simplifications to liveinterval analysis, no functionality change.
...
llvm-svn: 29896
2006-08-26 01:28:16 +00:00
ab8297f92d
Match tblgen changes.
...
llvm-svn: 29895
2006-08-26 01:07:58 +00:00
2d48722e92
Match tblgen changes; clean up.
...
llvm-svn: 29894
2006-08-26 01:05:16 +00:00
c664efe223
Give a good error message when we try to jit inline asm.
...
llvm-svn: 29891
2006-08-26 00:47:03 +00:00
f4f0b1995c
Completely change the way that joining with physregs is implemented. This
...
paves the way for future changes, increases coallescing opportunities (in
theory, not witnessed in practice), and eliminates the really expensive
LiveIntervals::overlapsAliases method.
llvm-svn: 29890
2006-08-25 23:41:24 +00:00
1b200574ad
Add a comment.
...
llvm-svn: 29889
2006-08-25 23:29:06 +00:00
fb96c74874
Tidy up.
...
llvm-svn: 29888
2006-08-25 22:56:30 +00:00
403b95af47
Fix a crash related to updating Phi nodes in the original header block. This was
...
causing a crash in 175.vpr
llvm-svn: 29887
2006-08-25 22:13:55 +00:00
8e4b029573
Add an assertion to check that we're really preserving LCSSA.
...
llvm-svn: 29886
2006-08-25 22:12:36 +00:00
d7572fb234
Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The
...
asm printer will print it as offset*4. e.g. bne cr0, $+8.
The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.
llvm-svn: 29885
2006-08-25 21:54:44 +00:00
50eac3b8ab
For PR797:
...
Make the Win32 code exception free (untested/uncompiled) which forced some
interface changes which had ripple effect. This should be the last of 797.
llvm-svn: 29884
2006-08-25 21:37:17 +00:00
51e6f68b47
For PR797:
...
Final commit for this bug. This removes the last EH holdouts in LLVM
and turns off exception support by using the -fno-exceptions option. This
leads to the following reduction in library and executable sizes:
DEBUG BUILD RELEASE BUILD
before after delta before after delta
lib 162,328K 157,616K 4,712 17,864K 16,416K 1,448K
bin 571,444K 557,156K 14,288 63,296K 56,996K 6,300K
Debug Improvement: 19,000K (2.59%)
Release Improvement: 7,748K (9.55%)
llvm-svn: 29882
2006-08-25 19:54:53 +00:00
92206f9404
Consolidate callee saved register information so that it can me used by debug
...
information and exception handling.
llvm-svn: 29881
2006-08-25 19:45:51 +00:00
d51ce619c3
Fix some comments.
...
llvm-svn: 29880
2006-08-25 19:40:59 +00:00
f8bf1e6034
Allow for register numbers > 31.
...
llvm-svn: 29879
2006-08-25 19:39:52 +00:00
98dc23fd1f
use @ for comments
...
store LR in an arbitrary stack slot
add support for writing varargs functions
llvm-svn: 29876
2006-08-25 17:55:16 +00:00
f25aebf8cf
For PR797:
...
Remove exception throwing/handling from lib/Bytecode, and adjust its users
to compensate for changes in the interface.
llvm-svn: 29875
2006-08-25 17:43:11 +00:00
8cca95cf5d
Reapply the indvars patch, since nothing blew up last night.
...
llvm-svn: 29874
2006-08-25 17:41:25 +00:00
89fa9c7d65
Get closer to handling globals correctly. We now generally get them in the
...
right section.
llvm-svn: 29871
2006-08-25 06:36:58 +00:00
94446a4267
Revert my previous patch. Since there are some major changes that went in today,
...
I'm going to wait to put this in HEAD until tomorrow, so as not to clutter the nightly
tester.
llvm-svn: 29868
2006-08-25 03:45:57 +00:00
15a6423431
Specify that indvars actually preserve LCSSA. This has been done for a while, but I
...
forgot to put in the analysis usage.
llvm-svn: 29867
2006-08-25 03:32:13 +00:00
ec0f205dc1
For PR797:
...
Remove exception handling from the bytecode archiver and adjust the llvm-ar
tool to accommodate the new interfaces.
llvm-svn: 29866
2006-08-24 23:45:08 +00:00
24d4208c97
When replacing value numbers, make sure to compactify the value # space.
...
llvm-svn: 29865
2006-08-24 23:22:59 +00:00
Devang Patel