Commit Graph

79784 Commits

Author SHA1 Message Date
Alex Lorenz c37baf82a9 Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format).
This commit is a 2nd attempt at committing the initial MIR serialization patch.
The first commit (r237708) made the incremental buildbots unstable and was 
reverted in r237730. The original commit didn't add a terminating null 
character to the LLVM IR source which was passed to LLParser, and this 
sometimes caused the test 'llvmIR.mir' to fail with a parsing error because 
the LLVM IR source didn't have a null character immediately after the end 
and thus LLLexer encountered some garbage characters that ultimately caused 
the error.

This commit also includes the other test fixes I committed in
r237712 (llc path fix) and r237723 (remove target triple) which
also got reverted in r237730.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR 
using the MIR format. This pass is then added as a last pass when a 
'stop-after' option is used in llc. The new library adds the initial 
functionality for parsing of MIR files as well. This commit also 
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616

llvm-svn: 237954
2015-05-21 20:54:45 +00:00
Bill Schmidt e13ac91c5d [PPC64] Handle vpkudum mask pattern correctly when vpkudum isn't available
My recent patch to add support for ISA 2.07 vector pack/unpack
instructions didn't properly check for availability of the vpkudum
instruction when recognizing it as a special vector shuffle case.
This causes us to leave the vector shuffle in place (rather than
converting it to a vector permute) so that it can be recognized later
as a vpkudum, but that pattern is invalid for processors prior to
POWER8.  Thus LLVM crashes with an "unable to select" message.  We
observed this since one of our buildbots is configured to generate
code for a POWER7.

This patch fixes the problem by checking for availability of the
vpkudum instruction during custom lowering of vector shuffles.

I've added a test case variant for the vpkudum pattern when the
instruction isn't available.

llvm-svn: 237952
2015-05-21 20:48:49 +00:00
Rafael Espindola 0a82ad798c Stop creating MCSectionData is the ELF writer.
Now is is just its use of MCSymbolData that requires it to take a non const
MCAssembler.

llvm-svn: 237951
2015-05-21 20:43:13 +00:00
Kostya Serebryany 71e0feb1ac [lib/Fuzzer] ignore flags that start with --; use git pull --rebase instead of just git pull
llvm-svn: 237950
2015-05-21 20:39:13 +00:00
Adrian Prantl 1f599f9f65 IR / debug info: Add a DWOId field to DICompileUnit,
so DWARF skeleton CUs can be expression in IR. A skeleton CU is a
(typically empty) DW_TAG_compile_unit that has a DW_AT_(GNU)_dwo_name and
a DW_AT_(GNU)_dwo_id attribute. It is used to refer to external debug info.

This is a prerequisite for clang module debugging as discussed in
http://lists.cs.uiuc.edu/pipermail/cfe-dev/2014-November/040076.html.
In order to refer to external types stored in split DWARF (dwo) objects,
such as clang modules, we need to emit skeleton CUs, which identify the
dwarf object (i.e., the clang module) by filename (the SplitDebugFilename)
and a hash value, the dwo_id.

This patch only contains the IR changes. The idea is that a CUs with a
non-zero dwo_id field will be emitted together with a DW_AT_GNU_dwo_name
and DW_AT_GNU_dwo_id attribute.

http://reviews.llvm.org/D9488
rdar://problem/20091852

llvm-svn: 237949
2015-05-21 20:37:30 +00:00
Hal Finkel 3b3c9c3e44 [PPC/LoopUnrollRuntime] Don't avoid high-cost trip count computation on the PPC/A2
On X86 (and similar OOO cores) unrolling is very limited, and even if the
runtime unrolling is otherwise profitable, the expense of a division to compute
the trip count could greatly outweigh the benefits. On the A2, we unroll a lot,
and the benefits of unrolling are more significant (seeing a 5x or 6x speedup
is not uncommon), so we're more able to tolerate the expense, on average, of a
division to compute the trip count.

llvm-svn: 237947
2015-05-21 20:30:23 +00:00
Rafael Espindola 883dec058f writeSymbolTable now only needs a MCContext.
It used to use an MCAssembler just to record the alignment of the sections.

llvm-svn: 237944
2015-05-21 19:54:44 +00:00
Rafael Espindola 1aa20fcb41 Pass a const MCAssembler to writeSectionHeader.
It never creates sections, so it can use Asm.getSectionData instead of
Asm.getOrCreateSectionData.

llvm-svn: 237943
2015-05-21 19:46:39 +00:00
Alex Lorenz 481dca2393 YAML: Null terminate block scalar's value.
The commit null terminates the string value in the `yaml::BlockScalarNode`
class.

This change is motivated by the initial MIR serialization commit (r237708)
that I reverted in r237730 because the LLVM IR source from the block
scalar node wasn't terminated by a null character and thus the buildbots
failed on one testcase sometimes. This change enables me to recommit 
the reverted commit. 

llvm-svn: 237942
2015-05-21 19:45:02 +00:00
Rafael Espindola e92c1bfa4b Remove unused argument. NFC.
llvm-svn: 237940
2015-05-21 19:42:35 +00:00
Derek Schuff fcfd5ae82c Fix StreamingMemoryObject to respect known object size.
The existing code for method StreamingMemoryObject.fetchToPos does not respect
the corresonding call to setKnownObjectSize(). As a result, it allows the
StreamingMemoryObject to read bytes past the object size.

This patch provides a test case, and code to fix the problem.

Patch by Karl Schimpf
Differential Revision: http://reviews.llvm.org/D8931

llvm-svn: 237939
2015-05-21 19:40:19 +00:00
Rafael Espindola 286875874a Fetch alignment directly out of MCSection. NFC.
llvm-svn: 237938
2015-05-21 19:36:43 +00:00
Nemanja Ivanovic f02def6cbc Add support for VSX scalar single-precision arithmetic in the PPC target
http://reviews.llvm.org/D9891
Following up on the VSX single precision loads and stores added earlier, this
adds support for elementary arithmetic operations on single precision values
in VSX registers. These instructions utilize the new VSSRC register class.
Instructions added:
xsaddsp
xsdivsp
xsmulsp
xsresp
xsrsqrtesp
xssqrtsp
xssubsp

llvm-svn: 237937
2015-05-21 19:32:49 +00:00
Rafael Espindola 0709a7bd1a Move alignment from MCSectionData to MCSection.
This starts merging MCSection and MCSectionData.

There are a few issues with the current split between MCSection and
MCSectionData.

* It optimizes the the not as important case. We want the production
of .o files to be really fast, but the split puts the information used
for .o emission in a separate data structure.

* The ELF/COFF/MachO hierarchy is not represented in MCSectionData,
leading to some ad-hoc ways to represent the various flags.

* It makes it harder to remember where each item is.

The attached patch starts merging the two by moving the alignment from
MCSectionData to MCSection.

Most of the patch is actually just dropping 'const', since
MCSectionData is mutable, but MCSection was not.

llvm-svn: 237936
2015-05-21 19:20:38 +00:00
Benjamin Kramer e6987bf351 [LoopDistribute] Remove a layer of pointer indirection.
Just store InstPartitions directly into the std::list. No functional change
intended.

llvm-svn: 237930
2015-05-21 18:32:07 +00:00
Sanjay Patel f69f4e42ce use range-based for-loops; NFCI
llvm-svn: 237918
2015-05-21 17:43:26 +00:00
Sanjay Patel 99b3aa3505 use range-based for-loops; NFCI
llvm-svn: 237917
2015-05-21 17:22:45 +00:00
Rafael Espindola fa160c7386 Fix warning on builds without asserts.
llvm-svn: 237915
2015-05-21 17:09:22 +00:00
Sanjay Patel f8c028c0b0 use range-based for-loop
llvm-svn: 237914
2015-05-21 17:04:17 +00:00
Rafael Espindola e2fdf8d60e Avoid unnecessary section switching. NFC.
llvm-svn: 237913
2015-05-21 17:00:40 +00:00
Rafael Espindola e07467901b Remove yet another method of creating begin and end symbol for sections.
I missed this one when first unifying how we handle begin and end symbols.

llvm-svn: 237912
2015-05-21 16:52:32 +00:00
Rafael Espindola beeacd1586 Use existing helper for adding a section. NFC.
llvm-svn: 237909
2015-05-21 16:19:32 +00:00
Sanjay Patel 490aca92be use range-based for-loop; NFCI
llvm-svn: 237908
2015-05-21 16:00:50 +00:00
Manuel Klimek b00d42c10c std::sort must be called with a strict weak ordering.
Found by a debug enabled stl.

llvm-svn: 237906
2015-05-21 15:38:25 +00:00
Elena Demikhovsky 4aed59fc89 AVX-512: Enabled SSE intrinsics on AVX-512.
Predicate UseAVX depricates pattern selection on AVX-512.
This predicate is necessary for DAG selection to select EVEX form.
But mapping SSE intrinsics to AVX-512 instructions is not ready yet.
So I replaced UseAVX with HasAVX for intrinsics patterns.

llvm-svn: 237903
2015-05-21 14:01:32 +00:00
Renato Golin b6b9e05687 Make Triple::parseARMArch use ARMTargetParser
Simplifying Triple::parseARMArch, leaving all the parsing to ARMTargetParser.

This commit also adds AArch64 detection to ARMTargetParser canonicalization,
and a two RedHat arch names (v{6,7}hl, meaning hard-float / little-endian).

Adding enough unit tests to cover the basics. Clang checks fine.

llvm-svn: 237902
2015-05-21 13:52:20 +00:00
Igor Laevsky d83f6976ba [RewriteStatepointsForGC] Fix debug assertion during derivable pointer rematerialization
Correct assertion would be that there is no other uses from chain we are currently cloning. It is ok to have other uses of values not from this chain.

Differential Revision: http://reviews.llvm.org/D9882

llvm-svn: 237899
2015-05-21 13:02:14 +00:00
Artur Pilipenko 0f90c86668 Test commit. Fix typo in MemDerefPrinter.cpp comment.
llvm-svn: 237893
2015-05-21 11:57:38 +00:00
Renato Golin bea5bd18eb Remove unnecessary FIXME comment
It has been fixed by commit r237797.

llvm-svn: 237890
2015-05-21 10:47:56 +00:00
Simon Pilgrim f483abc14e Fixed unused variable warning in non-assert builds from rL237885
llvm-svn: 237889
2015-05-21 10:22:10 +00:00
Simon Pilgrim e054199354 [X86][SSE] Improve support for 128-bit vector sign extension
This patch improves support for sign extension of the lower lanes of vectors of integers by making use of the SSE41 pmovsx* sign extension instructions where possible, and optimizing the sign extension by shifts on pre-SSE41 targets (avoiding the use of i64 arithmetic shifts which require scalarization).

It converts SIGN_EXTEND nodes to SIGN_EXTEND_VECTOR_INREG where necessary, that more closely matches the pmovsx* instruction than the default approach of using SIGN_EXTEND_INREG which splits the operation (into an ANY_EXTEND lowered to a shuffle followed by shifts) making instruction matching difficult during lowering. Necessary support for SIGN_EXTEND_VECTOR_INREG has been added to the DAGCombiner.

Differential Revision: http://reviews.llvm.org/D9848

llvm-svn: 237885
2015-05-21 10:05:03 +00:00
Hal Finkel d249736572 [TableGen] Resolve complex def names inside multiclasses
We had not been trying hard enough to resolve def names inside multiclasses
that had complex concatenations, etc. Now we'll try harder.

Patch by Amaury Sechet!

llvm-svn: 237877
2015-05-21 04:32:56 +00:00
Duncan P. N. Exon Smith 0b73d71abb AsmPrinter: Compute absolute label difference directly
Create a low-overhead path for `EmitLabelDifference()` that emits a
emits an absolute number when (1) the output is an object stream and (2)
the two symbols are in the same data fragment.

This drops memory usage on Mach-O from 975 MB down to 919 MB (5.8%).
The only call is when `!doesDwarfUseRelocationsAcrossSections()` --
i.e., on Mach-O -- since otherwise an absolute offset from the start of
the section needs a relocation.  (`EmitLabelDifference()` is cheaper on
ELF anyway, since it creates 1 fewer temp symbol, and it gets called far
less often.  It's not clear to me if this is even a bottleneck there.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 237876
2015-05-21 02:41:23 +00:00
Ahmed Bougacha 97876fa894 [MemCpyOpt] Do move the memset, but look at its dest's dependencies.
In effect a partial revert of r237858, which was a dumb shortcut.
Looking at the dependencies of the destination should be the proper
fix: if the new memset would depend on anything other than itself,
the transformation isn't correct.

llvm-svn: 237874
2015-05-21 01:43:39 +00:00
Duncan P. N. Exon Smith 5435aa464a MC: Simplify MCSymbolData initialization and remove MCSymbol pointer
Finally remove the `MCSymbolData::Symbol` pointer.  It was still being
used to track whether `MCSymbolData` had been initialized, but this is
better tracked by the bitfield in `MCSymbol`.

The only caller of `MCSymbolData::initialize()` was `MCAssembler`, which
(other than `Symbol`) passed in all-0 values.  Replace all that
indirection with a default constructor.

The main point is a cleanup (and there's more cleanup to do), but there
are also some small memory savings.  I measured ~989 MB down to ~975 MB,
cutting a little over 1% off the top of `llc`.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 237873
2015-05-21 01:33:03 +00:00
Duncan P. N. Exon Smith 24f4775f71 MC: Remove last use of MCSymbolData::getSymbol(), NFC
Remove the last use of `MCSymbolData::getSymbol()`.  There's some
*really* hairy stuff going on in `MachObjectWriter::WriteNList()` that I
want to come back to.  In particular, it updates `Symbol` to point at
its aliasee (if any), but leaves `Data` behind, and it's not clear
whether everything makes sense there.

For now I've left the logic unchanged by adding `OrigSymbol` and moving
the FIXME from r237750 up a bit higher.  I've filed PR23598 to track
looking into this.

llvm-svn: 237867
2015-05-21 00:39:24 +00:00
Ahmed Bougacha 0541c67ae7 [MemCpyOpt] Pass Instruction to IRBuilder, no need for NextNode. NFC.
We're erasing the instructions anyway.

llvm-svn: 237861
2015-05-21 00:08:35 +00:00
David Blaikie f87cc6d3ab [opaque pointer type] Pass explicit pointee type in another case of GEP constant folding
llvm-svn: 237860
2015-05-21 00:06:38 +00:00
Andrew Kaylor cafb89df1e Fix build error
llvm-svn: 237859
2015-05-20 23:58:44 +00:00
Ahmed Bougacha 5e0f425c27 [MemCpyOpt] Don't move the memset when optimizing memset+memcpy.
Fixes PR23599, another miscompile introduced by r235232: when there is
another dependency on the destination of the created memset (i.e., the
part of the original destination that the memcpy doesn't depend on)
between the memcpy and the original memset, we would insert the created
memset after the memcpy, and thus after the other dependency.

Instead, insert the created memset right after the old one.

llvm-svn: 237858
2015-05-20 23:55:16 +00:00
Andrew Kaylor 69fc4418ab Fix build warning
llvm-svn: 237855
2015-05-20 23:28:03 +00:00
Andrew Kaylor a6c5b9682e [WinEH] C++ EH state numbering fixes
Differential Revision: http://reviews.llvm.org/D9787

llvm-svn: 237854
2015-05-20 23:22:24 +00:00
Reid Kleckner 2632f0df48 [WinEH] Store pointers to the LSDA in the exception registration object
We aren't yet emitting the LSDA yet, so this will still fail to
assemble.

llvm-svn: 237852
2015-05-20 23:08:04 +00:00
Pete Cooper a05c082866 Don't generate comments in the DebugLocStream unless required. NFC.
The ByteStreamer here wasn't taking account of whether the asm streamer was text based and verbose.  Only with that combination should we emit comments.

This change makes sure that we only actually convert a Twine to a string using Twine::str() if we need the comment.  This saves about 10000 small allocations on a test case involving the verify-use_list-order bitcode going through llc with debug info.

Note, this is NFC as the comments would ultimately never be emitted unless required.

Reviewed by Duncan Exon Smith and David Blaikie.

llvm-svn: 237851
2015-05-20 22:51:27 +00:00
Pete Cooper 477300d333 Revert "Add bool to DebugLocDwarfExpression to control emitting comments."
This reverts commit 0037b6bcbc874aa1b93d7ce3ad8dba3753ee2d9d (r237827).

David Blaikie suggested some alternatives to this which are better.  Reverting to apply a better solution later.

llvm-svn: 237849
2015-05-20 22:37:48 +00:00
Hans Wennborg a8f8df5dd2 Revert r237828 "[X86] Remove unused node after morphing it from shr to and."
This caused assertions during DAG combine: PR23601.

llvm-svn: 237843
2015-05-20 22:31:55 +00:00
David Blaikie 0c28fd7fda [opaque pointer type] Pass explicit type to Load instruction creation in AutoUpgrade
llvm-svn: 237838
2015-05-20 21:46:30 +00:00
Davide Italiano 141b2891cb [Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.
Ideally this is going to be and LLVM IR pass (shared, among others
with AArch64), but for the time being just enable it if consumers
ask us for optimization and not unconditionally.

Discussed with Tim Northover on IRC.

llvm-svn: 237837
2015-05-20 21:40:38 +00:00
Alex Lorenz c6277793dd AsmParser: Require a terminating null character when creating memory buffer.
This commit modifies the memory buffer creation in the AsmParser library so 
that it requires a terminating null character. The LLLexer in the AsmParser
library checks for EOF only when it sees a null character, thus it would
be best to require it when creating a memory buffer so that the memory
buffer constructor can verify that a terminating null character is indeed
present.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun

Differential Revision: http://reviews.llvm.org/D9883

llvm-svn: 237833
2015-05-20 20:41:27 +00:00
David Blaikie 79009f88b4 [opaque pointer type] LoadInst: assert that the explicit type matches the implicit one
llvm-svn: 237830
2015-05-20 20:22:31 +00:00