Commit Graph

362376 Commits

Author SHA1 Message Date
Nico Weber 6a4fd03698 [gn build] (manually) merge 593e1962 2020-08-04 13:05:31 -04:00
Simon Pilgrim 83cb98f9e7 Fix sphinx indentation warnings by adding explicit line breaks to address space hierarchy 2020-08-04 17:48:54 +01:00
Yash Jain 56593fa370 [MLIR] Simplify semi-affine expressions
Simplify semi-affine expression for the operations like ceildiv,
floordiv and modulo by any given symbol by checking divisibilty by that
symbol.

Some properties used in simplification are:

1) Commutative property of the floordiv and ceildiv:
((expr1 floordiv expr2) floordiv expr3 ) = ((expr1 floordiv expr3) floordiv expr2)
((expr1 ceildiv expr2) ceildiv expr3 ) = ((expr1 ceildiv expr3) ceildiv expr2)

While simplification if operations are different no simplification is
possible as there is no property that simplify expressions like these:
((expr1 ceildiv expr2) floordiv expr3) or  ((expr1 floordiv expr2)
ceildiv expr3).

2) If both expr1 and expr2 are divisible by the expr3 then:
(expr1 % expr2) / expr3 = ((expr1 / expr3) % (expr2 / expr3))
where / is divide symbol.

3) If expr1 is divisible by expr2 then expr1 % expr2 = 0.

Signed-off-by: Yash Jain <yash.jain@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D84920
2020-08-04 22:07:18 +05:30
Cameron McInally 724b035fe4 [GlobalISel] Remove redundant FNEG tests.
These tests were made redundant by D85139.
2020-08-04 11:32:15 -05:00
Xing GUO 12605bfd1f [DWARFYAML] Fix unintialized value Is64BitAddrSize. NFC.
This patch fixes the undefined behavior that reported by ubsan.

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/44524/
2020-08-05 00:28:17 +08:00
Matt Arsenault 0de547ed4a AMDGPU/GlobalISel: Ensure subreg is valid when selecting G_UNMERGE_VALUES
Fixes verifier error with SGPR unmerges with 96-bit result types.
2020-08-04 12:27:34 -04:00
Cameron McInally 23adbac9ee [GlobalISel] Don't transform FSUB(-0, X) -> FNEG(X) in GlobalISel.
This patch stops unconditionally transforming FSUB(-0, X) into an FNEG(X) while building the MIR.

This corresponds with the SelectionDAGISel change in D84056.

Differential Revision: https://reviews.llvm.org/D85139
2020-08-04 11:27:09 -05:00
Jonas Devlieghere 041c7b84a4 [lldb/Host] Upstream macOS TCC code
Upstream the code for dealing with TCC introduced in macOS Mojave. This
will make the debuggee instead of the debugger responsible for the
privileges it needs.

Differential revision: https://reviews.llvm.org/D85217
2020-08-04 09:23:54 -07:00
Sanjay Patel a16882047a [InstSimplify] refactor min/max folds with shared operand; NFC 2020-08-04 12:21:05 -04:00
Florian Hahn 05aa29efd7 [docs] Mention LLVM_ENABLE_MODULES. 2020-08-04 16:59:39 +01:00
Matt Arsenault 444401c31f GlobalISel: Hack a test to avoid a bug introducing a verifier error
There seems to be an unrelated CSEMIRBuilder bug that was causing
expensive checks failures in this case. Hack the test to avoid this
problem for now until that's fixed.
2020-08-04 11:57:04 -04:00
Fangrui Song 593e196297 [llvm-symbolizer] Switch command line parsing from llvm::cl to OptTable
for the advantage outlined by D83639 ([OptTable] Support grouped short options)

Some behavior changes:

* -i={0,false} is removed. Use --no-inlines instead.
* --demangle={0,false} is removed. Use --no-demangle instead
* -untag-addresses={0,false} is removed. Use --no-untag-addresses instead

Added a higher level API OptTable::parseArgs which handles optional
initial options populated from an environment variable, expands response
files recursively, and parses options.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D83530
2020-08-04 08:53:15 -07:00
AndreyChurbanov 4a04bc8995 [OpenMP] Don't use MSVC workaround with MinGW
Patch by mati865@gmail.com

Differential Revision: https://reviews.llvm.org/D85210
2020-08-04 18:48:25 +03:00
Yonghong Song 6d67506964 [clang][BPF] support type exist/size and enum exist/value relocations
This patch added the following additional compile-once
run-everywhere (CO-RE) relocations:
  - existence/size of typedef, struct/union or enum type
  - enum value and enum value existence

These additional relocations will make CO-RE bpf programs more
adaptive for potential kernel internal data structure changes.

For existence/size relocations, the following two code patterns
are supported:
  1. uint32_t __builtin_preserve_type_info(*(<type> *)0, flag);
  2. <type> var;
     uint32_t __builtin_preserve_field_info(var, flag);
flag = 0 for existence relocation and flag = 1 for size relocation.

For enum value existence and enum value relocations, the following code
pattern is supported:
  uint64_t __builtin_preserve_enum_value(*(<enum_type> *)<enum_value>,
                                         flag);
flag = 0 means existence relocation and flag = 1 for enum value.
relocation. In the above <enum_type> can be an enum type or
a typedef to enum type. The <enum_value> needs to be an enumerator
value from the same enum type. The return type is uint64_t to
permit potential 64bit enumerator values.

Differential Revision: https://reviews.llvm.org/D83242
2020-08-04 08:39:53 -07:00
Nemanja Ivanovic 14d726acd6 [PowerPC] Don't remove single swap between the load and store
The swap removal pass looks to remove swaps when a loaded value is swapped, some
number of lane-insensitive operations are performed and then the value is
swapped again and stored.

However, in a situation where we load the value, swap it and then store it
without swapping again, the pass erroneously removes the single swap. The
reason is that both checks in the same equivalence class:

- load feeds a swap
- swap feeds a store

pass. However, there is no check that the two swaps are actually a single swap.
This patch just fixes that.

Differential revision: https://reviews.llvm.org/D84785
2020-08-04 10:38:15 -05:00
Simon Pilgrim 5e0a9dc0ad Separate code-block tag with a newline to fix code snippet html output 2020-08-04 16:36:00 +01:00
Simon Pilgrim cc0b670abf Fix sphinx "Title underline too short" warning 2020-08-04 16:36:00 +01:00
Jay Foad 28e322ea93 [PowerPC] Custom lowering for funnel shifts
The custom lowering saves an instruction over the generic expansion, by
taking advantage of the fact that PowerPC shift instructions are well
defined in the shift-by-bitwidth case.

Differential Revision: https://reviews.llvm.org/D83948
2020-08-04 16:30:49 +01:00
Jordan Rupprecht 817b3a6fe3 [test] Use abspath instead of realpath sometimes
In these two cases, use of `os.path.realpath` is problematic:

- The name of the compiler is significant [1] . For testing purposes, we might
  provide a compiler called "clang" which is actually a symlink to some build
  script (which does some flag processing before invoking the real clang). The
  destination the symlink may not be called "clang", but we still want it to be
  treated as such.
- When using a build system that puts build artifacts in an arbitrary build
  location, and later creates a symlink for it (e.g. creates a
  "<lldb root>/lldbsuite/test/dotest.py" symlinks that points to
  "/build/artifact/<hash>/dotest.py"), looking at the realpath will not match
  the "test" convention required here.

[1] See `Makefile.rules` in the lldb tree, e.g. we use different flags if the compiler is named "clang"

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D85175
2020-08-04 08:20:50 -07:00
Jay Foad 8ec8ad868d [AMDGPU] Use fma for lowering frem
This gives shorter f64 code and perhaps better accuracy.

Differential Revision: https://reviews.llvm.org/D84516
2020-08-04 16:18:23 +01:00
Jay Foad ee75cf36bb [AMDGPU] Generate frem test checks
Differential Revision: https://reviews.llvm.org/D84515
2020-08-04 16:18:23 +01:00
Simon Pilgrim 6e727551b9 Fix sphinx indentation warning to stop newline in byref section html output. 2020-08-04 16:12:50 +01:00
Simon Pilgrim 6f0da46d53 [X86] getFauxShuffleMask - drop unnecessary computeKnownBits OR(X,Y) shuffle decoding.
Now that rG47cea9e82dda941e lets us aggressively decode multi-use shuffles for the OR(SHUFFLE(),SHUFFLE()) case we don't need the computeKnownBits variant any more.
2020-08-04 15:57:47 +01:00
Simon Pilgrim feb9d8bd8e Fix sphinx indentation warning.
Don't double indent and make it clear we're referting to the latency mode.
2020-08-04 15:57:46 +01:00
Erich Keane 0a8ac91a08 Permit nowthrow and nonnull with multiversioning.
Some shipped versions of stdlib.h use nonnull and nothrow with function
multiversioning.  Support these, as they are generally harmless.
2020-08-04 07:40:27 -07:00
Erich Keane 961da69d7e Improve diagnostics for disallowed attributes used with multiversioning
Since we permit using SOME attributes (at the moment, just 1) with
multiversioning, we should improve the message as it still implies that
no attributes should be combined with multiversioning.
2020-08-04 07:40:27 -07:00
Eduardo Caldas 8ce15f7eeb [SyntaxTree] Fix crash on pointer to member function
Differential Revision: https://reviews.llvm.org/D85146
2020-08-04 14:31:12 +00:00
Nicolas Vasilache 2d0b05969b [mlir][Vector] Relax condition for `splitFullAndPartialTransferPrecondition`
The `splitFullAndPartialTransferPrecondition` has a restrictive condition to
prevent the pattern to be applied recursively if it is nested under an scf.IfOp.
Relaxing the condition to the immediate parent op must not be an scf.IfOp lets
the pattern be applied more generally while still preventing recursion.

Differential Revision: https://reviews.llvm.org/D85209
2020-08-04 10:06:21 -04:00
Eduardo Caldas 860cbbdd6b [SyntaxTree] Add support for `LiteralExpression`
We use inheritance to model the grammar's disjunction rule:
literal:
  integer-literal
  character-literal
  floating-point-literal
  string-literal
  boolean-literal
  pointer-literal
  user-defined-literal

Differential Revision: https://reviews.llvm.org/D85186
2020-08-04 14:05:09 +00:00
Nemanja Ivanovic 62a933b72c [Support][PPC] Fix bot failures due to cd53ded557
Commit https://reviews.llvm.org/rGcd53ded557c3 attempts to fix the
computation in computeHostNumPhysicalCores() to respect Affinity.
However, the GLIBC wrapper of the affinity system call fails with
a default size of cpu_set_t on systems that have more than 1024 CPUs.
This just fixes the computation on such large machines.
2020-08-04 09:00:49 -05:00
Haojian Wu 1c0a0dfa02 [Concepts] Include the found concept decl when dumping the ConceptSpecializationExpr
Differential Revision: https://reviews.llvm.org/D85124
2020-08-04 15:58:12 +02:00
Simon Pilgrim 051f293b78 [X86] Remove unused canScaleShuffleElements helper
The only use was removed at rG36750ba5bd0e9e72

Thanks to @nemanjai for the heads up
2020-08-04 14:51:23 +01:00
Simon Pilgrim 36750ba5bd [X86][AVX] isHorizontalBinOp - relax lane-crossing limits for AVX1-only targets.
Permit lane-crossing post shuffles on AVX1 targets as long as every element comes from the same source lane, which for v8f32/v4f64 cases can be efficiently lowered with the LowerShuffleAsLanePermuteAnd* style methods.
2020-08-04 14:27:01 +01:00
Russell Gallop 98827feddb [lit] Add --time-trace-output to lit
This produces a chrome://tracing compatible trace file in the same way
as -ftime-trace.

This can be useful in optimising test time where one long test is causing
long overall test time on a wide machine.

This also helped in finding tests which have side effects on others
(e.g. https://reviews.llvm.org/D84885).

Differential Revision: https://reviews.llvm.org/D84931
2020-08-04 14:25:23 +01:00
Nicolas Vasilache 1a4263d394 [mlir][Vector] Add linalg.copy-based pattern for splitting vector.transfer_read into full and partial copies.
This revision adds a transformation and a pattern that rewrites a "maybe masked" `vector.transfer_read %view[...], %pad `into a pattern resembling:

```
   %1:3 = scf.if (%inBounds) {
      scf.yield %view : memref<A...>, index, index
    } else {
      %2 = linalg.fill(%extra_alloc, %pad)
      %3 = subview %view [...][...][...]
      linalg.copy(%3, %alloc)
      memref_cast %extra_alloc: memref<B...> to memref<A...>
      scf.yield %4 : memref<A...>, index, index
   }
   %res= vector.transfer_read %1#0[%1#1, %1#2] {masked = [false ... false]}
```
where `extra_alloc` is a top of the function alloca'ed buffer of one vector.

This rewrite makes it possible to realize the "always full tile" abstraction where vector.transfer_read operations are guaranteed to read from a padded full buffer.
The extra work only occurs on the boundary tiles.
2020-08-04 08:46:08 -04:00
Sanjay Patel 04e45ae1c6 [InstSimplify] fold nested min/max intrinsics with constant operands
This is based on the existing code for the non-intrinsic idioms
in InstCombine.

The vector constant constraint is non-obvious: undefs should be
ok in the outer call, but they can't propagate safely from the
inner call in all cases. Example:

https://alive2.llvm.org/ce/z/-2bVbM
  define <2 x i8> @src(<2 x i8> %x) {
  %0:
    %m = umin <2 x i8> %x, { 7, undef }
    %m2 = umin <2 x i8> { 9, 9 }, %m
    ret <2 x i8> %m2
  }
  =>
  define <2 x i8> @tgt(<2 x i8> %x) {
  %0:
    %m = umin <2 x i8> %x, { 7, undef }
    ret <2 x i8> %m
  }
  Transformation doesn't verify!
  ERROR: Value mismatch

  Example:
  <2 x i8> %x = < undef, undef >

  Source:
  <2 x i8> %m = < #x00 (0)	[based on undef value], #x00 (0) >
  <2 x i8> %m2 = < #x00 (0), #x00 (0) >

  Target:
  <2 x i8> %m = < #x07 (7), #x10 (16) >
  Source value: < #x00 (0), #x00 (0) >
  Target value: < #x07 (7), #x10 (16) >
2020-08-04 08:44:48 -04:00
Alex Zinenko cb9f9df5f8 [mlir] Fix GCC5 compilation problem in MLIR->LLVM type translation
GCC5 seems to dislike generic lambdas calling a method of the class
containing the lambda without explicit `this`.
2020-08-04 14:42:17 +02:00
Alex Zinenko ec1f4e7c3b [mlir] switch the modeling of LLVM types to use the new mechanism
A new first-party modeling for LLVM IR types in the LLVM dialect has been
developed in parallel to the existing modeling based on wrapping LLVM `Type *`
instances. It resolves the long-standing problem of modeling identified
structure types, including recursive structures, and enables future removal of
LLVMContext and related locking mechanisms from LLVMDialect.

This commit only switches the modeling by (a) renaming LLVMTypeNew to LLVMType,
(b) removing the old implementaiton of LLVMType, and (c) updating the tests. It
is intentionally minimal. Separate commits will remove the infrastructure built
for the transition and update API uses where appropriate.

Depends On D85020

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85021
2020-08-04 14:29:25 +02:00
Sanjay Patel 011e15bea3 [InstSimplify] add tests for min/max with constants; NFC 2020-08-04 08:02:33 -04:00
Sanjay Patel 20c71e55aa [InstSimplify] reduce code for min/max analysis; NFC
This should probably be moved up to some common area eventually
when there's another user.
2020-08-04 08:02:33 -04:00
Alex Zinenko 6abd7e2e62 [mlir] provide same APIs as existing LLVMType in the new LLVM type modeling
These are intended to smoothen the transition and may be removed in the future
in favor of more MLIR-compatible APIs. They intentionally have the same
semantics as the existing functions, which must remain stable until the
transition is complete.

Depends On D85019

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D85020
2020-08-04 13:49:14 +02:00
Alex Zinenko d4fbbab2e4 [mlir] translate types between MLIR LLVM dialect and LLVM IR
With new LLVM dialect type modeling, the dialect types no longer wrap LLVM IR
types. Therefore, they need to be translated to and from LLVM IR during export
and import. Introduce the relevant functionality for translating types. It is
currently exercised by an ad-hoc type translation roundtripping test that will
be subsumed by the actual translation test when the type system transition is
complete.

Depends On D84339

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D85019
2020-08-04 13:42:43 +02:00
Alexander Belyaev 8979a9cdf2 [mlir] Fix adding wrong operand value in `promoteMemRefDescriptors`.
The bug was not noticed because we didn't have a lot of custom type conversions
directly to LLVM dialect.

Differential Revision: https://reviews.llvm.org/D85192
2020-08-04 13:39:56 +02:00
George Mitenkov f003b28363 [MLIR][SPIRVToLLVM] Indentation and style fix in tests
This is a first patch that sweeps over tests to fix
indentation (tabs to spaces). It also adds label checks and
removes redundant matching of `%{{.*}} = `.

The following tests have been fixed:
- arithmetic-ops-to-llvm
- bitwise-ops-to-llvm
- cast-ops-to-llvm
- comparison-ops-to-llvm
- logical-ops-to-llvm (renamed to match the rest)

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D85181
2020-08-04 14:30:49 +03:00
Juneyoung Lee 998c0efee0 [JumpThreading] Update test freeze.ll; NFC 2020-08-04 20:27:54 +09:00
Sander de Smalen bb3344c7d8 [AArch64][SVE] Add missing unwind info for SVE registers.
This patch adds a CFI entry for each SVE callee saved register
that needs unwind info at an offset from the CFA. The offset is
a DWARF expression because the offset is partly scalable.

The CFI entries only cover a subset of the SVE callee-saves and
only encodes the lower 64-bits, thus implementing the lowest
common denominator ABI. Existing unwinders may support VG but
only restore the lower 64-bits.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D84044
2020-08-04 11:47:06 +01:00
Sander de Smalen fd6584a220 [AArch64][SVE] Fix CFA calculation in presence of SVE objects.
The CFA is calculated as (SP/FP + offset), but when there are
SVE objects on the stack the SP offset is partly scalable and
should instead be expressed as the DWARF expression:

     SP + offset + scalable_offset * VG

where VG is the Vector Granule register, containing the
number of 64bits 'granules' in a scalable vector.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D84043
2020-08-04 11:47:06 +01:00
Xing GUO 79b44a4d47 [YAMLTraits] Fix mapping <none> value that followed by comments.
When mapping an optional value, if the value is <none> and followed
by comments, there will be a parsing error. This patch helps fix this
issue.

e.g.,

When mapping the following YAML,

```
Sections:
  - Name:  blah
    Type:  SHT_foo
    Flags: [[FLAGS=<none>]] ## some comments.
```

the raw value of `ScalarNode` is "<none> " rather than "<none>". We need
to remove the spaces.

Differential Revision: https://reviews.llvm.org/D85180
2020-08-04 18:36:05 +08:00
Paul Walker 4be13b15d6 [SVE] Replace remaining _MERGE_OP1 nodes with _PRED variants.
This is the final bit of work to relax the register allocation
requirements when code generating normal LLVM IR, which rarely
care about the result of inactive lanes. By using _PRED nodes
we can make better use of SVE's reversed instructions.

Also removes a redundant parameter from the min/max tests.

Differential Revision: https://reviews.llvm.org/D85142
2020-08-04 11:19:17 +01:00
Juneyoung Lee e734e8286b [JumpThreading] Remove cast's constraint
As discussed in D84949, this removes the constraint to cast since it does not
cause compile time degradation.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D85188
2020-08-04 19:09:25 +09:00