* Use new FunctionFrameInfo object to manage stack slots instead of doing
it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments
* Use a bitvector to keep track of registers used instead of a set
* Fix problem where explicitly referenced registers would be added to
regsused set and never removed
llvm-svn: 5196
* Use new FunctionFrameInfo object to manage stack slots instead of doing
it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments
llvm-svn: 5195
* Include contents of X86RegisterClasses.cpp into here
* Adjustments to register api to work with new frame manager
* Eliminate moveImm2Reg, getFramePointer, and getStackPointer
* Cleanup and simplify prolog/epilog code generation
* Prolog/epilog are MUCH more efficient now.
llvm-svn: 5186
* Remove some size suffixes [bwl]
* Add new ADJCALLSTACKDOWN & ADJCALLSTACKUP pseudo instrs
* Call instructions are M_CALL not M_BRANCH!
* Disable push and pop instructions
* Add new ANDri32 instr
llvm-svn: 5183
* Frame information is now stuck in MachineFunctionInfo instead of directly
in MachineFunction.
* Don't require a TM as an argument to the ctor
llvm-svn: 5172
* Add comments
* Add a new allocation_order iterator for register classes which targets may
use to control the register order and available registers based on properties
of the function being compiled.
* Remove access to FP and SP registers
* Add new callframe setup opcode support
* Eliminate moveImm2Reg method
* Revamp frame offset handling and prolog/epilog code generation
llvm-svn: 5167
* Mark CALLpcrel as a RawFrm instruction as required
* Eliminate invalid BSWAP16 instruction
* Add xchg instructions
* Add initial support for FP instructions
llvm-svn: 5153
Chris Lattner