8f06e7dea4
[ms-inline asm] Add a few typedefs to simplify future changes.
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llvm-svn: 165324
2012-10-05 18:41:14 +00:00
98c61711c6
tblgen: Replace uses of dynamic_cast<XXXRecTy> with dyn_cast<>.
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This is a mechanical change of dynamic_cast<> to dyn_cast<>. A number of
these uses are actually more like isa<> or cast<>, and will be changed
to the semanticaly appropriate one in a future patch.
llvm-svn: 165291
2012-10-05 03:31:58 +00:00
9e1deb69b9
Added instregex support to TableGen subtarget emitter.
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This allows the processor-specific machine model to override selected
base opcodes without any fanciness.
e.g. InstRW<[CoreXWriteVANDP], (instregex "VANDP")>.
llvm-svn: 165180
2012-10-03 23:06:32 +00:00
da984b1aa9
TableGen subtarget emitter, nearly first class support for SchedAlias.
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A processor can now arbitrarily alias one SchedWrite onto
another. Only the SchedAlias definition need be within the processor
model. The aliased SchedWrite may be a SchedVariant, WriteSequence, or
transitively refer to another alias.
llvm-svn: 165179
2012-10-03 23:06:28 +00:00
7aba6beae5
Cleanup TableGen subtarget emitter.
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llvm-svn: 165178
2012-10-03 23:06:25 +00:00
bd5974e7ae
[ms-inline asm] Default to the 'm' constraint. This matches the behavior of the
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MSVC compiler.
llvm-svn: 165174
2012-10-03 22:18:38 +00:00
a3bf561384
tblgen: Migrate llvm-tblgen to new TableGenMain API.
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llvm-svn: 165166
2012-10-03 21:29:19 +00:00
380a74a339
Fix 80-column violations. Cleanup whitespace in generated code.
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llvm-svn: 164983
2012-10-02 00:25:57 +00:00
f4e35dc672
[ms-inline asm] Add the convertToMapAndConstraints() function that is used to
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map constraints and MCInst operands to inline asm operands. This replaces the
getMCInstOperandNum() function.
The logic to determine the constraints are not in place, so we still default to
a register constraint (i.e., "r"). Also, we no longer build the MCInst but
rather return just the opcode to get the MCInstrDesc.
llvm-svn: 164979
2012-10-01 23:45:51 +00:00
91ce36c986
Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
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llvm-svn: 164768
2012-09-27 10:14:43 +00:00
721cffd53a
Fix a typo 'iff' => 'if'
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llvm-svn: 164767
2012-09-27 09:59:43 +00:00
c4734c8950
Rather then have a wrapper function, have tblgen instantiate the implementation.
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Also remove an unused argument.
llvm-svn: 164567
2012-09-24 22:57:55 +00:00
3cb355d11f
Rather then have a wrapper function, have tblgen instantiate the implementation.
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llvm-svn: 164548
2012-09-24 19:32:29 +00:00
9257b8f8bb
Machine Model (-schedmodel only). Added SchedAliases.
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Allow subtargets to tie SchedReadWrite types to processor specific
sequences or variants.
llvm-svn: 164451
2012-09-22 02:24:21 +00:00
17ede627f0
[ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.
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llvm-svn: 164420
2012-09-21 22:21:26 +00:00
2ac9fd0a82
Whitespace.
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llvm-svn: 164406
2012-09-21 19:25:59 +00:00
6e9fcd6215
Clarify comment.
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llvm-svn: 164371
2012-09-21 15:26:34 +00:00
75e29c4b78
Add in new data types that are used by AMDIL/ANL among others.
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llvm-svn: 164261
2012-09-19 22:47:07 +00:00
dee6583dfd
Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub).
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llvm-svn: 164256
2012-09-19 22:15:06 +00:00
3f23c1a8b9
Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L.
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llvm-svn: 164204
2012-09-19 06:37:45 +00:00
cfe222c2a9
SchedMachineModel: compress the CPU's WriteLatencyTable.
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llvm-svn: 164199
2012-09-19 04:43:19 +00:00
835139bfe4
Iterate deterministicaly over ClassInfo*'s
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Fixes an observed instance of nondeterministic TableGen output.
Review by Jakob.
llvm-svn: 164191
2012-09-19 01:47:03 +00:00
c8f5657f91
Iterate deterministically over register classes
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Fixes an observed instance of nondeterministic TableGen output.
Review by Jakob.
llvm-svn: 164190
2012-09-19 01:47:01 +00:00
a4e2c5fc86
Refactor Record* by-ID comparator to Record.h
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This is a generally useful utility; there's no reason to have it hidden
in CodeGenDAGPatterns.cpp.
Also, rename it to fit the other comparators in Record.h
Review by Jakob.
llvm-svn: 164189
2012-09-19 01:47:00 +00:00
ef878a832b
FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character after the colon.
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llvm-svn: 164165
2012-09-18 20:51:39 +00:00
7ecfa6d960
Make custom operand parsing mnemonic indices use the same mnemonic table as the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets.
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llvm-svn: 164109
2012-09-18 07:02:21 +00:00
e2cfeb30a1
Use variable type for index into mnemonic table. Shrinks size of index field on in tree targets. Saving static data space.
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llvm-svn: 164108
2012-09-18 06:10:45 +00:00
ba7b921fcb
Replaced ReInitMCSubtargetInfo with InitMCProcessor.
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Now where we used to call ReInitMCSubtargetInfo, we actually recompute
the same information as InitMCSubtargetInfo instead of only setting
the feature bits.
llvm-svn: 164105
2012-09-18 05:33:15 +00:00
ea28dbdf93
comment typo
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llvm-svn: 164097
2012-09-18 04:03:30 +00:00
a88f1bddc6
TableGen subtarget emitter. Use getSchedClassIdx.
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llvm-svn: 164096
2012-09-18 03:55:55 +00:00
c6c88151bb
TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants.
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llvm-svn: 164095
2012-09-18 03:41:43 +00:00
1188e439b2
TableGen subtarget emitter. Remove unnecessary header dependence.
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llvm-svn: 164094
2012-09-18 03:32:57 +00:00
ab722bdd50
TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
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llvm-svn: 164092
2012-09-18 03:18:56 +00:00
9150610db7
Mark asm matcher conversion table as const.
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llvm-svn: 164088
2012-09-18 01:41:49 +00:00
aae8fb801e
Fix typo in comment. No functional change.
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llvm-svn: 164086
2012-09-18 01:13:36 +00:00
8038ceb731
Backout the wrong subtarget emitter fix
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llvm-svn: 164078
2012-09-17 23:14:15 +00:00
3e5546add7
Fix release build after reverting
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llvm-svn: 164075
2012-09-17 23:05:04 +00:00
8e7f202e32
Revert r164061-r164067. Most of the new subtarget emitter.
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I have to work out the Target/CodeGen header dependencies
before putting this back.
llvm-svn: 164072
2012-09-17 23:00:42 +00:00
692b87c18f
InitMCProcessor
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llvm-svn: 164066
2012-09-17 22:19:12 +00:00
c00f4314ce
comment typo
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llvm-svn: 164064
2012-09-17 22:19:04 +00:00
36e07eb83e
TableGen subtarget emitter. Use getSchedClassIdx.
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llvm-svn: 164063
2012-09-17 22:19:01 +00:00
7a1faa2c8a
TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants.
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llvm-svn: 164062
2012-09-17 22:18:58 +00:00
0923f8183b
TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
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llvm-svn: 164061
2012-09-17 22:18:55 +00:00
a72fca6bec
TableGen subtarget emitter. Format and emit data tables for the new machine model.
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llvm-svn: 164060
2012-09-17 22:18:50 +00:00
9ef0882b72
TableGen subtarget emitter. Generate data tables for the new machine model.
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Map the CodeGenSchedule object model onto data tables. The structure
of the data tables is defined in MC, so for convenience we include
MCSchedule.h. The alternative is maintaining a redundant copy of the
table structure definitions. Mapping the object model onto data tables
is sufficiently complicated that it should not be interleaved with
emitting source code. This avoids major problem with the backend for
itinerary generation.
llvm-svn: 164059
2012-09-17 22:18:48 +00:00
23f3c65e4b
TableGen subtarget emitter. Emit processor resources for the new machine model.
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llvm-svn: 164058
2012-09-17 22:18:45 +00:00
8fa00f5069
TableGen subtarget parser: Add getProcResourcesIdx().
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llvm-svn: 164057
2012-09-17 22:18:43 +00:00
4c36349de9
TableGen: Add initializer.
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Keep GCC's warnings happy. It can't reason out that the state machine won't
ever hit the potentially uninitialized use in OPC_FilterValue.
llvm-svn: 164041
2012-09-17 18:00:53 +00:00
4a1270691e
Fix a few vars that can end up being used without initialization.
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The cases where no initialization happens should still be checked for logic flaws.
llvm-svn: 164032
2012-09-17 14:20:57 +00:00
ebeedd0ed6
Fix typo
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llvm-svn: 164012
2012-09-17 04:43:39 +00:00
Chad Rosier