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519 Commits

Author SHA1 Message Date
Rafael Espindola 95035cf001 implement LowerConstantPool and LowerGlobalAddress 
llvm-svn: 29433
 2006-08-01 12:58:43 +00:00
Evan Cheng b572401bea Remove InFlightSet hack. No longer needed. 
llvm-svn: 29373
 2006-07-28 00:47:19 +00:00
Rafael Espindola 8902fd702b implement function calling of functions with up to 4 arguments 
llvm-svn: 29274
 2006-07-25 20:17:20 +00:00
Rafael Espindola 75269be065 skeleton of a lowerCall implementation for ARM 
llvm-svn: 29159
 2006-07-16 01:02:57 +00:00
Rafael Espindola 185c5c2bdf add the memri memory operand 
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
 2006-07-11 11:36:48 +00:00
Rafael Espindola e40a7e2aa2 create the raddr addressing mode that matches any register and the frame index 
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot

llvm-svn: 29079
 2006-07-10 01:41:35 +00:00
Rafael Espindola f6f5aff038 handle the "mov reg1, reg2" case in isMoveInstr 
llvm-svn: 28945
 2006-06-27 21:52:45 +00:00
Rafael Espindola 4e76015e0b lower more then 4 formal arguments. The offset is currently hard coded. 
implement SelectFrameIndex

llvm-svn: 28751
 2006-06-12 12:28:08 +00:00
Rafael Espindola 6306becc49 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch

llvm-svn: 28691
 2006-06-05 22:26:14 +00:00
Rafael Espindola 5bc60da112 Expand ret into "CopyToReg;BRIND" 
llvm-svn: 28559
 2006-05-30 17:33:19 +00:00
Evan Cheng a3add0fea8 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Rafael Espindola 4781610886 port the ARM backend to use ISD::CALL instead of LowerCallTo 
llvm-svn: 28469
 2006-05-25 11:00:18 +00:00
Evan Cheng 4af59dac0b Assert if InflightSet is not cleared after instruction selecting a BB. 
llvm-svn: 28459
 2006-05-25 00:24:28 +00:00
Evan Cheng 1a8e74d113 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.

llvm-svn: 28454
 2006-05-24 20:46:25 +00:00
Chris Lattner aa2372562e Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
 2006-05-24 17:04:05 +00:00
Rafael Espindola 27f8bdc7e5 implement minimal versions of 
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr

llvm-svn: 28431
 2006-05-23 02:48:20 +00:00
Rafael Espindola b15597b59a implement movri 
add a stub LowerFORMAL_ARGUMENTS

llvm-svn: 28388
 2006-05-18 21:45:49 +00:00
Rafael Espindola 4abf33f56e add an abort after every assert(0) 
llvm-svn: 28310
 2006-05-15 22:34:39 +00:00
Rafael Espindola ffdc24b847 added a skeleton of the ARM backend 
llvm-svn: 28301
 2006-05-14 22:18:28 +00:00