Commit Graph

3 Commits

Author SHA1 Message Date
kamlesh kumar e31ccee1b0 [RISCV-V] Provide muldi3 builtin assembly implementation
Provides an assembly implementation of muldi3 for RISC-V, to solve bug 43388.
Since the implementation is the same as for mulsi3, that code was moved to
`riscv/int_mul_impl.inc` and is now reused by both `mulsi3.S` and `muldi3.S`.

Differential Revision: https://reviews.llvm.org/D80465
2020-06-02 21:04:55 +01:00
Chandler Carruth 57b08b0944 Update more file headers across all of the LLVM projects in the monorepo
to reflect the new license. These used slightly different spellings that
defeated my regular expressions.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351648
2019-01-19 10:56:40 +00:00
Shiva Chen 77f19a384c [PATCH] [compiler-rt, RISCV] Support builtins for RISC-V
Summary:
Support builtins for RISC-V, RV32 and RV64.

Reviewers: asb, apazos, mgrang

Differential Revision: https://reviews.llvm.org/D42958

llvm-svn: 326420
2018-03-01 07:47:27 +00:00