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118 Commits

Author SHA1 Message Date
Craig Topper 05948fb36c [AVX-512] Correct ExeDomain for many AVX-512 instructions. 
llvm-svn: 277416
 2016-08-02 05:11:15 +00:00
Craig Topper 4c53e60360 [AVX512] Add VLX packed move instructions to the execution dependency fix pass and update tests. 
llvm-svn: 277304
 2016-07-31 20:20:01 +00:00
Craig Topper f4151bea72 [AVX512] Add initial support for the Execution Domain fixing pass to change some EVEX instructions. 
llvm-svn: 276393
 2016-07-22 05:00:52 +00:00
Craig Topper 5c913e84df [AVX512] Use VMOVAPSZ128rr/VMOVAPS256rr for VR128X/VR256X physreg moves when VLX is supported. 
Ideally we would use VEX encoded moves instead of EVEX if the high 16 registers aren't referenced, but this a good first step.

llvm-svn: 275763
 2016-07-18 06:14:34 +00:00
Craig Topper a6e6febe2c [AVX512] Remove masked logic op intrinsics and autoupgrade them to native IR. 
llvm-svn: 275155
 2016-07-12 05:27:53 +00:00
Matthias Braun 152e7c8b12 VirtRegMap: Replace some identity copies with KILL instructions. 
An identity COPY like this:
   %AL = COPY %AL, %EAX<imp-def>
has no semantic effect, but encodes liveness information: Further users
of %EAX only depend on this instruction even though it does not define
the full register.

Replace the COPY with a KILL instruction in those cases to maintain this
liveness information. (This reverts a small part of r238588 but this
time adds a comment explaining why a KILL instruction is useful).

llvm-svn: 274952
 2016-07-09 00:19:07 +00:00
Simon Pilgrim 4e96fbf3c1 [X86][AVX512] Autoupgrade the BROADCAST intrinsics 
llvm-svn: 274550
 2016-07-05 13:58:47 +00:00
Simon Pilgrim 02d435d2f4 [X86][AVX512] Autoupgrade the VPERMPD/VPERMQ intrinsics 
llvm-svn: 274506
 2016-07-04 14:19:05 +00:00
Simon Pilgrim 9fca300cbe [X86][AVX512] Autoupgrade the VPERMILPD/VPERMILPS intrinsics 
llvm-svn: 274498
 2016-07-04 12:40:54 +00:00
Simon Pilgrim 68ea80649b [X86][AVX512] Add support for VPERMPD/VPERMQ masked shuffle comments 
llvm-svn: 274469
 2016-07-03 18:40:24 +00:00
Simon Pilgrim 1f59076196 [X86][AVX512] Add support for VPERM/VSHUF masked shuffle comments 
llvm-svn: 274462
 2016-07-03 13:55:41 +00:00
Simon Pilgrim 68f438a036 [X86][AVX512] Add support for PMOVZX masked shuffle comments 
llvm-svn: 274461
 2016-07-03 13:33:28 +00:00
Simon Pilgrim 19adee9d84 [X86][AVX512] Autoupgrade the MOVDDUP/MOVSLDUP/MOVSHDUP intrinsics 
llvm-svn: 274439
 2016-07-02 14:42:35 +00:00
Craig Topper 597aa42fec [AVX512] Remove masked unpack intrinsics and autoupgrade to vectorshuffle and selects. 
llvm-svn: 273543
 2016-06-23 07:37:33 +00:00
Craig Topper 283418fbb6 [AVX512] Add patterns for any-extending a mask that use the def of KMOVW/KMOVB without going through an EXTRACT_SUBREG and a MOVZX. 
llvm-svn: 273253
 2016-06-21 07:37:32 +00:00
Craig Topper 0a0fb0fda1 [AVX512] Remove the masked vpcmpeq/vcmpgt intrinsics and autoupgrade them to native icmps. 
llvm-svn: 273240
 2016-06-21 03:53:24 +00:00
Igor Breger e59165ca63 [AVX512] [AVX512/AVX][Intrinsics] Fix Variable Bit Shift Right Arithmetic intrinsic lowering. 
Differential Revision: http://reviews.llvm.org/D20897

llvm-svn: 273138
 2016-06-20 07:05:43 +00:00
Craig Topper 13cf7cac07 [AVX512] Remove maksed pshufd, pshuflw, and phufhw intrinsics and autoupgrade them to selects and shufflevector. 
llvm-svn: 272527
 2016-06-13 02:36:48 +00:00
Craig Topper 200d237e57 [AVX512] Add shuffle comment printing for masked VPERMPD/VPERMQ. 
llvm-svn: 272371
 2016-06-10 05:12:40 +00:00
Craig Topper 89c1761474 [AVX512] Fix shuffle comment printing to handle the masked versions of some shuffles. Previously we were printing the mask operands as the register names. 
llvm-svn: 272367
 2016-06-10 04:48:05 +00:00
Igor Breger f635367e2b [AVX512] Remove masked_move/blendm intrinsic from back-end. 
This is complement patch to D21060.

Differential Revision: http://reviews.llvm.org/D21174

llvm-svn: 272257
 2016-06-09 11:46:55 +00:00
Craig Topper 6f7288dc44 [AVX512] Fix shuffle decode printing for several instructions with write masks. There are still more bugs here with UNPCK and PALIGN for sure. But these were the easiest ones to fix. 
llvm-svn: 272252
 2016-06-09 07:49:08 +00:00
Craig Topper e7ae106147 [AVX512] Ensure EVEX vpshufd, vpshuflw, and vpshufhw have isel priority over the VEX encoded ones. 
llvm-svn: 271629
 2016-06-03 05:31:04 +00:00
Craig Topper 01f53b1773 [AVX512] Fix shuffle comment printing for EVEX encoded PSHUFD, PSHUFHW, and PSHUFLW. 
llvm-svn: 271628
 2016-06-03 05:31:00 +00:00
Craig Topper f10fbfa738 [AVX512] Remove masked load intrinsics. Clang now emits generic masked load intrinsics instead. 
The intrinsics will be autoupgraded to the same generic masked loads.

llvm-svn: 271478
 2016-06-02 04:19:36 +00:00
Igor Breger 73ee8ba9b0 [AVX512] Fix intrinsic vcvtps2ph lowering. 
Differential Revision: http://reviews.llvm.org/D20788

llvm-svn: 271255
 2016-05-31 08:04:21 +00:00
Igor Breger 52bd1d5fcc Fix intrinsic vbroadcast{i32|f32}x2 lowering. 
Differential Revision: http://reviews.llvm.org/D20780

llvm-svn: 271254
 2016-05-31 07:43:39 +00:00
Craig Topper 50f85c22c5 [AVX512] Remove masked store intrinsics. Clang now emits generic masked store intrinsics instead. 
The intrinsics will be autoupgraded to the same generic masked stores.

llvm-svn: 271245
 2016-05-31 01:50:02 +00:00
Igor Breger 23c2090606 [llvm][AVX512][intrinsics] Fix vperm{b|w|d|q|ps|pd} intrinsics. Index is second argument to buildin function but it is first instruction operand. 
Differential Revision: http://reviews.llvm.org/D20515

llvm-svn: 270548
 2016-05-24 11:06:22 +00:00
Michael Zuckerman 11b55b29d1 [Clang][AVX512][intrinsics] Fix vscalef intrinsics. 
Differential Revision: http://reviews.llvm.org/D20324

llvm-svn: 270321
 2016-05-21 11:09:53 +00:00
Craig Topper 22ae353207 [AVX512] Disable AVX2 VPERMD, VPERMQ, VPERMPS, and VPERMPD patterns when AVX512VL is enabled. Also add shuffle comment printing for AVX512VL VPERMPD/VPERMQ to keep some tests that now use these instructions instead of the AVX2 ones. 
llvm-svn: 270317
 2016-05-21 06:07:18 +00:00
Craig Topper 6be70deda3 [AVX512] Disable AVX/AVX2 VBROADCASTSS/VBROADCASTSD patterns when AVX512VL is enabled. 
llvm-svn: 270316
 2016-05-21 05:47:25 +00:00
Craig Topper 1a23a521bb [AVX512] Use update_llc_test_checks to update some tests so we can see all the instruction encodings and ensure everything is with EVEX. 
llvm-svn: 270315
 2016-05-21 05:46:58 +00:00
Craig Topper 73f48f4662 [AVX512] Fix test cases I missed in r270311. 
llvm-svn: 270313
 2016-05-21 03:59:55 +00:00
Craig Topper 258f874bb9 [AVX512] Make the permd intrinsics take a 32-bit immediate to match the software spec. 
llvm-svn: 269579
 2016-05-14 21:13:20 +00:00
Craig Topper d8a9c0d120 [AVX512] Fix types for pshufd intrinsics. The immediate is the second argument and the mask is the 4th argument. Also move the 128/256 tests to the right test file. 
Prior to this the immediate was a strange 16-bits and the 512-bit intrinsic couldn't receive the full 16 mask bits it needs.

llvm-svn: 269526
 2016-05-14 00:47:18 +00:00
Simon Pilgrim 217b886b10 [X86][AVX512] Moved CHECKs inside functions to stop update_llc_test_checks going haywire 
I'm not going to regenerate these anytime soon but do have some diffs to apply that I'd like to do with update_llc_test_checks

llvm-svn: 269420
 2016-05-13 14:47:55 +00:00
Simon Pilgrim 6ce35dd9ea [X86][AVX512] Fixed VPERMILPD/VPERMILPS shuffle comments. 
Fixed incorrect operands indices used to access src registers

llvm-svn: 269221
 2016-05-11 18:53:44 +00:00
Craig Topper e5ce84a33c [AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used. 
llvm-svn: 268884
 2016-05-08 21:33:53 +00:00
Michael Zuckerman 927fdaee88 [LLVM][AVX512]PSRAWI Change imm8 to int. 
Differential Revision: http://reviews.llvm.org/D17705

llvm-svn: 262480
 2016-03-02 12:05:07 +00:00
Michael Zuckerman 433b241570 [LLVM][AVX512] PSRL{DI|QI} Change imm8 to int 
Differential Revision: http://reviews.llvm.org/D17713

llvm-svn: 262353
 2016-03-01 17:46:32 +00:00
Michael Zuckerman 7878888690 [AVX512][PSRAQ][PSRAD] Change imm8 to int. 
Differential Revision: http://reviews.llvm.org/D17692

llvm-svn: 262320
 2016-03-01 11:36:23 +00:00
Michael Zuckerman 724dc3b20c [AVX512][PRORQ][PRORD] Change imm8 to int 
Differential Revision: http://reviews.llvm.org/D17024

llvm-svn: 261198
 2016-02-18 09:52:12 +00:00
Michael Zuckerman 529c27f408 [AVX512][PROLQ][PROLD] Change imm8 to int 
Differential Revision: http://reviews.llvm.org/D16983

llvm-svn: 260101
 2016-02-08 15:13:32 +00:00
Igor Breger 0aeda37464 AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation. 
Differential Revision: http://reviews.llvm.org/D16813

llvm-svn: 260024
 2016-02-07 08:30:50 +00:00
Simon Pilgrim 0acc32a3b3 [X86][AVX512] Added support for VPMOVZX shuffle decoding. 
llvm-svn: 260007
 2016-02-06 19:51:21 +00:00
Michael Zuckerman 1bd7f993fc [AVX512] Adding PTESTNMB/D/W/Q instruction 
Differential Revision: http://reviews.llvm.org/D16520

llvm-svn: 258688
 2016-01-25 14:43:23 +00:00
Michael Zuckerman 19670d479a [AVX512] Adding PTESTMB/W/D/Q instruction 
Differential Revision: http://reviews.llvm.org/D16519

llvm-svn: 258686
 2016-01-25 13:27:32 +00:00
Igor Breger 1e5bafbc82 AVX512: VMOVDQU8/16/32/64 (load) intrinsic implementation. 
Differential Revision: http://reviews.llvm.org/D16137

llvm-svn: 258657
 2016-01-24 08:04:33 +00:00
Igor Breger 7a000f5bb2 AVX512: Masked move intrinsic implementation. 
Implemented intrinsic for the follow instructions (reg move) : VMOVDQU8/16, VMOVDQA32/64, VMOVAPS/PD.

Differential Revision: http://reviews.llvm.org/D16316

llvm-svn: 258398
 2016-01-21 14:18:11 +00:00