Commit Graph

3147 Commits

Author SHA1 Message Date
Rahul Joshi 8893d0816c [MLIR] Change Operation::create() methods to use Value/Type/Block ranges.
- Introduce a new BlockRange class to represent range of blocks (constructible from
  an ArrayRef<Block *> or a SuccessorRange);
- Change Operation::create() methods to use TypeRange for result types, ValueRange for
  operands and BlockRange for successors.

Differential Revision: https://reviews.llvm.org/D86985
2020-09-08 14:19:05 -07:00
Mehdi Amini 97e77ac0ed Add more explicit error message when creating a type or attribute for an unregistered dialect (NFC)
Differential Revision: https://reviews.llvm.org/D87177
2020-09-08 16:59:26 +00:00
Lubomir Litchev e2394245eb Add an option for unrolling loops up to a factor.
Currently, there is no option to allow for unrolling a loop up to a specific factor (specified by the user).
The code for doing that is there and there are benefits when unrolling is done  to smaller loops (smaller than the factor specified).

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D87111
2020-09-08 09:23:38 -07:00
Ehsan Toosi 847299d3f0 [mlir] remove BufferAssignmentPlacer from BufferAssignmentOpConversionPattern
BufferPlacement has been removed, as allocations are no longer placed during the conversion.

Differential Revision: https://reviews.llvm.org/D87079
2020-09-08 13:04:22 +02:00
Benjamin Kramer 307dc7b236 [mlir][VectorOps] Clean up outdated comments. NFCI.
While there
- De-templatify code that can use function_ref
- Make BoundCaptures usable when they're const
- Address post-submit review comment (static function into global namespace)
2020-09-08 12:02:00 +02:00
Jakub Lichman 67b37f571c [mlir] Conv ops vectorization pass
In this commit a new way of convolution ops lowering is introduced.
The conv op vectorization pass lowers linalg convolution ops
into vector contractions. This lowering is possible when conv op
is first tiled by 1 along specific dimensions which transforms
it into dot product between input and kernel subview memory buffers.
This pass converts such conv op into vector contraction and does
all necessary vector transfers that make it work.

Differential Revision: https://reviews.llvm.org/D86619
2020-09-08 08:47:42 +00:00
Frederik Gossen a70f2eb3e3 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.
Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.

See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12

Differential Revision: https://reviews.llvm.org/D86779
2020-09-07 14:39:37 +00:00
Alex Zinenko 1e1a4a4819 [mlir] Take ValueRange instead of ArrayRef<Value> in StructuredIndexed
This was likely overlooked when ValueRange was first introduced. There is no
reason why StructuredIndexed needs specifically an ArrayRef so use ValueRange
for better type compatibility with the rest of the APIs.

Reviewed By: nicolasvasilache, mehdi_amini

Differential Revision: https://reviews.llvm.org/D87127
2020-09-07 15:17:39 +02:00
David Truby 973800dc7c Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings."
This reverts commit 15acdd7543.
2020-09-07 13:37:32 +01:00
Frederik Gossen 15acdd7543 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.
Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.

See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12

Differential Revision: https://reviews.llvm.org/D86779
2020-09-07 12:12:36 +00:00
Frederik Gossen 136eb79a88 [MLIR][Standard] Add `dynamic_tensor_from_elements` operation
With `dynamic_tensor_from_elements` tensor values of dynamic size can be
created. The body of the operation essentially maps the index space to tensor
elements.

Declare SCF operations in the `scf` namespace to avoid name clash with the new
`std.yield` operation. Resolve ambiguities between `linalg/shape/std/scf.yield`
operations.

Differential Revision: https://reviews.llvm.org/D86276
2020-09-07 11:44:43 +00:00
Nicolas Vasilache 8d64df9f13 [mlir][Vector] Revisit VectorToSCF.
Vector to SCF conversion still had issues due to the interaction with the natural alignment derived by the LLVM data layout. One traditional workaround is to allocate aligned. However, this does not always work for vector sizes that are non-powers of 2.

This revision implements a more portable mechanism where the intermediate allocation is always a memref of elemental vector type. AllocOp is extended to use the natural LLVM DataLayout alignment for non-scalar types, when the alignment is not specified in the first place.

An integration test is added that exercises the transfer to scf.for + scalar lowering with a 5x5 transposition.

Differential Revision: https://reviews.llvm.org/D87150
2020-09-07 05:19:43 -04:00
zhanghb97 54d432aa6b [mlir] Add Shaped Type, Tensor Type and MemRef Type to python bindings.
Based on the PyType and PyConcreteType classes, this patch implements the bindings of Shaped Type, Tensor Type and MemRef Type subclasses.
The Tensor Type and MemRef Type are bound as ranked and unranked separately.
This patch adds the ***GetChecked C API to make sure the python side can get a valid type or a nullptr.
Shaped type is not a kind of standard types, it is the base class for vectors, memrefs and tensors, this patch binds the PyShapedType class as the base class of Vector Type, Tensor Type and MemRef Type subclasses.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D87091
2020-09-06 11:45:54 -07:00
Lei Zhang 7d53fecb67 [spirv] Add more target and resource limit fields
These fields will be used to choose/influence patterns for
SPIR-V code generation.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D87106
2020-09-04 10:26:34 -04:00
Alex Zinenko aec9e20a3e [mlir] introduce type constraints for operands of LLVM dialect operations
Historically, the operations in the MLIR's LLVM dialect only checked that the
operand are of LLVM dialect type without more detailed constraints. This was
due to LLVM dialect types wrapping LLVM IR types and having clunky verification
methods. With the new first-class modeling, it is possible to define type
constraints similarly to other dialects and use them to enforce some
correctness rules in verifiers instead of having LLVM assert during translation
to LLVM IR. This hardening discovered several issues where MLIR was producing
LLVM dialect operations that cannot exist in LLVM IR.

Depends On D85900

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D85901
2020-09-04 10:01:59 +02:00
Mehdi Amini 23bcfbcc98 Add comment to describe a field member (NFC)
Address post-review comment.
2020-09-04 05:25:35 +00:00
aartbik 060c9dd1cc [mlir] [VectorOps] Improve SIMD compares with narrower indices
When allowed, use 32-bit indices rather than 64-bit indices in the
SIMD computation of masks. This runs up to 2x and 4x faster on
a number of AVX2 and AVX512 microbenchmarks.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D87116
2020-09-03 21:43:38 -07:00
Lei Zhang 8d420fb3a0 [spirv][nfc] Simplify resource limit with default values
These deafult values are gotten from Vulkan required limits.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D87090
2020-09-03 13:29:26 -04:00
Zhibin Li 1e21ca4d25 [spirv] Add SPIR-V GLSL extended Round op
Reviewed By: mravishankar, antiagainst

Differential Revision: https://reviews.llvm.org/D86914
2020-09-03 09:42:35 -04:00
Ling, Liyang 2860b2c14b [mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps
Reviewed By: mravishankar, antiagainst

Differential Revision: https://reviews.llvm.org/D86929
2020-09-03 09:28:34 -04:00
Mehdi Amini c0b6bc070e Decouple OpPassManager from the the MLIRContext (NFC)
This is allowing to build an OpPassManager from a StringRef instead of an
Identifier, which enables building pipelines without an MLIRContext.
An identifier is still cached on-demand on the OpPassManager for efficiency
during the IR traversal.
2020-09-03 06:02:05 +00:00
Artur Bialas d9b4245f56 [mlir][spirv] Add block read and write from SPV_INTEL_subgroups
Added support to OpSubgroupBlockReadINTEL and OpSubgroupBlockWriteINTEL

Differential Revision: https://reviews.llvm.org/D86876
2020-09-02 20:06:59 -07:00
Diego Caballero 46781630a3 [MLIR][Affine][VectorOps] Vectorize uniform values in SuperVectorizer
This patch adds basic support for vectorization of uniform values to SuperVectorizer.
For now, only invariant values to the target vector loops are considered uniform. This
enables the vectorization of loops that use function arguments and external definitions
to the vector loops. We could extend uniform support in the future if we implement some
kind of divergence analysis algorithm.

Reviewed By: nicolasvasilache, aartbik

Differential Revision: https://reviews.llvm.org/D86756
2020-09-03 01:17:06 +03:00
Mehdi Amini 1284dc34ab Use an Identifier instead of an OperationName internally for OpPassManager identification (NFC)
This allows to defers the check for traits to the execution instead of forcing it on the pipeline creation.
In particular, this is making our pipeline creation tolerant to dialects not being loaded in the context yet.

Reviewed By: rriddle, GMNGeoffrey

Differential Revision: https://reviews.llvm.org/D86915
2020-09-02 21:46:05 +00:00
Mehdi Amini 01700c45eb Store an Identifier instead of a StringRef for the OperationName inside an AbstractOperation (NFC)
Instead of storing a StringRef, we keep an Identifier which otherwise requires a lock on the context to retrieve.
This will allow to get an Identifier for any registered Operation for "free".

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86994
2020-09-02 19:10:56 +00:00
Ehsan Toosi 39cf83cc78 [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks
In this PR, the users of BufferPlacement can configure
BufferAssginmentTypeConverter. These new configurations would give the user more
freedom in the process of converting function signature, and return and call
operation conversions.

These are the new features:
    - Accepting callback functions for decomposing types (i.e. 1 to N type
    conversion such as unpacking tuple types).
    - Defining ResultConversionKind for specifying whether a function result
    with a certain type should be appended to the function arguments list or
    should be kept as function result. (Usage:
    converter.setResultConversionKind<MemRefType>(AppendToArgumentList))
    - Accepting callback functions for composing or decomposing values (i.e. N
    to 1 and 1 to N value conversion).

Differential Revision: https://reviews.llvm.org/D85133
2020-09-02 17:53:42 +02:00
Lei Zhang 1b88bbf5eb Revert "[mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks"
This reverts commit 94f5d24877 because
of failing the following tests:

MLIR :: Dialect/Linalg/tensors-to-buffers.mlir
MLIR :: Transforms/buffer-placement-preparation-allowed-memref-results.mlir
MLIR :: Transforms/buffer-placement-preparation.mlir
2020-09-02 09:24:36 -04:00
Ehsan Toosi 94f5d24877 [mlir] Extend BufferAssignmentTypeConverter with result conversion callbacks
In this PR, the users of BufferPlacement can configure
BufferAssginmentTypeConverter. These new configurations would give the user more
freedom in the process of converting function signature, and return and call
operation conversions.

These are the new features:
    - Accepting callback functions for decomposing types (i.e. 1 to N type
    conversion such as unpacking tuple types).
    - Defining ResultConversionKind for specifying whether a function result
    with a certain type should be appended to the function arguments list or
    should be kept as function result. (Usage:
    converter.setResultConversionKind<MemRefType>(AppendToArgumentList))
    - Accepting callback functions for composing or decomposing values (i.e. N
    to 1 and 1 to N value conversion).

Differential Revision: https://reviews.llvm.org/D85133
2020-09-02 13:26:55 +02:00
River Riddle 431bb8b318 [mlir][ODS] Use c++ types for integer attributes of fixed width when possible.
Unsigned and Signless attributes use uintN_t and signed attributes use intN_t, where N is the fixed width. The 1-bit variants use bool.

Differential Revision: https://reviews.llvm.org/D86739
2020-09-01 13:43:32 -07:00
Valentin Clement 2bbbcae782 [mlir][openacc] Add missing attributes and operands for acc.loop
This patch add the missing operands to the acc.loop operation. Only the device_type
information is not part of the operation for now.

Reviewed By: rriddle, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D86753
2020-08-31 19:50:05 -04:00
River Riddle 2481846a30 [mlir][PDL] Move the formats for PatternOp and RewriteOp to the declarative form.
This is possible now that the declarative assembly form supports regions.

Differential Revision: https://reviews.llvm.org/D86830
2020-08-31 13:26:24 -07:00
River Riddle eaeadce9bd [mlir][OpFormatGen] Add initial support for regions in the custom op assembly format
This adds some initial support for regions and does not support formatting the specific arguments of a region. For now this can be achieved by using a custom directive that formats the arguments and then parses the region.

Differential Revision: https://reviews.llvm.org/D86760
2020-08-31 13:26:24 -07:00
River Riddle 24b88920fe [mlir][ODS] Add new SymbolNameAttr and add support for in assemblyFormat
Symbol names are a special form of StringAttr that get treated specially in certain areas, such as formatting. This revision adds a special derived attr for them in ODS and adds support in the assemblyFormat for formatting them properly.

Differential Revision: https://reviews.llvm.org/D86759
2020-08-31 13:26:23 -07:00
River Riddle 88c6e25e4f [mlir][OpFormatGen] Add support for specifiy "custom" directives.
This revision adds support for custom directives to the declarative assembly format. This allows for users to use C++ for printing and parsing subsections of an otherwise declaratively specified format. The custom directive is structured as follows:

```
custom-directive ::= `custom` `<` UserDirective `>` `(` Params `)`
```

`user-directive` is used as a suffix when this directive is used during printing and parsing. When parsing, `parseUserDirective` will be invoked. When printing, `printUserDirective` will be invoked. The first parameter to these methods must be a reference to either the OpAsmParser, or OpAsmPrinter. The type of rest of the parameters is dependent on the `Params` specified in the assembly format.

Differential Revision: https://reviews.llvm.org/D84719
2020-08-31 13:26:23 -07:00
Kamlesh Kumar deb99610ab Improve doc comments for several methods returning bools
Differential Revision: https://reviews.llvm.org/D86848
2020-08-30 13:33:05 +05:30
Stella Laurenzo 2d1362e09a Add Location, Region and Block to MLIR Python bindings.
* This is just enough to create regions/blocks and iterate over them.
* Does not yet implement the preferred iteration strategy (python pseudo containers).
* Refinements need to come after doing basic mappings of operations and values so that the whole hierarchy can be used.

Differential Revision: https://reviews.llvm.org/D86683
2020-08-28 15:26:05 -07:00
Mehdi Amini c39c21610d Rename AnalysisManager::slice in AnalysisManager::nest (NFC)
The naming wasn't reflecting the intent of this API, "nest" is aligning
it with the pass manager API.
2020-08-28 20:41:07 +00:00
Mehdi Amini 7b00c80888 Add a global flag to disable the global dialect registry "process wise"
This is intended to ease the transition for client with a lot of
dependencies. It'll be removed in the coming weeks.

Differential Revision: https://reviews.llvm.org/D86755
2020-08-28 03:17:15 +00:00
Kiran Chandramohan 875074c8a9 [OpenMP][MLIR] Conversion pattern for OpenMP to LLVM
Adding a conversion pattern for the parallel Operation. This will
help the conversion of parallel operation with standard dialect to
parallel operation with llvm dialect. The type conversion of the block
arguments in a parallel region are controlled by the pattern for the
parallel Operation. Without this pattern, a parallel Operation with
block arguments cannot be converted from standard to LLVM dialect.
Other OpenMP operations without regions are marked as legal. When
translation of OpenMP operations with regions are added then patterns
for these operations can also be added.
Also uses all the standard to llvm patterns. Patterns of other dialects
can be added later if needed.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86273
2020-08-27 19:32:15 +01:00
Alexandre E. Eichenberger a14a2805b0 [MLIR] MemRef Normalization for Dialects
When dealing with dialects that will results in function calls to
external libraries, it is important to be able to handle maps as some
dialects may require mapped data.  Before this patch, the detection of
whether normalization can apply or not, operations are compared to an
explicit list of operations (`alloc`, `dealloc`, `return`) or to the
presence of specific operation interfaces (`AffineReadOpInterface`,
`AffineWriteOpInterface`, `AffineDMAStartOp`, or `AffineDMAWaitOp`).

This patch add a trait, `MemRefsNormalizable` to determine if an
operation can have its `memrefs` normalized.

This trait can be used in turn by dialects to assert that such
operations are compatible with normalization of `memrefs` with
nontrivial memory layout specification. An example is given in the
literal tests.

Differential Revision: https://reviews.llvm.org/D86236
2020-08-27 20:26:59 +05:30
George Mitenkov e850558cdc [MLIR][SPIRVToLLVM] Added a hook for descriptor set / binding encoding
This patch introduces a hook to encode descriptor set
and binding number into `spv.globalVariable`'s symbolic name. This
allows to preserve this information, and at the same time legalize
the global variable for the conversion to LLVM dialect.

This is required for `mlir-spirv-cpu-runner` to convert kernel
arguments into LLVM.

Also, a couple of some nits added:
- removed unused comment
- changed to a capital letter in the comment

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D86515
2020-08-27 08:27:42 +03:00
Mehdi Amini 6c05ca21b9 Remove the `run` method from `OpPassManager` and `Pass` and migrate it to `OpToOpPassAdaptor`
This makes OpPassManager more of a "container" of passes and not responsible to drive the execution.
As such we also make it constructible publicly, which will allow to build arbitrary pipeline decoupled from the execution. We'll make use of this facility to expose "dynamic pipeline" in the future.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D86391
2020-08-27 04:57:29 +00:00
George Mitenkov d7461b31e7 [MLIR][SPIRV] Added optional name to SPIR-V module
This patch adds an optional name to SPIR-V module.
This will help with lowering from GPU dialect (so that we
can pass the kernel module name) and will be more naturally
aligned with `GPUModuleOp`/`ModuleOp`.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D86386
2020-08-27 07:32:31 +03:00
Thomas Raoux 5fbfe2ec4f [mlir][vector] Add vector.bitcast operation
Based on the RFC discussed here:
https://llvm.discourse.group/t/rfc-vector-standard-add-bitcast-operation/1628/

Adding a vector.bitcast operation that allows casting to a vector of different
element type. The most minor dimension bitwidth must stay unchanged.

Differential Revision: https://reviews.llvm.org/D86580
2020-08-26 14:13:52 -07:00
River Riddle d289a97f91 [mlir][PDL] Add a PDL Interpreter Dialect
The PDL Interpreter dialect provides a lower level abstraction compared to the PDL dialect, and is targeted towards low level optimization and interpreter code generation. The dialect operations encapsulates low-level pattern match and rewrite "primitives", such as navigating the IR (Operation::getOperand), creating new operations (OpBuilder::create), etc. Many of the operations within this dialect also fuse branching control flow with some form of a predicate comparison operation. This type of fusion reduces the amount of work that an interpreter must do when executing.

An example of this representation is shown below:

```mlir
// The following high level PDL pattern:
pdl.pattern : benefit(1) {
  %resultType = pdl.type
  %inputOperand = pdl.input
  %root, %results = pdl.operation "foo.op"(%inputOperand) -> %resultType
  pdl.rewrite %root {
    pdl.replace %root with (%inputOperand)
  }
}

// May be represented in the interpreter dialect as follows:
module {
  func @matcher(%arg0: !pdl.operation) {
    pdl_interp.check_operation_name of %arg0 is "foo.op" -> ^bb2, ^bb1
  ^bb1:
    pdl_interp.return
  ^bb2:
    pdl_interp.check_operand_count of %arg0 is 1 -> ^bb3, ^bb1
  ^bb3:
    pdl_interp.check_result_count of %arg0 is 1 -> ^bb4, ^bb1
  ^bb4:
    %0 = pdl_interp.get_operand 0 of %arg0
    pdl_interp.is_not_null %0 : !pdl.value -> ^bb5, ^bb1
  ^bb5:
    %1 = pdl_interp.get_result 0 of %arg0
    pdl_interp.is_not_null %1 : !pdl.value -> ^bb6, ^bb1
  ^bb6:
    pdl_interp.record_match @rewriters::@rewriter(%0, %arg0 : !pdl.value, !pdl.operation) : benefit(1), loc([%arg0]), root("foo.op") -> ^bb1
  }
  module @rewriters {
    func @rewriter(%arg0: !pdl.value, %arg1: !pdl.operation) {
      pdl_interp.replace %arg1 with(%arg0)
      pdl_interp.return
    }
  }
}
```

Differential Revision: https://reviews.llvm.org/D84579
2020-08-26 05:22:27 -07:00
Mehdi Amini 0b7c184c2d Add assertion in PatternRewriter::create<> to defend the same way as OpBuilder::create<> against missing dialect registration (NFC)
The code would have failed a few line later, but that way the error
message is more clear/friendly to debug.
2020-08-26 06:57:23 +00:00
Mehdi Amini 5a6ff2bb3e Adjust assertion when casting to an unregistered operation
This assertion does not achieve what it meant to do originally, as it
would fire only when applied to an unregistered operation, which is a
fairly rare circumstance (it needs a dialect or context allowing
unregistered operation in the input in the first place).
Instead we relax it to only fire when it should have matched but didn't
because of the misconfiguration.

Differential Revision: https://reviews.llvm.org/D86588
2020-08-26 06:57:22 +00:00
aartbik 66e536bc36 [mlir] [LLVMIR] Mark reductions as side-effect free
Attribute was missing from original base class.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D86569
2020-08-25 13:09:19 -07:00
aartbik 84fdc33f47 [mlir] [LLVMIR] Add get active lane mask intrinsic
Provides fast, generic way of setting a mask up to a certain
point. Potential use cases that may benefit are create_mask
and transfer_read/write operations in the vector dialect.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D86501
2020-08-25 12:19:17 -07:00
clementval 4d69bcb12f [mlir][openacc][NFC] Fix comment about OpenACCExecMapping 2020-08-25 15:11:05 -04:00