5 Commits

Author	SHA1	Message	Date
Sanjay Patel	cab567873f	[x86] Add store-folded memop patterns for vcvtps2ph ... Differential Revision: http://reviews.llvm.org/D7296 llvm-svn: 235517	2015-04-22 16:11:19 +00:00
David Blaikie	a79ac14fa6	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction ... Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794	2015-02-27 21:17:42 +00:00
Alex Rosenberg	96e833a6a6	Make the test actually test what it's supposed to test. Add a test for the from memory variant of vcvtph2ps for 256-bit. ... llvm-svn: 227446	2015-01-29 15:19:54 +00:00
Benjamin Kramer	e6c821ef4c	X86: Pattern match scalar loads + vcvtph2ps into just vcvtph2ps. ... vcvtph2ps only reads the lower 64 bits of the address passed to the intrinsic. llvm-svn: 206579	2014-04-18 10:45:33 +00:00
Craig Topper	b9a46e6b83	Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions ... llvm-svn: 143682	2011-11-04 06:59:21 +00:00