Commit Graph

247841 Commits

Author SHA1 Message Date
Benjamin Kramer 68dd881697 Adjust arm64-irtranslator.ll test to changes from r287368
The test is currently broken, and this CL should fix it.

Patch by Adrian Kuegel!

Differential Revision: https://reviews.llvm.org/D26910

llvm-svn: 287536
2016-11-21 13:15:38 +00:00
Simon Pilgrim b7bbaa669b [X86][SSE] Allow PACKSS to be used to truncate any type of all/none sign bits input
At the moment we only use truncateVectorCompareWithPACKSS with direct vector comparison results (just one example of a known all/none signbits input).

This change relaxes the direct matching of a SETCC opcode by moving the logic up into SelectionDAG::ComputeNumSignBits and accepting any input with a known splatted signbit.

llvm-svn: 287535
2016-11-21 12:05:49 +00:00
Marcin Koscielnicki 1c2bd1e9f3 [InstrProfiling] Mark __llvm_profile_instrument_target last parameter as i32 zeroext if appropriate.
On some architectures (s390x, ppc64, sparc64, mips), C-level int is passed
as i32 signext instead of plain i32.  Likewise, unsigned int may be passed
as i32, i32 signext, or i32 zeroext depending on the platform.  Mark
__llvm_profile_instrument_target properly (its last parameter is unsigned
int).

This (together with the clang change) makes compiler-rt profile testsuite pass
on s390x.

Differential Revision: http://reviews.llvm.org/D21736

llvm-svn: 287534
2016-11-21 11:57:19 +00:00
Marcin Koscielnicki 5ae2c526db [TLI] Add functions determining if int parameters/returns should be zeroext/signext.
On some architectures (s390x, ppc64, sparc64, mips), C-level int is passed
as i32 signext instead of plain i32.  Likewise, unsigned int may be passed
as i32, i32 signext, or i32 zeroext depending on the platform.  Add this
information to TargetLibraryInfo, to be used whenever some LLVM pass
inserts a compiler-rt call to a function involving int parameters
or returns.

Differential Revision: http://reviews.llvm.org/D21739

llvm-svn: 287533
2016-11-21 11:57:11 +00:00
Michael Zuckerman 8462faeaba Fixing a small typo (A->U).
This seem to fixes PR30992.

-         HasAVX512 ? X86::VMOVAPSZ128rm_NOVLX 
+         HasAVX512 ? X86::VMOVUPSZ128rm_NOVLX 

llvm-svn: 287532
2016-11-21 11:52:11 +00:00
Eric Fiselier 67a7e935a3 Revert r287435 because of OS X test failures
llvm-svn: 287531
2016-11-21 11:26:10 +00:00
Alex Lorenz ff6c34b30d [ObjC] Prevent infinite loops when iterating over redeclaration
of a method that was declared in an invalid interface

This commit fixes an infinite loop that occurs when clang tries to iterate over
redeclaration of a method that was declared in an invalid @interface. The
existing validity checks don't catch this as that @interface is a duplicate of
a previously declared valid @interface declaration, so we have to verify that
the found redeclaration is in a valid declaration context.

rdar://29220965

Differential Revision: https://reviews.llvm.org/D26664

llvm-svn: 287530
2016-11-21 11:16:30 +00:00
Alex Lorenz 9229d332bf [Frontend] Add a predefined macro that describes the Objective-C bool type
This commit adds a new predefined macro named __OBJC_BOOL_IS_BOOL that describes
the Objective-C boolean type: its value is zero if the Objective-C boolean uses
the signed character type, otherwise its value is one as the Objective-C boolean
uses the builtin boolean type.

rdar://21170440

Differential Revision: https://reviews.llvm.org/D26234

llvm-svn: 287529
2016-11-21 11:05:15 +00:00
Jacob Baungard Hansen 3bc6fe78f6 [Sparc] Use target name instead of namespace as prefix for MCRegisterClasses array
Summary:
For Sparc the namespace (SP) is different from the target name (Sparc),
which causes the name of the array in this declaration to differ from
the name used in the definition.

Patch by Daniel Cederman.

Reviewers: jyknight

Subscribers: llvm-commits, jyknight

Differential Revision: https://reviews.llvm.org/D23650

llvm-svn: 287528
2016-11-21 09:33:05 +00:00
Eugene Leviant 7d7ff80f4b [ELF] Better error reporting for broken archives
Differential revision: https://reviews.llvm.org/D26852

llvm-svn: 287527
2016-11-21 09:28:07 +00:00
Eugene Leviant a113a4194c [ELF] Convert GdbIndexSection to input section
Differential revision: https://reviews.llvm.org/D26854

llvm-svn: 287526
2016-11-21 09:24:43 +00:00
Tobias Grosser 1f0236d8e5 [ScopDetect] Use mayReadOrWriteMemory to shorten condition
llvm-svn: 287525
2016-11-21 09:07:30 +00:00
Tobias Grosser b94e9b31d0 [ScopDetect] Remove unnecessary namespace qualifier
llvm-svn: 287524
2016-11-21 09:04:45 +00:00
Craig Topper 9f2d632ee7 [AVX-512] Add EVEX form of VMOVZPQILo2PQIZrm to load folding tables to match SSE and AVX.
llvm-svn: 287523
2016-11-21 07:51:31 +00:00
Alexei Starovoitov 2bb523f554 [bpf] attempt to fix big-endian bots
attempt to fix big-endian bots failing on new dwarfdump test

Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 287522
2016-11-21 07:26:23 +00:00
Alexei Starovoitov 7ab125dbf3 [bpf] fix dwarf elf relocs and line numbers
- teach RelocVisitor to recognize bpf relocations
- fix AsmInfo->PointerSize to make sure dwarf is emitted correctly
- add a test for the above

Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 287521
2016-11-21 06:21:23 +00:00
Craig Topper 5e87d5264f [TableGen][ISel] Do a better job of factoring ScopeMatchers created during creation of SwitchTypeMatcher.
Previously we were factoring when the ScopeMatcher was initially created, but it might get more Matchers added to it later. Delay factoring until we have fully created/populated the ScopeMatchers.

This reduces X86 isel tables by 154 bytes.

llvm-svn: 287520
2016-11-21 04:07:58 +00:00
Craig Topper 0dfc09372f [X86] Remove duplicate instructions for (v)movq and replace with patterns on other instructions. NFC
llvm-svn: 287519
2016-11-21 04:07:56 +00:00
Dean Michael Berris 3abce99b67 [XRay] Support AArch64 in Clang
This patch adds XRay support in Clang for AArch64 target.
This patch is one of a series:

LLVM: https://reviews.llvm.org/D26412
compiler-rt: https://reviews.llvm.org/D26413

Author: rSerge

Reviewers: rengolin, dberris

Subscribers: aemerson, cfe-commits, iid_iunknown

Differential Revision: https://reviews.llvm.org/D26415

llvm-svn: 287518
2016-11-21 03:24:59 +00:00
Dean Michael Berris bad8f0feb4 [XRay] Support AArch64 in compiler-rt
This patch adds XRay support in compiler-rt for AArch64 targets.
This patch is one of a series:

LLVM: https://reviews.llvm.org/D26412
Clang: https://reviews.llvm.org/D26415

Author: rSerge

Reviewers: rengolin, dberris

Subscribers: aemerson, mgorny, llvm-commits, iid_iunknown

Differential Revision: https://reviews.llvm.org/D26413

llvm-svn: 287517
2016-11-21 03:20:43 +00:00
Dean Michael Berris 31761f300d [XRay][AArch64] Implemented a test for the compile-time sleds emitted, and fixed a bug in the jump instruction
This patch adds a test for the assembly code emitted with XRay
instrumentation. It also fixes a bug where the operand of a jump
instruction must be not the number of bytes to jump over, but rather the
number of 4-byte instructions.

Author: rSerge

Reviewers: dberris, rengolin

Differential Revision: https://reviews.llvm.org/D26805

llvm-svn: 287516
2016-11-21 03:01:43 +00:00
Rui Ueyama 0b1b695a9e Add comments.
This patch rearranges code a bit to make it easy to explain.

llvm-svn: 287515
2016-11-21 02:11:05 +00:00
Rui Ueyama e0be2901cd Simplify. NFC.
llvm-svn: 287514
2016-11-21 02:10:12 +00:00
Eric Fiselier 43b5523069 Mark variadic lock guard tests as XFAIL with modules, since they have to define macros to expose the new ABI
llvm-svn: 287513
2016-11-21 01:10:52 +00:00
Eric Fiselier 11869aeb49 Adjust uses_alloc_types helpers for later changes
llvm-svn: 287512
2016-11-21 00:41:32 +00:00
Davide Italiano 2ae76dd239 [GlobalSplit] Port to the new pass manager.
llvm-svn: 287511
2016-11-21 00:28:23 +00:00
Rui Ueyama 60c4e36c7e Simplify. NFC.
llvm-svn: 287510
2016-11-20 23:15:56 +00:00
Rui Ueyama 7bed9eec36 Update comments.
llvm-svn: 287509
2016-11-20 23:15:54 +00:00
Rui Ueyama f94efdddc0 Add a flag to InputSectionBase for linker script.
Previously, we set (uintptr_t)-1 to InputSectionBase::OutSec to record
that a section has already been set to be assigned to some output section
by linker scripts. Later, we restored nullptr to the pointer to use
the field for the original purpose. That overloading is not very easy to
understand.

This patch adds a bit flag for that purpose, so that we don't need
to piggyback the flag on an unrelated pointer.

llvm-svn: 287508
2016-11-20 23:15:52 +00:00
Dimitar Vlahovski a228c46c2a ELF core: Adding parsing of the floating-point and SSE registers on x86 32/64 bit elf core files
Summary:
The floating-point and SSE registers could be present in the elf-core
file in the note NT_FPREGSET for 64 bit ones, and in the note
NT_PRXFPREG for 32 bit ones.

The entire note is a binary blob matching the layout of the x87 save
area that gets generated by the FXSAVE instruction (see Intel developers
manual for more information).

This CL mainly modifies the RegisterRead function in
RegisterContextPOSIXCore_x86_64 for it to return the correct data both
for GPR and FPR/SSE registers, and return false (meaning "this register
is not available") for other registers.

I added a test to TestElfCore.py that tests reading FPR/SSE registers
both from a 32 and 64 bit elf-core file and I have inluded the source
which I used to generate the core files.

I tried to also add support for the AVX registers, because this info could
also be present in the elf-core file (note NT_X86_XSTATE - that is the result of
the newer XSAVE instruction). Parsing the contents from the file is
easy. The problem is that the ymm registers are split into two halves
and they are in different places in the note. For making this work one
would either make a "hacky" approach, because there won't be
any other way with the current state of the register contexts - they
assume that "this register is of size N and at offset M" and
don't have the notion of discontinuos registers.

Reviewers: labath

Subscribers: emaste, lldb-commits

Differential Revision: https://reviews.llvm.org/D26300

llvm-svn: 287506
2016-11-20 21:24:49 +00:00
Simon Dardis 1dcb911061 [mips] Restrict tail call optimization
The tail call optimization was being used without proper consideration of
ABI requirements for saving and restoring the GP. This patch restricts tail
call optimization to functions within the same translation unit.

Reviewers: vkalintiris

Differential Revision: https://reviews.llvm.org/D24763

llvm-svn: 287505
2016-11-20 21:23:08 +00:00
Simon Pilgrim 0878d46416 [X86][SSE] Add some initial combine tests that could (should?) use PACKSS
llvm-svn: 287504
2016-11-20 21:12:49 +00:00
Craig Topper 85a1f5c20c [AVX-512] Add tests for masked palignr/valignd/valignq shuffles, many of which show failures to fold the masking into the operation.
Many of these problems are because shuffle lowering widens element size and reduces element count when possible. This causes the shuffle to become separated from the select by a bitcast. Future patches will work to improve these cases by rewriting the shuffle back to a narrow element type if we think it can result in folding the mask.

llvm-svn: 287503
2016-11-20 19:50:32 +00:00
Coby Tayree 99a6639047 The 'vpmultishiftqb' instruction was implemented falsely, this patch amend it.
More specifically - (MS dialect) broadcasting variants were implemented falsely.

Differential Revision: https://reviews.llvm.org/D26257

llvm-svn: 287501
2016-11-20 17:19:55 +00:00
Coby Tayree 97e9cf62f4 Some instructions were missing, other implemented falsely. this patch aims at amending those issues. full list:
vcvtps2pd
vcvtudq2pd
vcvtps2qq
vcvttps2qq
vcvtps2uqq
vcvttps2uqq

variants are:

[Dst]XMM(zero-masked/merge-masked/unmasked)
[Src]Mem64

Differential Revision: https://reviews.llvm.org/D26799

llvm-svn: 287500
2016-11-20 17:09:56 +00:00
Simon Pilgrim 5fadce4a3f [X86][AVX512] Combine unary + zero target shuffles to VPERMV3 with a zero vector where possible
llvm-svn: 287497
2016-11-20 16:11:36 +00:00
Simon Pilgrim 5401bae523 [X86][AVX512] Add support for VBMI VPERMV3 target shuffle combines
llvm-svn: 287496
2016-11-20 15:24:38 +00:00
Simon Pilgrim 3f40412e0f [X86][AVX512] Add support for VBMI VPERMV target shuffle combines
llvm-svn: 287495
2016-11-20 15:05:45 +00:00
Simon Pilgrim 9e3f5cc015 [X86][AVX512] Add some initial VBMI target shuffle combine tests
llvm-svn: 287494
2016-11-20 14:45:46 +00:00
Simon Pilgrim c17e1b74b8 [X86][AVX512VL] Removed duplicate operation action
Basic AVX512F already declared uint_to_fp v4i32 as legal

llvm-svn: 287493
2016-11-20 14:19:29 +00:00
Simon Pilgrim 3f10e9953d Strip trailing whitespace
llvm-svn: 287492
2016-11-20 14:05:23 +00:00
Simon Pilgrim 096b6d4f81 [X86][AVX512F] Add support for uint_to_fp v2i32 to v2f64 on AVX512F-only targets
Use 512-bit instructions (we already do something similar for uint_to_fp v4i32 to v4f64)

llvm-svn: 287491
2016-11-20 14:03:23 +00:00
Simon Pilgrim f2fbf43704 Fix comment typos. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287490
2016-11-20 13:47:59 +00:00
Simon Pilgrim dae11f7aab Fix spelling mistakes in Tools/Tests comments. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287489
2016-11-20 13:31:13 +00:00
Simon Pilgrim 7d18a70dac Fix spelling mistakes in Transforms comments. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287488
2016-11-20 13:19:49 +00:00
Simon Pilgrim 7a6b6d5656 Fix spelling mistakes in SelectionDAG comments. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287487
2016-11-20 13:14:57 +00:00
Simon Pilgrim fbd2221de5 Fix comment typos. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287486
2016-11-20 13:10:51 +00:00
Oren Ben Simhon c0f073b67f [X86] RegCall - Handling long double arguments
The change is part of RegCall calling convention support for LLVM.
Long double (f80) requires special treatment as the first f80 parameter is saved in FP0 (floating point stack).
This review present the change and the corresponding tests.

Differential Revision: https://reviews.llvm.org/D26151

llvm-svn: 287485
2016-11-20 11:06:07 +00:00
Coby Tayree 179ff0e541 [X86][InlineAsm]Test commit.
Fixing a wrong comment on X86AsmParser.cpp::ParseZ: "true" --> "false"

Differential Revision: https://reviews.llvm.org/D26797

llvm-svn: 287484
2016-11-20 09:31:11 +00:00
Ekaterina Romanova bf667b21ac Add doxygen comments to immintrin.h's intrinsics.
The doxygen comments are automatically generated based on Sony's intrinsics docu
ment.

I got an OK from Eric Christopher to commit doxygen comments without prior code
review upstream. This patch was internally reviewed by Charles Li.

llvm-svn: 287483
2016-11-20 08:35:05 +00:00