Commit Graph

4178 Commits

Author SHA1 Message Date
Fangrui Song 3841ed4104 [Driver] Render -T for Gnu.cpp
clang -T a.lds a.c currently does not render -T.
2020-05-16 23:54:31 -07:00
Hubert Tong 15f0f824b3 [tests][Driver] Set `--sysroot=""` to allow `DEFAULT_SYSROOT` build
Summary:
If `DEFAULT_SYSROOT` is configured to some path, some tests would fail.
This patch overrides `sysroot` to be the empty string in the style of
D66834 so that the tests will pass even when the build is configured
with a `DEFAULT_SYSROOT`.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D79694
2020-05-15 17:34:00 -04:00
Volodymyr Sapsai 6a3469f58d [ObjC] Add compatibility mode for type checking of qualified id block parameters.
Commit 73152a2ec2 fixed type checking for
blocks with qualified id parameters. But there are existing APIs in
Apple SDKs relying on the old type checking behavior. Specifically,
these are APIs using NSItemProviderCompletionHandler in
Foundation/NSItemProvider.h. To keep existing code working and to allow
developers to use affected APIs introduce a compatibility mode that
enables the previous and the fixed type checking. This mode is enabled
only on Darwin platforms.

Reviewed By: jyknight, ahatanak

Differential Revision: https://reviews.llvm.org/D79511
2020-05-14 12:08:19 -07:00
Fangrui Song 5ecb514146 [Driver] Pass -plugin-opt=O2 for -Os -Oz and -plugin-opt=O1 for -Og
Fixes PR42445 (compiler driver options -Os -Oz translate to
-plugin-opt=Os (Oz) which are not recognized by LLVMgold.so or LLD).

The optimization level mapping matches
CompilerInvocation.cpp:getOptimizationLevel() and SpeedLevel of
PassBuilder::OptimizationLevel::O*.

-plugin-opt=O* affects the way we construct regular LTO/ThinLTO pass
manager pipeline.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D79919
2020-05-14 10:37:33 -07:00
Matt Arsenault 235fb7dc24 AMDGPU/OpenCL: Accept -nostdlib in place of -nogpulib
-nogpulib makes sense when there is a host (where -nostdlib would
 apply) and offload target. Accept nostdlib when there is no offload
 target as an alias.
2020-05-14 12:33:31 -04:00
Wei Zhao 382d3a85e2 [AARch64] Add Marvell ThunderX3T110 support
This is the first checkin to support Marvell ThunderX3T110.

Initial definition of the micro-ops of the instructions in ThunderX3T110
is included.

Differential Revision: https://reviews.llvm.org/D78129
2020-05-13 16:58:51 -07:00
Joel E. Denny a1fd188223 [FileCheck] Support comment directives
Sometimes you want to disable a FileCheck directive without removing
it entirely, or you want to write comments that mention a directive by
name.  The `COM:` directive makes it easy to do this.  For example,
you might have:

```
; X32: pinsrd_1:
; X32:    pinsrd $1, 4(%esp), %xmm0

; COM: FIXME: X64 isn't working correctly yet for this part of codegen, but
; COM: X64 will have something similar to X32:
; COM:
; COM:   X64: pinsrd_1:
; COM:   X64:    pinsrd $1, %edi, %xmm0
```

Without this patch, you need to use some combination of rewording and
directive syntax mangling to prevent FileCheck from recognizing the
commented occurrences of `X32:` and `X64:` above as directives.
Moreover, FileCheck diagnostics have been proposed that might complain
about the occurrences of `X64` that don't have the trailing `:`
because they look like directive typos:

  <http://lists.llvm.org/pipermail/llvm-dev/2020-April/140610.html>

I think dodging all these problems can prove tedious for test authors,
and directive syntax mangling already makes the purpose of existing
test code unclear.  `COM:` can avoid all these problems.

This patch also updates the small set of existing tests that define
`COM` as a check prefix:

- clang/test/CodeGen/default-address-space.c
- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
- clang/test/Driver/hip-device-libs.hip
- llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll

I think lit should support `COM:` as well.  Perhaps `clang -verify`
should too.

Reviewed By: jhenderson, thopre

Differential Revision: https://reviews.llvm.org/D79276
2020-05-13 11:29:48 -04:00
Matt Arsenault 14e1845711 HIP: Merge builtin library handling
Merge with the new --rocm-path handling used for OpenCL. This looks
for a usable set of device libraries upfront, rather than giving a
generic "no such file or directory error". If any of the required
bitcode libraries are missing, this will now produce a "cannot find
ROCm installation." error. This differs from the existing hip specific
flags by pointing to a rocm root install instead of a single directory
with bitcode files.

This tries to maintain compatibility with the existing the
--hip-device-lib and --hip-device-lib-path flags, as well as the
HIP_DEVICE_LIB_PATH environment variable, or at least the range of
uses with testcases. The existing range of uses and behavior doesn't
entirely make sense to me, so some of the untested edge cases change
behavior. Currently the two path forms seem to have the double purpose
of a search path for an arbitrary --hip-device-lib, and for finding
the stock set of libraries. Since the stock set of libraries This also
changes the behavior when multiple paths are specified, and only takes
the last one (and the environment variable only handles a single
path).

If --hip-device-lib is used, it now only treats --hip-device-lib-path
as the search path for it, and does not attempt to find the rocm
installation. If not, --hip-device-lib-path and the environment
variable are used as the directory to search instead of the rocm root
based path.

This should also automatically fix handling of the options to use
wave64.
2020-05-12 09:50:22 -04:00
Matt Arsenault 123bee602a AMDGPU: Search for new ROCm bitcode library structure
The current install situation is a mess, but I'm working on fixing
it. Search for the target layout instead of one of the N options that
exist today.
2020-05-12 09:41:07 -04:00
Joel E. Denny d0e7fd6b62 Revert "[FileCheck] Support comment directives"
This reverts commit 9a9a5f9893 to try to
fix a bot:

http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/23489
2020-05-11 19:41:22 -04:00
Scott Constable e97a3e5d9d [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) Gadgets
Adds a new data structure, ImmutableGraph, and uses RDF to find LVI gadgets and add them to a MachineGadgetGraph.

More specifically, a new X86 machine pass finds Load Value Injection (LVI) gadgets consisting of a load from memory (i.e., SOURCE), and any operation that may transmit the value loaded from memory over a covert channel, or use the value loaded from memory to determine a branch/call target (i.e., SINK).

Also adds a new target feature to X86: +lvi-load-hardening

The feature can be added via the clang CLI using -mlvi-hardening.

Differential Revision: https://reviews.llvm.org/D75936
2020-05-11 13:08:35 -07:00
Joel E. Denny 9a9a5f9893 [FileCheck] Support comment directives
Sometimes you want to disable a FileCheck directive without removing
it entirely, or you want to write comments that mention a directive by
name.  The `COM:` directive makes it easy to do this.  For example,
you might have:

```
; X32: pinsrd_1:
; X32:    pinsrd $1, 4(%esp), %xmm0

; COM: FIXME: X64 isn't working correctly yet for this part of codegen, but
; COM: X64 will have something similar to X32:
; COM:
; COM:   X64: pinsrd_1:
; COM:   X64:    pinsrd $1, %edi, %xmm0
```

Without this patch, you need to use some combination of rewording and
directive syntax mangling to prevent FileCheck from recognizing the
commented occurrences of `X32:` and `X64:` above as directives.
Moreover, FileCheck diagnostics have been proposed that might complain
about the occurrences of `X64` that don't have the trailing `:`
because they look like directive typos:

  <http://lists.llvm.org/pipermail/llvm-dev/2020-April/140610.html>

I think dodging all these problems can prove tedious for test authors,
and directive syntax mangling already makes the purpose of existing
test code unclear.  `COM:` can avoid all these problems.

This patch also updates the small set of existing tests that define
`COM` as a check prefix:

- clang/test/CodeGen/default-address-space.c
- clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
- clang/test/Driver/hip-device-libs.hip
- llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll

I think lit should support `COM:` as well.  Perhaps `clang -verify`
should too.

Reviewed By: jhenderson, thopre

Differential Revision: https://reviews.llvm.org/D79276
2020-05-11 14:53:48 -04:00
Petr Hosek 5b02be0b97 [Clang] Pass -z max-page-size to linker for Fuchsia
Currently all Fuchsia ABIs use a 4k page size, departing from
the recommended page sizes in the respective psABI documents.

Differential Revision: https://reviews.llvm.org/D79667
2020-05-09 13:44:20 -07:00
Petr Hosek c8fbcb1e78 [Clang] Pass --pack-dyn-relocs=relr to lld for Fuchsia
The compact format is fully supported on Fuchsia and is the
preferred default.

Patch By: mcgrathr

Differential Revision: https://reviews.llvm.org/D79665
2020-05-09 13:42:19 -07:00
Fangrui Song 6bf0ad78dc [Driver] Don't pass -u__llvm_profile_runtime for clang -fprofile-arcs a.o
clang --coverage a.o       # InstrProfilingRuntime.cpp.o not linked in
clang --fprofile-arcs a.o  # InstrProfilingRuntime.cpp.o unexpectedly linked in

Fix --fprofile-arcs.
2020-05-08 23:36:29 -07:00
Fangrui Song 9a11174287 [Driver] Add -fno-test-coverage 2020-05-08 17:01:53 -07:00
Fangrui Song 0d4a33ba61 [Driver] Don't warn -Wunused-command-line-argument for --coverage -ftest-coverage -fprofile-arcs 2020-05-08 16:31:15 -07:00
Fangrui Song e1815eb2e1 [Driver] Reorganize --coverage -ftest-coverage -fprofile-arcs related tests
And fix a comment about __llvm_profile_runtime
2020-05-08 16:06:33 -07:00
Hubert Tong b116ded57d [AIX] Avoid structor alias; die before bad alias codegen
Summary:
`AsmPrinter::emitGlobalIndirectSymbol` is dependent on
`MCStreamer::emitAssignment` to produce `.set` directives for alias
symbols; however, the `.set` pseudo-op on AIX is documented as not
usable with external relocatable terms or expressions, which limits its
applicability in generating alias symbols.

Disable generating aliases on AIX until a different implementation
strategy is available.

Reviewers: cebowleratibm, jasonliu, sfertile, daltenty, DiggerLin

Reviewed By: jasonliu

Differential Revision: https://reviews.llvm.org/D79044
2020-05-08 16:51:34 -04:00
Sriraman Tallam e8147ad822 Uniuqe Names for Internal Linkage Symbols.
This is a standalone patch and this would help Propeller do a better job of code
layout as it can accurately attribute the profiles to the right internal linkage
function.

This also helps SampledFDO/AutoFDO correctly associate sampled profiles to the
right internal function. Currently, if there is more than one internal symbol
foo, their profiles are aggregated by SampledFDO.

This patch adds a new clang option, -funique-internal-funcnames, to generate
unique names for functions with internal linkage. This patch appends the md5
hash of the module name to the function symbol as a best effort to generate a
unique name for symbols with internal linkage.

Differential Revision: https://reviews.llvm.org/D73307
2020-05-07 18:18:37 -07:00
Evgenii Stepanov b4aa71e1bd Allow -fsanitize-minimal-runtime with memtag sanitizer.
Summary:
MemTag does not have any runtime at the moment, it's strictly code
instrumentation.

Reviewers: pcc

Subscribers: cryptoad, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79522
2020-05-07 13:07:46 -07:00
Nico Weber e42fee75b8 Add a test for "clang --version". 2020-05-07 12:15:01 -04:00
Raul Tambre 0863e94ebd [AArch64] Add NVIDIA Carmel support
Summary:
NVIDIA's Carmel ARM64 cores are used in Tegra194 chips found in Jetson AGX Xavier, DRIVE AGX Xavier and DRIVE AGX Pegasus.

References:
* https://devblogs.nvidia.com/nvidia-jetson-agx-xavier-32-teraops-ai-robotics/#h.huq9xtg75a5e
* NVIDIA Xavier Series System-on-Chip Technical Reference Manual 1.3 (https://developer.nvidia.com/embedded/downloads#?search=Xavier%20Series%20SoC%20Technical%20Reference%20Manual)

Reviewers: sdesmalen, paquette

Reviewed By: sdesmalen

Subscribers: llvm-commits, ianshmean, kristof.beyls, hiraditya, jfb, danielkiss, cfe-commits, t.p.northover

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D77940
2020-05-04 13:52:30 +01:00
Samuel Thibault 68e89c5b96 [Gnu toolchain] Move GCC multilib/multiarch paths support from Linux to Gnu
Add missing files

Summary: The current code for GNU/Linux is actually completely generic, and can be moved to Gnu, so it can benefit GNU/Hurd and GNU/kFreeBSD

Reviewers: kristina, sammccall, lebedev.ri, MaskRay, arsenm, phosek

Reviewed By: MaskRay, phosek

Subscribers: wdng, ormris, emaste, arichardson, krytarowski, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73845
2020-05-01 12:37:12 +02:00
Samuel Thibault c298e5a022 [Gnu toolchain] Move GCC multilib/multiarch paths support from Linux to Gnu
Summary: The current code for GNU/Linux is actually completely generic, and can be moved to Gnu, so it can benefit GNU/Hurd and GNU/kFreeBSD

Reviewers: kristina, sammccall, lebedev.ri, MaskRay, arsenm, phosek

Reviewed By: MaskRay, phosek

Subscribers: wdng, ormris, emaste, arichardson, krytarowski, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73845
2020-05-01 12:12:27 +02:00
Sylvain Audi 226489715c [clang] Disable check for system sanitizer blacklists files if -fno-sanitizer-blacklist was specified
This is to avoid checking for the validity of a file that is not used.
This also contains a minor fix for the test, as the cfi sanitizer requires -flto and -fvisibility= arguments.

Differential Revision: https://reviews.llvm.org/D79043
2020-04-30 16:04:50 -04:00
Reid Kleckner b8000c0ce8 [Windows] Autolink with basenames and add libdir to libpath
Prior to this change, for a few compiler-rt libraries such as ubsan and
the profile library, Clang would embed "-defaultlib:path/to/rt-arch.lib"
into the .drective section of every object compiled with
-finstr-profile-generate or -fsanitize=ubsan as appropriate.

These paths assume that the link step will run from the same working
directory as the compile step. There is also evidence that sometimes the
paths become absolute, such as when clang is run from a different drive
letter from the current working directory. This is fragile, and I'd like
to get away from having paths embedded in the object if possible. Long
ago it was suggested that we use this for ASan, and apparently I felt
the same way back then:
https://reviews.llvm.org/D4428#56536

This is also consistent with how all other autolinking usage works for
PS4, Mac, and Windows: they all use basenames, not paths.

To keep things working for people using the standard GCC driver
workflow, the driver now adds the resource directory to the linker
library search path when it calls the linker. This is enough to make
check-ubsan pass, and seems like a generally good thing.

Users that invoke the linker directly (most clang-cl users) will have to
add clang's resource library directory to their linker search path in
their build system. I'm not sure where I can document this. Ideally I'd
also do it in the MSBuild files, but I can't figure out where they go.
I'd like to start with this for now.

Reviewed By: hans

Differential Revision: https://reviews.llvm.org/D65543
2020-04-28 11:36:21 -07:00
Francis Visoiu Mistrih e770153865 [AArch64] Add support for -ffixed-x30
Add support for reserving LR in:

* the driver through `-ffixed-x30`
* cc1 through `-target-feature +reserve-x30`
* the backend through `-mattr=+reserve-x30`
* a subtarget feature `reserve-x30`

the same way we're doing for the other registers.
2020-04-28 08:48:28 -07:00
Luke Geeson 740a1dd050 [ARM] Armv8.6-a Matrix Mul cmd line support
This patch upstreams support for the Armv8.6-a Matrix Multiplication
Extension. A summary of the features can be found here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

This patch includes:

- Command line options to enable these features with +i8mm, +f32mm, or f64mm

Note: +f32mm and +f64mm are optional and so are not enabled by default

This is part of a patch series, starting with BFloat16 support and
the other components in the armv8.6a extension (in previous patches
linked in phabricator)

Based on work by:
- Luke Geeson
- Oliver Stannard
- Luke Cheeseman

Reviewers: t.p.northover, DavidSpickett

Reviewed By: DavidSpickett

Subscribers: DavidSpickett, ostannard, kristof.beyls, danielkiss,
cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77875
2020-04-24 15:54:06 +01:00
Sergej Jaskiewicz 2899103108 [TimeProfiler] Emit clock synchronization point
Time profiler emits relative timestamps for events (the number of
microseconds passed since the start of the current process).

This patch allows combining events from different processes while
preserving their relative timing by emitting a new attribute
"beginningOfTime". This attribute contains the system time that
corresponds to the zero timestamp of the time profiler.

This has at least two use cases:

- Build systems can use this to merge time traces from multiple compiler
  invocations and generate statistics for the whole build. Tools like
  ClangBuildAnalyzer could also leverage this feature.

- Compilers that use LLVM as their backend by invoking llc/opt in
  a child process. If such a compiler supports generating time traces
  of its own events, it could merge those events with LLVM-specific
  events received from llc/opt, and produce a more complete time trace.

A proof-of-concept script that merges multiple logs that
contain a synchronization point into one log:
https://github.com/broadwaylamb/merge_trace_events

Differential Revision: https://reviews.llvm.org/D78030
2020-04-23 01:09:31 +03:00
Sergej Jaskiewicz a5bf02815d [TimeProfiler] Emit real process ID and thread names
Differential Revision: https://reviews.llvm.org/D78027
2020-04-23 00:12:51 +03:00
Justin Hibbits 4ca2cad947 [PowerPC] Add clang -msvr4-struct-return for 32-bit ELF
Summary:

Change the default ABI to be compatible with GCC.  For 32-bit ELF
targets other than Linux, Clang now returns small structs in registers
r3/r4.  This affects FreeBSD, NetBSD, OpenBSD.  There is no change for
32-bit Linux, where Clang continues to return all structs in memory.

Add clang options -maix-struct-return (to return structs in memory) and
-msvr4-struct-return (to return structs in registers) to be compatible
with gcc.  These options are only for PPC32; reject them on PPC64 and
other targets.  The options are like -fpcc-struct-return and
-freg-struct-return for X86_32, and use similar code.

To actually return a struct in registers, coerce it to an integer of the
same size.  LLVM may optimize the code to remove unnecessary accesses to
memory, and will return i32 in r3 or i64 in r3:r4.

Fixes PR#40736

Patch by George Koehler!

Reviewed By: jhibbits, nemanjai
Differential Revision: https://reviews.llvm.org/D73290
2020-04-21 20:17:25 -05:00
Richard Smith c8248dc3bb Change deprecated -fsanitize-recover flag to apply to all sanitizers, not just UBSan.
Summary:
This flag has been deprecated, with an on-by-default warning encouraging
users to explicitly specify whether they mean "all" or ubsan for 5 years
(released in Clang 3.7). Change it to mean what we wanted and
undeprecate it.

Also make the argument to -fsanitize-trap optional, and likewise default
it to 'all', and express the aliases for these flags in the .td file
rather than in code. (Plus documentation updates for the above.)

Reviewers: kcc

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77753
2020-04-17 22:37:30 -07:00
Lei Huang 10b60dde76 [PowerPC] Refactor ppcUserFeaturesCheck()
Summary: This function keeps growing, refactor to use lambda.

Reviewers: nemanjai, stefanp

Subscribers: kbarton, shchenz, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78308
2020-04-17 15:19:46 -05:00
Matt Arsenault 3a61245050 clang/AMDGPU: Assume denormals are enabled for the default target.
Since the default logic was based on having fast denormal/fma
features, and the default target has no features, we assumed flushing
by default. This fixes incorrectly assuming flushing in builds for
"generic" IR libraries.

The handling for no specified --cuda-gpu-arch in HIP is kind of
broken. Somewhere else forces a default target of gfx803, which does
not enable denormal handling by default. We don't see this default
switching here, so you'll end up with a different denormal mode
depending on whether you explicitly requested gfx803, or used it by
default.
2020-04-15 09:17:26 -04:00
Sam Clegg 3ea1c62cba [WebAssembly] Emit .llvmcmd and .llvmbc as custom sections
Fixes: https://bugs.llvm.org/show_bug.cgi?id=45362

Differential Revision: https://reviews.llvm.org/D77115
2020-04-14 13:24:18 -07:00
Jon Roelofs 38b39c34ab [clang] Add missing FileCheck colons 2020-04-14 12:32:48 -06:00
Scott Constable 539163affe [X86] Add tests to clang Driver to ensure that SLH/Retpoline features are not enabled with LVI-CFI
Differential Revision: https://reviews.llvm.org/D77427
2020-04-14 10:47:27 -07:00
Matt Arsenault dc89a3efb4 HIP: Fix handling of denormal mode
I didn't realize HIP was a distinct offloading kind, so the subtarget
was looking for -march, which isn't correct for HIP. We also have the
possibility of different denormal defaults in the case of multiple
offload targets, so we need to thread the JobAction through the target
hook.
2020-04-13 11:48:45 -07:00
Alexander Kornienko 8dda0f9199 Remove dependency between test files.
There seems to be no good reason for rocm-device-libs.cl to depend on opencl.cl.
Removed this dependency to unbreak the tests in our setup.
2020-04-13 06:19:09 +02:00
Matt Arsenault 1e93b3d8a7 Disable test on windows 2020-04-10 18:48:18 -04:00
Matt Arsenault 4593e4131a AMDGPU: Teach toolchain to link rocm device libs
Currently the library is separately linked, but this isn't correct to
implement fast math flags correctly. Each module should get the
version of the library appropriate for its combination of fast math
and related flags, with the attributes propagated into its functions
and internalized.

HIP already maintains the list of libraries, but this is not used for
OpenCL. Unfortunately, HIP uses a separate --hip-device-lib argument,
despite both languages using the same bitcode library. Eventually
these two searches need to be merged.

An additional problem is there are 3 different locations the libraries
are installed, depending on which build is used. This also needs to be
consolidated (or at least the search logic needs to deal with this
unnecessary complexity).
2020-04-10 13:37:32 -04:00
Simon Cook dd1ee6dc07 [RISCV] Support experimental/unratified extensions
This adds support for enabling experimental/unratified RISC-V ISA
extensions in the -march string in the case where an explicit version
number has been declared, and the -menable-experimental-extensions flag
has been provided.

This follows the design as discussed on the mailing lists in the
following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html

Since the RISC-V toolchain definition currently rejects any extension
with an explicit version number, the parsing logic has been tweaked to
support this, and to allow standard extensions to have their versions
checked in future patches.

The bitmanip 'b' extension has been added as a first use of this support,
it should easily extend to other as yet unratified extensions (such as
the vector 'v' extension).

Differential Revision: https://reviews.llvm.org/D73891
2020-04-09 18:04:22 +01:00
Sid Manning 9bda29ab0f [Hexagon] Default linker tests can fail if CLANG_DEFAULT_LINKER is used.
These values are not always known since there is a configuration
option to set the default linker, CLANG_DEFAULT_LINKER.

Differential Revision: https://reviews.llvm.org/D77684
2020-04-09 08:36:50 -05:00
Shengchen Kan 792b10978d [Driver][X86] Add -mpad-max-prefix-size
Summary:
The option `-mpad-max-prefix-size` performs some checking and delegate to MC option `-x86-pad-max-prefix-size`. This option is designed for eliminate NOPs when we need to align something by adding redundant prefixes to instructions, e.g. it can be used along with `-malign-branch`, `-malign-branch-boundary` to prefix padding branch.

It has similar (but slightly different) effect as GAS's option `-malign-branch-prefix-size`, e.g. `-mpad-max-prefix-size` can also elminate NOPs emitted by align directive, so we use a different name here. I remove the option `-malign-branch-prefix-size` since is unimplemented and not needed. If we need to be compatible with GAS, we can make `-malign-branch-prefix-size` an alias for this option later.

Reviewers: jyknight, reames, MaskRay, craig.topper, LuoYuanke

Reviewed By: MaskRay, LuoYuanke

Subscribers: annita.zhang, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77628
2020-04-09 19:34:12 +08:00
Pratyai Mazumder ced398fdc8 [SanitizerCoverage] Add -fsanitize-coverage=inline-bool-flag
Reviewers: kcc, vitalybuka

Reviewed By: vitalybuka

Subscribers: cfe-commits, llvm-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77637
2020-04-09 02:40:55 -07:00
WangTianQing a3dc949000 [X86] Add TSXLDTRK instructions.
Summary: For more details about these instructions, please refer to the latest ISE document: https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

Reviewers: craig.topper, RKSimon, LuoYuanke

Reviewed By: craig.topper

Subscribers: mgorny, hiraditya, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77205
2020-04-09 13:17:29 +08:00
Fangrui Song 969b91af73 [Driver] Default arm-linux-androideabi to -z max-page-size=4096
Similar to D55029. The requirement arises when discussing increasing
default max-page-size for lld ARM (D77330).

For the record, the default max-page-size on the 3 commonly used linkers:

* GNU ld since 2014 (https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=7572ca8989ead4c3425a1500bc241eaaeffa2c89) defaults to 65536
* GNU gold remains 4096
* lld<=10 uses 4096. lld from 11 onwards will use 65536 (D77330)

Reviewed By: srhines, thieta

Differential Revision: https://reviews.llvm.org/D77746
2020-04-08 12:05:28 -07:00
Artem Belevich d2e498b172 [CUDA] Improve testing of libdevice detection.
Added new testcases for libdevice in CUDA-9+ and removed unused checks.

Differential Revision: https://reviews.llvm.org/D77688
2020-04-08 11:19:45 -07:00
Francis Visoiu Mistrih 9e6670b03c [Driver] Only pass LTO remark arguments if the driver asks for it
Previous fix missed a check to willEmitRemarks, causing remarks to
always be enabled for LTO.
2020-04-07 14:11:47 -07:00