2e5aeff676
convertToSignExtendedInteger should return opInvalidOp instead of asserting if sematics of float does not allow arithmetics.
...
llvm-svn: 60042
2008-11-25 19:00:29 +00:00
910046d174
CellSPU:
...
(a) Remove conditionally removed code in SelectXAddr. Basically, hope for the
best that the A-form and D-form address predicates catch everything before
the code decides to emit a X-form address.
(b) Expand vector store test cases to include the usual suspects.
llvm-svn: 60034
2008-11-25 17:29:43 +00:00
5149430c6e
CellSPU: test should use shlqby, not shlqbyi
...
llvm-svn: 60001
2008-11-25 01:30:37 +00:00
aec5a56446
XFAIL this test. A recent CellSPU check-in broke it.
...
llvm-svn: 60000
2008-11-25 00:56:34 +00:00
ad2134d45d
Initial support for anti-dependence breaking. Currently this code does not
...
introduce any new spilling; it just uses unused registers.
Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.
llvm-svn: 59999
2008-11-25 00:52:40 +00:00
a307020800
Testcase for constant CFStrings.
...
llvm-svn: 59992
2008-11-24 23:28:09 +00:00
18065ce9fc
reenable test
...
llvm-svn: 59986
2008-11-24 21:27:20 +00:00
e6fe59df6d
Temporarily XFAIL this test. r59976 and r59972 broke it.
...
llvm-svn: 59981
2008-11-24 20:43:33 +00:00
53d6a07869
Fix 3113: If we have a dead cyclic PHI, replace the whole thing
...
with an undef.
llvm-svn: 59972
2008-11-24 19:25:36 +00:00
2e5df906f8
CellSPU:
...
(a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to
directly zero-extend i32 to i64, but use rotates and shifts for
sign extension. Also ensure unified register consistency.
(b) Add new test harness for i64 operations: i64ops.ll
llvm-svn: 59970
2008-11-24 18:20:46 +00:00
efc8c7a292
CellSPU:
...
(a) Improve the extract element code: there's no need to do gymnastics with
rotates into the preferred slot if a shuffle will do the same thing.
(b) Rename a couple of SPUISD pseudo-instructions for readability and better
semantic correspondence.
(c) Fix i64 sign/any/zero extension lowering.
llvm-svn: 59965
2008-11-24 17:11:17 +00:00
411eaa5c57
Test add-with-overflow with fast ISel.
...
llvm-svn: 59945
2008-11-24 05:23:38 +00:00
f5ffcbcd0b
Extend the 'noalias' attribute to function return values. This is intended to
...
indicate functions that allocate, such as operator new, or list::insert. The
actual definition is slightly less strict (for now).
No changes to the bitcode reader/writer, asm printer or verifier were needed.
llvm-svn: 59934
2008-11-24 03:41:24 +00:00
2278f8f5e1
Add support for llvm.uadd.with.overflow.
...
llvm-svn: 59926
2008-11-24 01:38:29 +00:00
0be0339baa
CellSPU: Fix bug 3056. Varadic extract_element was not implemented (nor was it
...
ever conceived to occur).
llvm-svn: 59891
2008-11-22 23:50:42 +00:00
07d726ec4d
Optimize (x/y)*y into x-(x%y) in general. Div and rem are about the same, and
...
a subtract is cheaper than a multiply. This generalizes an existing transform.
llvm-svn: 59800
2008-11-21 07:33:58 +00:00
c6918c1ffa
CellSPU:
...
(a) Fix bgs 3052, 3057
(b) Incorporate Duncan's suggestions re: i1 promotion
(c) Indentation updates.
llvm-svn: 59790
2008-11-21 02:56:16 +00:00
d10202bfb1
Add generic test for add with overflow.
...
llvm-svn: 59781
2008-11-21 02:15:51 +00:00
52aece7eff
Test -pre-RA-sched=fast too, for completeness.
...
llvm-svn: 59741
2008-11-20 19:26:04 +00:00
c22215a090
- Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction.
...
- When scavenging a register, in addition to the spill, insert a restore before the first use.
- Abort if client is looking to scavenge a register even when a previously scavenged register is still live.
llvm-svn: 59697
2008-11-20 02:32:35 +00:00
7ed6c5317c
If there are two consecutive llvm.dbg.stoppoint calls then
...
it is likely that the optimizer deleted code in between these
two intrinsics. Keep only the last llvm.dbg.stoppoint in this case.
llvm-svn: 59657
2008-11-19 18:56:50 +00:00
7f480e04eb
Revert r59640. It broke this test for builds that aren't
...
configured with llvm-gcc.
llvm-svn: 59641
2008-11-19 16:24:37 +00:00
f09aabfe70
Use %llvmgcc -xassembler instead of invoking as directly. This avoids
...
problems for example when LLVM is built with --with-extra-options=-m64
and as defaults to x86-32 mode.
llvm-svn: 59640
2008-11-19 16:02:14 +00:00
1af37c2fca
Add support for rematerialization in pre-alloc-splitting.
...
llvm-svn: 59587
2008-11-19 04:28:29 +00:00
45535f3f22
LLVMC2: -emit-llvm stops compilation.
...
llvm-svn: 59586
2008-11-19 04:15:56 +00:00
2dd5aa4f11
LLVMC2: Teach llvm_gcc_c tool about -include and -fsyntax-only.
...
- Only focusing on llvm_gcc_c for now, eventually this needs to be
refactored so it can be shared via all the gcc-like tools.
llvm-svn: 59582
2008-11-19 02:59:00 +00:00
3095c32c89
Register scavenger should process early clobber defs first. A dead early clobber def should not interfere with a normal def which happens one slot later.
...
llvm-svn: 59559
2008-11-18 22:28:38 +00:00
1c451ae43e
Add a utility function that detects whether a loop is guaranteed to be finite.
...
Use it to safely handle less-than-or-equals-to exit conditions in loops. These
also occur when the loop exit branch is exit on true because SCEV inverses the
icmp predicate.
Use it again to handle non-zero strides, but only with an unsigned comparison
in the exit condition.
llvm-svn: 59528
2008-11-18 15:10:54 +00:00
1315f80ea8
Reapply r59464, this time using the correct type
...
when softening FNEG.
llvm-svn: 59513
2008-11-18 09:15:03 +00:00
c6c6dc5b90
A simple test for stack protectors. This should be valid on all platforms.
...
llvm-svn: 59505
2008-11-18 07:34:50 +00:00
e0d5e67c98
Revert r59464. It was causing this failure:
...
Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll
Failed with signal(SIGABRT) at line 1
while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll | llc -march=xcore > fneg.ll.tmp1.s
Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913.
0 llc 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844
1 libSystem.B.dylib 0x9217809b _sigtramp + 43
2 ??? 0xffffffff 0x0 + 4294967295
3 libSystem.B.dylib 0x921f0ec2 raise + 26
4 libSystem.B.dylib 0x9220047f abort + 73
5 libSystem.B.dylib 0x921f2063 __assert_rtn + 101
6 llc 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1
make: *** [check] Error 2
llvm-svn: 59487
2008-11-18 01:49:24 +00:00
f1e9329209
Give SIToFPInst preference over UIToFPInst because it is faster on platforms that are widely used.
...
llvm-svn: 59476
2008-11-18 00:40:02 +00:00
180afd2c55
While handling floating point IVs lift restrictions on initial value and increment value.
...
llvm-svn: 59471
2008-11-17 23:27:13 +00:00
f046b50ecd
Add soft float support for a bunch more operations. Original
...
patch by Richard Osborne, tweaked and extended by your humble
servant.
llvm-svn: 59464
2008-11-17 20:52:38 +00:00
39b34e6d32
Remove these, which test for optimizations that
...
are not currently done (cf PowerPC/README.txt).
llvm-svn: 59456
2008-11-17 18:57:45 +00:00
6751b4a604
Don't produce ADDC/ADDE when expanding SHL unless they are legal
...
for the target. This fixes PR3080.
llvm-svn: 59450
2008-11-17 17:34:31 +00:00
41df63945d
Removed 2008-10-17-SpillerBug.ll as it does not provide an accurate test of PR2898.
...
llvm-svn: 59431
2008-11-16 23:30:12 +00:00
782ec1a746
2008-10-17-SpillerBug.ll is currently failing, but this doesn't reflect an actual regression of PR2898. This test should probably be removed. I've XFAILed it for now to keep buildbot quiet while this is considered.
...
llvm-svn: 59415
2008-11-16 13:11:09 +00:00
7a82474387
Improved shuffle normalization to avoid using extract/build when we
...
can extract using different indexes for two vectors. Added a few tests
for vector shuffles.
llvm-svn: 59399
2008-11-16 05:06:27 +00:00
c3f3b059d0
Handle the case where there is no "not". It is possible it got
...
folded into the select.
llvm-svn: 59389
2008-11-16 04:25:26 +00:00
645f60141b
make this actually test what it is trying to.
...
llvm-svn: 59386
2008-11-16 04:21:51 +00:00
625c6f79b2
Don't brute-force analyze cubic or higher polynomials.
...
If this patch causes a performance regression for anyone, please let me know,
and it can be fixed in a different way with much more effort.
llvm-svn: 59384
2008-11-16 04:14:25 +00:00
967aeeb400
Correct this error message.
...
llvm-svn: 59370
2008-11-15 17:50:47 +00:00
5fe5933909
[XCore] Fix expansion of 64 bit add/sub. Don't custom expand
...
these operations if ladd/lsub are not available on the current
subtarget.
llvm-svn: 59305
2008-11-14 15:59:19 +00:00
d16b37efae
Add XCore intrinsics for getid (returns thread id) and bitrev (reverses
...
bits in a word).
llvm-svn: 59296
2008-11-14 10:12:16 +00:00
072734ebd6
Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
...
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.
The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.
llvm-svn: 59273
2008-11-13 23:24:17 +00:00
b47f6d3237
testcase for PR 1779.
...
llvm-svn: 59268
2008-11-13 22:17:10 +00:00
9aa657663a
Added testcase for r59214.
...
llvm-svn: 59218
2008-11-13 04:09:04 +00:00
129f4febd2
Add test case for ptr annotation.
...
llvm-svn: 59142
2008-11-12 16:12:27 +00:00
aa7060c885
Correct some thinkos in the expansion of ADD/SUB
...
when the target does not support ADDC/SUBC. This
fixes PR3044.
llvm-svn: 59120
2008-11-12 08:23:26 +00:00
Evan Cheng