Commit Graph

280467 Commits

Author SHA1 Message Date
Volkan Keles f7f2568613 [GlobalISel][TableGen] Add support for SDNodeXForm
Summary:
This patch adds CustomRenderer which renders the matched
operands to the specified instruction.

Targets can enable the matching of SDNodeXForm by adding
a definition that inherits from GICustomOperandRenderer and
GISDNodeXFormEquiv as follows.

def gi_imm8 : GICustomOperandRenderer<"renderImm8”>,
                       GISDNodeXFormEquiv<imm8_xform>;

Custom renderer functions should be of the form:
void render(MachineInstrBuilder &MIB, const MachineInstr &I);

Reviewers: dsanders, ab, rovka

Reviewed By: dsanders

Subscribers: kristof.beyls, javed.absar, llvm-commits, mgrang, qcolombet

Differential Revision: https://reviews.llvm.org/D42012

llvm-svn: 322582
2018-01-16 18:44:05 +00:00
Michael Kruse a0db63a195 [IslTools] dumpPw: Dump same structure pieces together.
Print same or similar structure elements together. Previously, the
value could take more importance that the space structure if visited
first in the space nest tree.

Before:
{
  Left[0] -> Right[i]: i >= 0;
  Left[1] -> AnotherRight[i];
  Left[2] -> Right[-1]
}

After:
{
  Left[0] -> Right[i]: i >= 0;
  Left[2] -> Right[-1];
  Left[1] -> AnotherRight[i]
}

llvm-svn: 322581
2018-01-16 18:39:42 +00:00
Rafael Espindola 3c3544652b Fix another case we were using the wrong visibility.
llvm-svn: 322580
2018-01-16 18:21:23 +00:00
Alexey Bataev 6977dbcc7b [SLP] Fix for PR32164: Improve vectorization of reverse order of extract operations.
Summary: Sometimes vectorization of insertelement instructions with extractelement operands may produce an extra shuffle operation, if these operands are in the reverse order. Patch tries to improve this situation by the reordering of the operands to remove this extra shuffle operation.

Reviewers: mkuper, hfinkel, RKSimon, spatel

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D33954

llvm-svn: 322579
2018-01-16 18:17:01 +00:00
Alexey Bataev d60d1baadb [OPENMP] Add support for `depend` clauses on `target parallel for simd`
directives.

Added codegen for `depend` clauses on `#pragma omp target parallel for
simd` directives.

llvm-svn: 322578
2018-01-16 17:55:15 +00:00
Alexey Bataev 8ed89551e2 [OPENMP] Add support for `depend` clauses on `target parallel for`
directives.

Added codegen for `depend` clause on `#pragma omp target parallel for`
directives.

llvm-svn: 322577
2018-01-16 17:41:04 +00:00
Rafael Espindola 37e4e695e9 Use the combined visibility when computing dso_local.
We track both the combined visibility that will be used for the output
symbol and the original input visibility of the selected symbol.

Almost everything should use the computed visibility.

I will make the names less confusing an a followup patch.

llvm-svn: 322576
2018-01-16 17:34:26 +00:00
Alexey Bataev 8d16a43416 [OPENMP] Add support for `depend` clauses on `target teams distribute
simd` directives.

Added codegen for `depend` clauses on `#pragma omp target teams
distribute simd` directives.

llvm-svn: 322575
2018-01-16 17:22:50 +00:00
Simon Pilgrim 3e0aafbfcc [X86][MMX] Accept UNDEF upper bits for MOVD GR32->MMX
llvm-svn: 322574
2018-01-16 17:01:31 +00:00
Nico Weber dab736f16d Add va_start()/va_copy()/va_end to Builtins.def
That way, clang suggests including stdarg.h when these are used in C files.
https://reviews.llvm.org/D42085

llvm-svn: 322573
2018-01-16 16:55:41 +00:00
Rafael Espindola c6df38c985 Set dso_local in lld.
We were already doing this in gold, but not in lld.

llvm-svn: 322572
2018-01-16 16:49:05 +00:00
Alexey Bataev 79df756d1f [OPENMP] Add support for `depend` clause on `target teams distribute`.
Added codegen for `depend` clauses on `#pragma omp target teams
distribute` directives.

llvm-svn: 322571
2018-01-16 16:46:46 +00:00
Alexey Bataev 54d5c7dc44 [OPENMP] Add support for `depend` clauses on `target parallel` directive.
Added codegen for `depend` clauses on `#pragma omp target parallel`
directives.

llvm-svn: 322570
2018-01-16 16:27:49 +00:00
Alexey Bataev 0c869ef21c [OPENMP] Add support for `depend` clauses on `target teams`.
Added codegen for `depend` clause on `#pragma omp target teams`
directives.

llvm-svn: 322569
2018-01-16 15:57:07 +00:00
Petar Jovanovic 76d619b509 [LiveDebugValues] update kill-after-spill test with target triple
Set target triple to "x86_64-unknown-linux-gnu".

llvm-svn: 322568
2018-01-16 15:57:03 +00:00
Marshall Clow 12f0a77902 More constexpr algorithms from P0202. search/search_n
llvm-svn: 322566
2018-01-16 15:48:27 +00:00
Ulrich Weigand e1d2d22d2a [SystemZ] Support vector registers with inline asm
Allow using vector register names and the "v" constraint
in inline asm to ensure compatibility with GCC.

llvm-svn: 322562
2018-01-16 15:39:23 +00:00
Alexey Bataev f41c88fd50 [OPENMP] Add support for `depend` clauses on `target simd`.
Added codegen for `depend` clauses on `#pragma omp target simd`
directives.

llvm-svn: 322559
2018-01-16 15:05:16 +00:00
Marshall Clow a58bdf9f69 Change an internal table of constants for the poisson distribution from
type 'result_type' to 'double'. The only thing that we ever do with
these numbers is to promote them to 'double' and use them in a division.
For small result_types, the values were getting truncated, skewing the
results. Thanks to James Nagurne for the suggestion.

llvm-svn: 322556
2018-01-16 14:54:36 +00:00
Petar Jovanovic 0b464e4f0e [LiveDebugValues] recognize spilled reg killed in instruction after spill
Current condition for spill instruction recognition in LiveDebugValues does
not recognize case when register is spilled and killed in next instruction.

Patch by Nikola Prica.

Differential Revision: https://reviews.llvm.org/D41226

llvm-svn: 322554
2018-01-16 14:46:05 +00:00
Simon Pilgrim 85e6139633 [X86][MMX] Improve MMX constant generation
Extend the MMX zero code to take any constant with zero'd upper 32-bits

llvm-svn: 322553
2018-01-16 14:21:28 +00:00
Hiroshi Inoue 760c0c9ed3 [NFC] fix trivial typos in documents
"the the" -> "the"

llvm-svn: 322552
2018-01-16 13:19:48 +00:00
Hiroshi Inoue c961e25e07 [NFC] fix trivial typo in document
"the the" -> "the"

llvm-svn: 322551
2018-01-16 13:19:31 +00:00
Sam McCall 63903569eb Squash -Wcovered-switch-default wairning
llvm-svn: 322549
2018-01-16 12:54:28 +00:00
Sam McCall 091b1efafb Ensure code complete with !LoadExternal sees all local decls.
Summary:
noload_lookups() was too lazy: in addition to avoiding external decls, it
avoided populating the lazy lookup structure for internal decls.
This is the right behavior for the existing callsite in ASTDumper, but I think
it's not a very useful default, so we populate it by default.

While here:
 - remove an unused test file accidentally added in r322371.
 - remove lookups_begin()/lookups_end() in favor of lookups().begin(), which is
   more common and more efficient.

Reviewers: ilya-biryukov

Subscribers: cfe-commits, rsmith

Differential Revision: https://reviews.llvm.org/D42077

llvm-svn: 322548
2018-01-16 12:33:46 +00:00
Sam McCall 2c3849af22 [clangd] Avoid combinatorial explosion in CodeCompleteTests.
Summary:
This test dominates our unit test runtime, and the change speeds it up by 10x.
We lose coverage of some combinations of flags, but I'm not sure that's finding
many bugs.

3300 -> 300ms on my machine (3800 -> 800ms for the whole of CompletionTest).

Reviewers: ilya-biryukov

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D42063

llvm-svn: 322547
2018-01-16 12:21:24 +00:00
Ivan Donchevskii 4cab0fec44 Add missing CINDEX_LINKAGE
Follow up for [libclang] Add PrintingPolicy for pretty printing declarations

Differential Revision: https://reviews.llvm.org/D39903

llvm-svn: 322546
2018-01-16 12:11:59 +00:00
Gadi Haber 76ce3d9e8d [X86][I86,I186,I286,I386,I486,PPRO, MMX]: Adding full coverage of MC encoding for the I86, I186, I286, I386, I486, PPRO and MMX isa sets.<NFC>
NFC.
 Adding MC regressions tests to cover the I86, I186, I286, I386, I486, PPRO and MMX isa sets.
 This patch is part of a larger task to cover MC encoding of all X86 ISA Sets.
 Started in revision: https://reviews.llvm.org/D39952

Reviewers: zvi, RKSimon, AndreiGrischenko, craig.topper
Differential Revision: https://reviews.llvm.org/D40879

Change-Id: I231a35861611bfd3d23c74cc59507373f021a629
llvm-svn: 322544
2018-01-16 11:33:45 +00:00
Jonas Devlieghere 6f24c8778c [DebugInfo] Unify dumping of address ranges
Summary:
This patch unifies the printing of address ranges as [0x0, 0x1).

rdar://34822059

Reviewers: aprantl, dblaikie

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D42056

llvm-svn: 322543
2018-01-16 11:17:57 +00:00
Francis Visoiu Mistrih 5eaddb3f68 [CodeGen] Remove special case of printing subRegIdx from MachineInstr::print
Support in MachineOperand has been added in r320209. No need to special
case this anymore.

llvm-svn: 322542
2018-01-16 10:53:14 +00:00
Francis Visoiu Mistrih ecd0b83312 [CodeGen][NFC] Correct case for printSubRegIdx
llvm-svn: 322541
2018-01-16 10:53:11 +00:00
Jonathan Coe 45ef5036c9 [libclang] Add PrintingPolicy for pretty printing declarations
Summary:
Introduce clang_getCursorPrettyPrinted() for pretty printing
declarations. Expose also PrintingPolicy, so the user gets more
fine-grained control of the entities being printed.

The already existing clang_getCursorDisplayName() is pretty limited -
for example, it does not handle return types, parameter names or default
arguments for function declarations. Addressing these issues in
clang_getCursorDisplayName() would mean to duplicate existing code
(e.g. clang::DeclPrinter), so rather expose new API to access the
existing functionality.

Reviewed By: jbcoe

Subscribers: cfe-commits

Tags: #clang

Patch by nik (Nikolai Kosjar)

Differential Revision: https://reviews.llvm.org/D39903

llvm-svn: 322540
2018-01-16 10:19:56 +00:00
Clement Courbet 639a398098 Add a value_type to ArrayRef.
Summary: Not sure this needs a review or not. Erring on the safe side.

Reviewers: dblaikie

Differential Revision: https://reviews.llvm.org/D41666

llvm-svn: 322538
2018-01-16 09:11:20 +00:00
Gadi Haber a6bc5f954c [X86][XSAVE]: Adding full coverage of MC encoding for the XSAVE isa sets.<NFC>
NFC.
 Adding MC regressions tests to cover the XSAVE ISA sets.
 This patch is part of a larger task to cover MC encoding of all X86 ISA Sets started in revision: https://reviews.llvm.org/D39952

Reviewers: zvi, RKSimon, AndreiGrischenko, craig.topper
Differential Revision: https://reviews.llvm.org/D41282

Change-Id: I325bf8f421f78c80179a04fc39033366759cbe45
llvm-svn: 322537
2018-01-16 08:50:29 +00:00
George Rimar 83e63d96a9 [FileCheck] - Fix possible buffer out of bounds access when parsing --check-prefix.
FileCheck tool crashes when trying to parse --check-prefix argument if there is no any
data after it.

For example test like following would crash if there are no symbols and no EOL mark after `boom`:

# REQUIRES: x86
# RUN: <skipped few lines>
# RUN: llvm-readobj -t %t | FileCheck %s --check-prefix=boom

Patch fixes the issue.

Differential revision: https://reviews.llvm.org/D42057

llvm-svn: 322536
2018-01-16 08:09:24 +00:00
Yonghong Song 035dd256d5 [BPF] Mark pseudo insn patterns as isCodeGenOnly
These pseudos are not supposed to be visible to user.

This patch reduced the auto-generated instruction matcher. For example,
the following words are removed from keyword list of LLVM BPF assembler.

-  MCK__35_, // '#'
-  MCK__COLON_, // ':'
-  MCK__63_, // '?'
-  MCK_ADJCALLSTACKDOWN, // 'ADJCALLSTACKDOWN'
-  MCK_ADJCALLSTACKUP, // 'ADJCALLSTACKUP'
-  MCK_PSEUDO, // 'PSEUDO'
-  MCK_Select, // 'Select'

Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 322535
2018-01-16 07:27:20 +00:00
Yonghong Song b42c7c7863 [BPF] Teach DAG2DAG AND elimination about load intrinsics
As commented on the existing code:

  // The Reg operand should be a virtual register, which is defined
  // outside the current basic block. DAG combiner has done a pretty
  // good job in removing truncating inside a single basic block.

However, when the Reg operand comes from bpf_load_[byte | half | word]
intrinsics, the generic optimizer doesn't understand their results are
zero extended, so these single basic block elimination opportunities were
missed.

Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 322534
2018-01-16 07:27:19 +00:00
Hiroshi Inoue 99a8faa615 [SROA] fix assetion failure
This patch fixes the assertion failure in SROA reported in PR35657.
PR35657 reports the assertion failure due to r319522 (splitting for non-whole-alloca slices), but this problem can happen even without r319522.

The problem exists in a check for reusing an existing alloca when rewriting partitions. As the original comment said, we can reuse the existing alloca if the new alloca has the same type and offset with the existing one. But the code checks only type of the alloca and then check the offset using an assert.
In a corner case with out-of-bounds access (e.g. @PR35657 function added in unit test), it is possible that the two allocas have the same type but different offsets.

This patch makes the check of the offset in the if condition, and re-enables the splitting for non-whole-alloca slices.

Differential Revision: https://reviews.llvm.org/D41981

llvm-svn: 322533
2018-01-16 06:23:05 +00:00
Craig Topper 7a0c601f95 [X86] Revisit the fix I made years ago to make 'xchgl %eax, %eax' not encode using the 0x90 encoding in 64-bit mode.
Prior to this we had a separate instruction and register class that excluded eax to prevent matching the instruction that would encode with 0x90.

This patch changes this to just use an InstAlias to force xchgl %eax, %eax to use XCHG32rr instruction in 64-bit mode. This gets rid of the separate instruction and register class.

llvm-svn: 322532
2018-01-16 06:07:16 +00:00
Craig Topper daa385f480 [X86] Make 'xchgq %rax, %rax' an alias for the 0x90 nop encoding to match gas.
Previously we encoded it as 0x48 0x90.

llvm-svn: 322531
2018-01-16 06:07:14 +00:00
George Burgess IV d74b6a8f64 [Sema] Fix a crash on invalid features in multiversioning
We were trying to emit a diag::err_bad_multiversion_option diagnostic,
which expects an int as its first argument, with a string argument. As
it happens, the string `Feature` that was causing this was shadowing an
int `Feature` from the surrounding scope. :)

llvm-svn: 322530
2018-01-16 03:01:50 +00:00
Marshall Clow d57c03ddca More constexpr algorithms from P0202: lower_bound, upper_bound, equal_range, binary_search
llvm-svn: 322529
2018-01-16 02:34:41 +00:00
Marshall Clow a38c495f22 Actually CALL the constexpr tests.
llvm-svn: 322528
2018-01-16 02:11:13 +00:00
Marshall Clow 6538e28d5d More constexpr (re P0202) - equal and mismatch
llvm-svn: 322527
2018-01-16 02:04:10 +00:00
Simon Pilgrim e5dad1365c Avoid Wparentheses warning.
llvm-svn: 322526
2018-01-15 22:40:06 +00:00
Simon Pilgrim 85bd9141ca [X86][MMX] Add support for MMX zero vector creation
As mentioned on PR35869, (and came up recently on D41517) we don't create a MMX zero register via the PXOR but instead perform a spill to stack from a XMM zero register.

This patch adds support for direct MMX zero vector creation and should make it easier to add better constant vector creation in the future as well.

Differential Revision: https://reviews.llvm.org/D41908

llvm-svn: 322525
2018-01-15 22:32:40 +00:00
Simon Pilgrim 940eae3cc1 [X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
Add support for custom execution domain fixing and implement support for BLENDPD/BLENDPS/PBLENDD/PBLENDW.

Differential Revision: https://reviews.llvm.org/D42042

llvm-svn: 322524
2018-01-15 22:18:45 +00:00
Sanjay Patel 30265d0a47 [x86] add tests to show missed constant shrinking (PR35907); NFC
llvm-svn: 322523
2018-01-15 21:57:41 +00:00
Sanjay Patel fc74f71400 [x86] regenerate test checks; NFC
llvm-svn: 322522
2018-01-15 21:32:39 +00:00
Sanjay Patel b885f04695 [x86] regenerate test checks; NFC
llvm-svn: 322521
2018-01-15 21:28:52 +00:00