Commit Graph

428513 Commits

Author SHA1 Message Date
Florian Hahn 113887e79f
[BasicAA] Add test coverage from D76194. 2022-06-29 11:25:20 +01:00
Florian Hahn a25f82762d
[BasicAA] Convert test to use opaque pointers.
Using opaque pointers simplifies the tests quite a bit.
2022-06-29 11:25:13 +01:00
Christian Sigg f6d00bac77 Revert "Add default copy and move c'tor/assignment to PresburgerRelation."
This reverts commit 2cd468ef15.
2022-06-29 12:24:28 +02:00
Nicolai Hähnle 8de6d4b712 StandardInstrumentation: print verifier output to errs
Enabling the verifiers is not very helpful if their output is
suppressed beyond the fatal error.

Differential Revision: https://reviews.llvm.org/D128743
2022-06-29 12:11:55 +02:00
Christian Sigg 2cd468ef15 Add default copy and move c'tor/assignment to PresburgerRelation.
Differential Revision: https://reviews.llvm.org/D128789
2022-06-29 12:07:55 +02:00
Jolanta Jensen 32aac7babf [NFC] Switch FloatModeKind enum class to use bitmask enums
Using bitmask enums simplifies and clarifies the code.

Differential Revision: https://reviews.llvm.org/D128182
2022-06-29 11:02:02 +01:00
Nikita Popov 0af53fcb99 [SROA] Don't create constant expressions (NFC)
Use IRBuilder instead, which will fold these. Just to clarify
that this does not actually create any udiv expression.
2022-06-29 11:51:22 +02:00
Nikita Popov 24d6cc688f [SCCP] Regenerate test checks (NFC) 2022-06-29 11:24:29 +02:00
lewuathe 0180709590 [mlir][complex] Canonicalization for consecutive complex.neg
Consecutive complex.neg are redundant so that we can canonicalize them to the original operands.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D128781
2022-06-29 11:11:40 +02:00
Michael Daniels d8ad018869 [lldb] fix stepping through POSIX trampolines
The DynamicLoaderPOSIXDYLD::GetStepThroughTrampolinePlan() function was
doing the symbol lookup using the demangled name. This stopped working
with https://reviews.llvm.org/D118814. To get things working again, just
use the mangled name for the lookup instead.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D127999
2022-06-29 11:06:29 +02:00
Muhammad Omair Javaid 01bc838e45 [LLDB] Add PDB/calling-conventions.test for Arm/Windows
This patch renames PDB/calling-conventions.test to calling-conventions-x86.test.
Also restrict it to run only for target-x86*.
This patch also adds a arm specific test PDB/calling-conventions-arm.test which
tests that x86 specifc calling convention decorators are ignored by Arm compiler.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D128678
2022-06-29 12:58:16 +04:00
Muhammad Omair Javaid a18baf16c6 [LLDB] Add Arm64 CodeView to LLDB regnum mapping
This patch writes a mapping structure for converting  CodeView Arm64 register numbers to LLDB Arm64 regnums.

This fixes various symbols and variable location test failures on AArch64/Windows.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D128221
2022-06-29 12:50:57 +04:00
Muhammad Omair Javaid 695c22c84a [LLDB] Fix PDB/pointers.test for 32bit Arm/Windows
PDB/pointers.test was orignally written for 32bit x86 keeping in mind
__cdecl and __stdcall calling conventions which does name mangling for
example like adding "_" underscore before function name.
This is only x86 specific but purpose of pointers.test is NOT to test
calling convention.
I am have made a few minor changes to this test which will make it pass
when run on Windows/Arm platform.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D128668
2022-06-29 12:47:02 +04:00
Nikita Popov 16033ffdd9 [ConstExpr] Remove more leftovers of extractvalue expression (NFC)
Remove some leftover bits of extractvalue handling after the
removal in D125795.
2022-06-29 10:45:19 +02:00
Fangrui Song 9d4a2baaa2 [flang][test] Remove RUN COMMANDS/EXPECTED OUTPUT/INPUT markers from test/Driver
Uses of these markers are contrary to all other llvm-project subprojects
and carry no information for people who know the basics of a lit test.

I understand that there is an argument "this makes beginners get started
quickly" but I am unsure whether this is strong enough to deviate from
all other projects. https://llvm.org/docs/TestingGuide.html covers the
basics. Actually, some contributors were confused by the markers.

Differential Revision: https://reviews.llvm.org/D128763
2022-06-29 01:06:01 -07:00
Nikita Popov 348ea34bcd [AsmPrinter] Further restrict expressions supported in global initializers
lowerConstant() currently accepts a number of constant expressions
which have corresponding MC expressions, but which cannot be
evaluated as a relocatable expression (unless the operands are
constant, in which case we'll just fold the expression to a constant).

The motivation here is to clarify which constant expressions are
really needed for https://discourse.llvm.org/t/rfc-remove-most-constant-expressions/63179,
and in particular clarify that we do not need to support any
division expressions, which are particularly problematic.

Differential Revision: https://reviews.llvm.org/D127972
2022-06-29 10:02:07 +02:00
Amir Ayupov a97a79da02 [TableGen] Add a knob for MCOperandInfo expansion in gen-instr-info
Control the MCOperandInfo expansion with `-instr-info-expand-mi-operand-info`.
For X86, this would make it possible to see memory operand type e.g.:
```
    /* MOV8rm */
    GR8, i8mem,
    /* MOV8rm_NOREX */
    GR8_NOREX, i8mem_NOREX,
```

The intended use is a follow-up diff D126116 (`getMemOperandSize`).

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D127932
2022-06-29 00:59:16 -07:00
Andrzej Warzynski b405407a48 [clang][flang] Disable defaulting to `-fpie` for LLVM Flang
In, https://reviews.llvm.org/D120305, CLANG_DEFAULT_PIE_ON_LINUX was set
to `On` by default. However, neither `-fpie` nor `-fpic` are currently
supported in LLVM Flang. Hence, in this patch the behaviour controlled
with CLANG_DEFAULT_PIE_ON_LINUX is refined not to apply to Flang.

Another way to look at this is that CLANG_DEFAULT_PIE_ON_LINUX is
currently affecting both Clang and Flang. IIUC, the intention for this
CMake variable has always been to only affect Clang. This patch makes
sure that that's the case.

Without this change, you might see errors like this on X86_64:
```
/usr/bin/ld: main.o: relocation R_X86_64_32 against `.bss' can not be used when making a PIE object; recompile with -fPIC
```
I've not experienced any issues on AArch64. That's probably because on
AArch64 some object files happen to be position independent without
needing -fpie or -fpic.

Differential Revision: https://reviews.llvm.org/D128333
2022-06-29 07:53:06 +00:00
Pavel Samolysov 3d9ce9e43d [ArgPromotion] Remove all the getters and ReplaceCallSite (NFC)
AARGetter is an abstraction over a source of the `AAResults` introduced
to support the legacy pass manager as well as the modern one. Since the
Argument Promotion pass doesn't support the legacy pass manager anymore,
the abstraction is not required and `AAResults` may be used directly.

The instance of the `FunctionAnalysisManager` is passed through the
functions to get all the required analyses just wherever they are
required and do not use the awkward getter callbacks.

The `ReplaceCallSite` parameter was required for the legacy pass manager
only and isn't used anymore, so the parameter has been eliminated.

Differential Revision: https://reviews.llvm.org/D128727
2022-06-29 10:45:11 +03:00
Pavel Samolysov 8958057fb1 [ArgPromotion] Move isDenselyPacked static member (NFC)
The `isDenselyPacked` static member of the `ArgumentPromotionPass` class
is not used in the class itself anymore. The single known user of the
function is in the `AttributorAttributes.cpp` file, so the function has
been moved into the file.

Differential Revision: https://reviews.llvm.org/D128725
2022-06-29 10:45:10 +03:00
Adrian Kuegel 0a6e29f455 Revert "[mlir][Presburger] Fix warning Wreturn-std-move (NFC)"
This reverts commit a4070a5e77.
It introduced another warning instead.
2022-06-29 09:22:36 +02:00
Huang Zhen-Hong b646f09555 [clang-format] Fix misplacement of `*` in declaration of pointer to struct
Fixes #55810

Differential Revision: https://reviews.llvm.org/D127873
2022-06-29 15:21:02 +08:00
Jose M Monsalve Diaz 616dd9ae14 [OpenMP] Implementing omp_get_device_num()
This patch implements omp_get_device_num() in the host and the device.

It uses the already existing getDeviceNum in the device config for the device.
And in the host it uses the omp_get_num_devices().

Two simple tests added

Differential Revision: https://reviews.llvm.org/D128347
2022-06-29 02:18:21 -05:00
luxufan cbeca742a4 [llvm-readobj][RISCV] Support dumping PT_RISCV_ATTRIBUTES
This patch drops the prefix `PT_RISCV_` when dumping `PT_RISCV_ATTRIBUTES`.

GNU readelf dumps it as `RISCV_ATTRIBUT`. Because GNU readelf uses
something like `%-14.14s` so only the first 14 bytes are printed.

Differential Revision: https://reviews.llvm.org/D128493
2022-06-29 15:13:45 +08:00
Adrian Kuegel a4070a5e77 [mlir][Presburger] Fix warning Wreturn-std-move (NFC) 2022-06-29 09:10:20 +02:00
Serguei Katkov e30d5bfeba [GuardWidening] Add tests showing incorrect behavior of GW.
The first test shows that combineRangeChecks may choose to keep only two poison conditions.
And we cannot do simple arithmetic or logical and in guard.
The second test shows that keeping two poison conditions in the widened guard may allow
execution of side-effect instruction even if just freeze these conditions.
The third test shows that even in simple test we can hoist a poison and even logical and does not help here.

Reviewed By: mkazantsev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D128779
2022-06-29 13:41:59 +07:00
Mark de Wever ffe262a198 [libc++][format] Improve pointer formatters.
This changes the implementation of the formatter. Instead of inheriting
from a specialized parser all formatters will use the same generic
parser. This reduces the binary size.

The new parser contains some additional fields only used in the chrono
formatting. Since this doesn't change the size of the parser the fields
are in the generic parser. The parser is designed to fit in 128-bit,
making it cheap to pass by value.

The new format function is a const member function. This isn't required
by the Standard yet, but it will be after LWG-3636 is accepted.
Additionally P2286 adds a formattable concept which requires the member
function to be const qualified in C++23. This paper is likely to be
accepted in the 2022 July plenary.

This is based on D125606. That commit did the groundwork and did similar
changes for the string formatters.

Depends on D128139.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D128671
2022-06-29 08:39:42 +02:00
lorenzo chelini 58a55107c2 [MLIR][Math] Improve docs for round op (NFC)
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D128662
2022-06-29 08:35:07 +02:00
esmeyi ff855f5ec0 Pass code-model through Module IR to [llc].
Currently, the code-model specified in IR can't be captured by [llc].
This patch fixes that.

Reviewed By: shchenz, MaskRay

Differential Revision: https://reviews.llvm.org/D128623
2022-06-29 02:30:13 -04:00
Mark de Wever 38adfa91a1 [libc++][format] Improve integral formatters.
This changes the implementation of the formatter. Instead of inheriting
from a specialized parser all formatters will use the same generic
parser. This reduces the binary size.

The new parser contains some additional fields only used in the chrono
formatting. Since this doesn't change the size of the parser the fields
are in the generic parser. The parser is designed to fit in 128-bit,
making it cheap to pass by value.

The new format function is a const member function. This isn't required
by the Standard yet, but it will be after LWG-3636 is accepted.
Additionally P2286 adds a formattable concept which requires the member
function to be const qualified in C++23. This paper is likely to be
accepted in the 2022 July plenary.

This is based on D125606. That commit did the groundwork and did similar
changes for the string formatters.

Depends on D125606

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D128139
2022-06-29 07:25:03 +02:00
Michał Górny 7fc12da898 [lldb] [test] Split TestGdbRemoteFork in two
Split the test that's gotten very long in two, in hope that it will
resolve the arm/aarch64 buildbot failures.  Even if it does not, it
could help pinpointing where the problem lies.

Sponsored by: The FreeBSD Foundation
2022-06-29 06:57:38 +02:00
Chuanqi Xu 9c04851cf5 [C++20] [Module] Support reachable definition initially/partially
This patch introduces a new kind of ModuleOwnershipKind as
ReachableWhenImported. This intended the status for reachable described
at: https://eel.is/c++draft/module.reach#3.

Note that this patch is not intended to support all semantics about
reachable semantics. For example, this patch didn't implement discarded
declarations in GMF. (https://eel.is/c++draft/module.global.frag#3).

This fixes: https://bugs.llvm.org/show_bug.cgi?id=52281 and
https://godbolt.org/z/81f3ocjfW.

Reviewed By: rsmith, iains

Differential Revision: https://reviews.llvm.org/D113545
2022-06-29 12:48:48 +08:00
Chuanqi Xu 7a541406b5 Revert "[C++20] [Modules] Implement Reachable initiallly"
This reverts commit a223ba0a69.

The previous commit don't contain additional information, which is bad.
2022-06-29 12:43:26 +08:00
Chuanqi Xu a223ba0a69 [C++20] [Modules] Implement Reachable initiallly 2022-06-29 12:32:31 +08:00
Peixin-Qiao 1795f8cd2e [NFC][OpenMP] Fix worksharing-loop
1. Remove the redundant collapse clause in MLIR OpenMP worksharing-loop
   operation.
2. Fix several typos.
3. Refactor the chunk size type conversion since CreateSExtOrTrunc has
   both type check and type conversion.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D128338
2022-06-29 12:20:03 +08:00
Chen Zheng 370127b7d5 [XCOFF] change default program code csect alignment to 32
This is the same with commercial XLC on AIX.

Reviewed By: Esme

Differential Revision: https://reviews.llvm.org/D114419
2022-06-29 04:16:01 +00:00
Chen Zheng 60a85726ed [XCOFF] make sure same number of paddings are added for DWARF sections
We are going to change alignment for DWARF sections. This patch is to
fix functionality issue if the alignment is not the same with
DefaultSectionAlign defined in XCOFFObjectWriter.cpp.

Currently no test for this patch as for now alignment for DWARF sections
and other sections are always the same. This patch will be tested when
patch changing DWARF section is merged in.

Reviewed By: Esme

Differential Revision: https://reviews.llvm.org/D116092
2022-06-29 04:12:35 +00:00
Peixin-Qiao 794b3bf776 [NFC][flang] Add the missed `constexpr`
Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D128598
2022-06-29 12:07:29 +08:00
Petr Hosek 0204fd25b0 [CoverageMapping] Remove dots from paths inside the profile
We already remove dots from collected paths and path mappings. This
makes it difficult to match paths inside the profile which contain
dots. For example, we would never match /path/to/../file.c because
the collected path is always be normalized to /path/file.c. This
change enables dot removal for paths inside the profile to address
the issue.

Differential Revision: https://reviews.llvm.org/D123164
2022-06-28 20:53:01 -07:00
Peixin-Qiao 779d2470a4 [flang] Support check for BIND statement entity
As Fortran 2018 8.6.4(1), the BIND statement specifies the BIND attribute
for a list of variables and common blocks.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D127120
2022-06-29 11:25:19 +08:00
Chris Bieneman c967c3d39b [DirectX] Properly fix for MaybeAlign API removal
My last attempt caused a test case failure. This resovles the issue.
2022-06-28 21:53:59 -05:00
Luo, Yuanke 5cb0979870 [X86][AMX] Split greedy RA for tile register
When we fill the shape to tile configure memory, the shape is gotten
from AMX pseudo instruction. However the register for the shape may be
split or spilled by greedy RA. That cause we fill the shape to config
memory after ldtilecfg is executed, so that the shape configuration
would be wrong.
This patch is to split the tile register allocation from greedy register
allocation, so that after tile registers are allocated the shape
registers are still virtual register. The shape register only may be
redefined or multi-defined by phi elimination pass, two address pass.
That doesn't affect tile register configuration.

Differential Revision: https://reviews.llvm.org/D128584
2022-06-29 10:35:43 +08:00
Rafael Auler fc2d96c334 Revert "[BOLT][AArch64] Handle gold linker veneers"
This reverts commit 425dda76e9.

This commit is currently causing BOLT to crash in one of our
binaries and needs a bit more checking to make sure it is safe
to land.
2022-06-28 19:23:28 -07:00
Guozhi Wei 2fcc495549 [AArch64] Update test case.
Replace the new generated virtual register number with a macro to avoid
name mismatch due to different configuration of compiler.
2022-06-29 01:37:56 +00:00
Chris Bieneman 072288dacd [DirectX] Fix broken build after API removal
This removes the DirectX backend's usage of the MaybeAlign API removed
in 1baf1fc.
2022-06-28 20:16:04 -05:00
Walter Erquinigo 6564ca188a [trace] Fix errors when handling command arguments
https://reviews.llvm.org/D128453 recently added some safety checks for
command arguments. Unfortunately, some few commands started failing due
to that, and this diff fixes it. But fortunately, the fix is trivial, which is
simply declaring the argument that these commands will receive.

Differential Revision: https://reviews.llvm.org/D128775
2022-06-28 17:54:30 -07:00
Craig Topper 5dcc525492 [RISCV] Fold (add X, [-4096, -2049]) or (add X, [2048,4096]) into load/store address during isel.
Previously we iseled this to a pair of ADDIs and relied on a post
isel peephole to fold one of the ADDIs into the load/store. Now
we split the immediate in two parts the same way isel does and fold
one of the pieces. If the add has a non-memory use it will emit
two isels and larger one will CSE with the ADDI we created for the
the memory use.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D128741
2022-06-28 16:59:39 -07:00
Walter Erquinigo f91d82816f [trace] Improve the TraceCursor iteration API
The current way ot traversing the cursor is a bit uncommon and it can't handle empty traces, in fact, its invariant is that it shold always point to a valid item. This diff simplifies the cursor API and allows it to point to invalid items, thus being able to handle empty traces or to know it ran out of data.

- Removed all the granularity functionalities, because we are not actually making use of that. We can bring them back when they are actually needed.
- change the looping logic to the following:

```
  for (; cursor->HasValue(); cursor->Next()) {
     if (cursor->IsError()) {
       .. do something for error
       continue;
     }
     .. do something for instruction
  }

```

- added a HasValue method that can be used to identify if the cursor ran out of data, the trace is empty, or the user tried to move to an invalid position via SetId() or Seek()
- made several simplifications to severals parts of the code.

Differential Revision: https://reviews.llvm.org/D128543
2022-06-28 16:50:12 -07:00
Stanislav Mekhanoshin 21895c6b50 [AMDGPU] Relax verification of soffset in scalar stores
It must use m0 only on GFX8. Later chips can use ang SGPR.

Differential Revision: https://reviews.llvm.org/D128765
2022-06-28 16:10:08 -07:00
Fangrui Song 57fa68897b [Driver][ARM][AArch64] Use err_drv_unsupported_option_argument for -march=/-mcpu=/-mtune= diagnostics
err_drv_clang_unsupported is for a Clang unsupported option (any value is rejected).
err_drv_unsupported_option_argument is for an unsupported value (other values may be supported).
2022-06-28 16:01:30 -07:00