8 Commits

Author	SHA1	Message	Date
Andrew Trick	8523b16ff5	Instruction scheduling itinerary for Intel Atom. ... Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558	2012-02-01 23:20:51 +00:00
Pete Cooper	ce63700797	Changed test to check for correct load size instead of shift as the shift might change if optimised ... llvm-svn: 143116	2011-10-27 18:15:58 +00:00
Nadav Rotem	486ff59a9f	Enable element promotion type legalization by deafault. ... Changed tests which assumed that vectors are legalized by widening them. llvm-svn: 142152	2011-10-16 20:31:33 +00:00
Chris Lattner	ff392ab3ed	now that generic vector types aren't selected onto MMX registers, these ... tests don't need -disable-mmx. llvm-svn: 122188	2010-12-19 20:12:58 +00:00
Dan Gohman	e1931fa676	Change TargetData's algorithm for computing defualt vector type ... alignment to match what's used in clang and GCC for __alignof, rather than trying to guess what Legalize is going to be doing. llvm-svn: 102206	2010-04-23 19:41:15 +00:00
Jakob Stoklund Olesen	6f6ebb663c	Enable -sse-domain-fix by default. Now with tests! ... llvm-svn: 99954	2010-03-30 22:47:00 +00:00
Mon P Wang	7ad43f8768	Fixed a widening bug where we were not using the correct size for the load ... llvm-svn: 98920	2010-03-19 01:19:52 +00:00
Mon P Wang	586d997e98	Improved widening loads by adding support for wider loads if ... the alignment allows. Fixed a bug where we didn't use a vector load/store for PR5626. llvm-svn: 94338	2010-01-24 00:05:03 +00:00