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6 Commits

Author SHA1 Message Date
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Bruno Cardoso Lopes 5cef9cfd09 Position Independent Code (PIC) support [1] 
- Modified instruction format to handle pseudo instructions
- Added LoadAddr SDNode to load symbols.

llvm-svn: 42778
 2007-10-09 02:55:31 +00:00
Bruno Cardoso Lopes d4b9945a21 Instruction Itinerary attribution fixed 
llvm-svn: 41224
 2007-08-21 16:06:45 +00:00
Bruno Cardoso Lopes 5792189590 Added InstrItinClass support for instruction formats 
llvm-svn: 41156
 2007-08-18 02:01:28 +00:00
Evan Cheng 94b5a80b93 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
 2007-07-19 01:14:50 +00:00
Bruno Cardoso Lopes 35e43c49b0 Initial Mips support, here we go! =) 
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.

llvm-svn: 37461
 2007-06-06 07:42:06 +00:00