7 Commits

Author	SHA1	Message	Date
Matt Arsenault	e56e9022bc	AMDGPU: Fix liveness errors when copying AGPR tuples ... Avoid recursively calling copyPhysReg for AGPR handling. This was dropping the necessary super register implicit defs to avoid liveness verifier errors.	2020-07-30 18:13:04 -04:00
Matt Arsenault	6c5b635e95	AMDGPU: Add a few more missing test for AGPR tuple copying	2020-07-16 15:53:11 -04:00
Matt Arsenault	10382285ac	AMDGPU: Add missing tests for copyPhysReg AGPR tuples	2020-07-16 15:27:57 -04:00
Pushpinder Singh	e1a31f52cd	[AMDGPU] Control num waves per EU for implicit work-group size ... Summary: If amdgpu-flat-work-group-size is not specified in LLVM IR, the backend uses default value of 1024. For this, minimum waves per EU should be 4. However, backend is still setting minimum value to 1 instead of calculated value. This is not observed normally as frontend always provide amdgpu-flat-work-group-size attribute. Reviewers: rampitec, b-sumner, sameerds, msearles Reviewed By: rampitec Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D81991	2020-07-01 22:53:52 -04:00
Matt Arsenault	a230f1db3f	AMDGPU: Fix missing tracksRegLiveness in tests ... I have no idea why this is considered optional, or why it's not the default. Also add uses of the copied registers for more useful liveness testing.	2020-07-01 18:58:59 -04:00
Matt Arsenault	ba3bafe46a	AMDGPU: Convert AGPR copy test to generated checks	2020-07-01 13:59:13 -04:00
Stanislav Mekhanoshin	e67cc380a8	[AMDGPU] gfx908 mfma support ... Differential Revision: https://reviews.llvm.org/D64584 llvm-svn: 365824	2019-07-11 21:19:33 +00:00