Commit Graph

651 Commits

Author SHA1 Message Date
Fangrui Song 78ee2fbf98 Cleanup: llvm::bsearch -> llvm::partition_point after r364719
llvm-svn: 364720
2019-06-30 11:19:56 +00:00
Fangrui Song ba51fd5664 Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded
This restores r361830 "[ELF] Error on relocations to STT_SECTION symbols if the sections were discarded"
and dependent commits (r362218, r362497) which were reverted by r364321, with a fix of a --gdb-index issue.

.rela.debug_ranges contains relocations of range list entries:

    // start address of a range list entry
    // old: 0; after r361830: 0
    00000000000033a0 R_X86_64_64 .text._ZN2v88internal7Isolate7factoryEv + 0
    // end address of a range list entry
    // old: 0xe; after r361830: 0
    00000000000033a8 R_X86_64_64 .text._ZN2v88internal7Isolate7factoryEv + e

If both start and end addresses of a range list entry resolve to 0,
DWARFDebugRangeList::isEndOfListEntry() will return true, then the
.debug_range decoding loop will terminate prematurely:

    while (true) {
      decode StartAddress
      decode EndAddress
      if (Entry.isEndOfListEntry()) // prematurely
        break;
      Entries.push_back(Entry);
    }

In lld/ELF/SyntheticSections.cpp, readAddressAreas() will read
incomplete address ranges and the resulting .gdb_index will be
incomplete. For files that gdb hasn't loaded their debug info, gdb uses
.gdb_index to map addresses to CUs. The absent entries make gdb fail to
symbolize some addresses.

To address this issue, we simply allow relocations to undefined symbols
in DWARF.cpp:findAux() and let RelocationResolver resolve them.

This patch should fix:

[1] http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190603/659848.html
[2] https://bugs.chromium.org/p/chromium/issues/detail?id=978067

llvm-svn: 364391
2019-06-26 08:09:08 +00:00
Hans Wennborg 36c23cad15 Revert r362743 "Revert "Revert "Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded"""
(In effect, reverting "[ELF] Error on relocations to STT_SECTION symbols if the sections were discarded".)

It caused debug info problems in LibreOffice [1] and Chromium/V8 [2].
Reverting until those can be fixed.

It also reverts r362497 "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table"
which was landed as a follow-up to the above.

> With -r or --emit-relocs, we warn `STT_SECTION symbol should be defined`
> on relocations to discarded section symbol. This was added as an error
> in rLLD319404, but was not so effective before D61583 (it turned the
> error to a warning).
>
> Relocations from .eh_frame .debug* .zdebug* .gcc_except_table to
> discarded .text are very common and somewhat expected. Don't warn/error
> on them. As a reference, ld.bfd has a similar logic in
> _bfd_elf_default_action_discarded() to allow these cases.
>
> Delete invalid-undef-section-symbol.test because what it intended to
> check is now covered by the updated comdat-discarded-reloc.s
>
> Delete relocatable-eh-frame.s because we allow relocations from
> .eh_frame as a special case now.

And finally it reverts r362218 "[ELF] Replace a dead test in getSymVA() with assert()"
as that also depended on the main change reverted here.

> Symbols relative to discarded comdat sections are Undefined instead of
> Defined now (after D59649 and D61583). The `== &InputSection::Discarded`
> test becomes dead. I cannot find a test related to this behavior.

 [1] http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190603/659848.html
 [2] https://bugs.chromium.org/p/chromium/issues/detail?id=978067

llvm-svn: 364321
2019-06-25 14:58:46 +00:00
Fangrui Song 4ce0a519c1 [ELF][RISCV] Treat R_RISCV_{ADD,SET,SUB}* as link-time constants
R_RISCV_{ADD,SET,SUB}* are used for local label computation.
Add a new RelExpr member R_RISCV_ADD to represent them.

R_RISCV_ADD is treated as a link-time constant because otherwise
R_RISCV_{ADD,SET,SUB}* are not allowed in -pie/-shared mode.
In glibc Scrt1.o, .rela.eh_frame contains such relocations.
Because .eh_frame is not writable, we get this error:

    ld.lld: error: can't create dynamic relocation R_RISCV_ADD32 against symbol: .L0 in readonly segment; recompil object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output
    >>> defined in ..../riscv64-linux-gnu/lib/Scrt1.o

With D63076 and this patch, I can run -pie/-shared programs linked against glibc.

Note llvm-mc cannot currently produce R_RISCV_SET* so they are not tested.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D63183

llvm-svn: 363128
2019-06-12 07:53:06 +00:00
Fangrui Song 11549e5c46 [ELF][PPC64] Don't report "relocation refers to a discarded section" for .toc
Summary:
clang (as of 2019-06-12) / gcc (as of 8.2.1) PPC64 may emit a .rela.toc
which references an embedded switch table in a discarded .rodata/.text
section. The .toc and the .rela.toc are incorrectly not placed in the
comdat.

Technically a relocation from outside the group is not allowed by the ELF spec:

> A symbol table entry with STB_LOCAL binding that is defined relative
> to one of a group's sections, and that is contained in a symbol table
> section that is not part of the group, must be discarded if the group
> members are discarded. References to this symbol table entry from
> outside the group are not allowed.

Don't report errors to work around the bug.

This should fix the ppc64le-lld-multistage-test bot while linking llvm-tblgen:

    ld.lld: error: relocation refers to a discarded section: .rodata._ZNK4llvm3MVT13getSizeInBitsEv
    >>> defined in utils/TableGen/CMakeFiles/llvm-tblgen.dir/CodeGenRegisters.cpp.o
    >>> referenced by CodeGenRegisters.cpp
    >>> utils/TableGen/CMakeFiles/llvm-tblgen.dir/CodeGenRegisters.cpp.o:(.toc+0x0)

Some other PPC specific sections may have similar problems. We can blacklist more
section names when problems occur.

    // A simple program that reproduces the bug.
    // Note .rela.toc (outside the group) references a section symbol (STB_LOCAL) in a group.
    void puts(const char *);
    struct A {
      void foo(int a) {
        switch (a) {
        case 0: puts("0"); break;
        case 1: puts("1"); puts("1"); break;
        case 2: puts("2"); break;
        case 3: puts("3"); puts("4"); break;
        case 4: puts("4"); break;
        case 5: puts("5"); puts("5"); break;
        case 6: puts("6"); break;
        }
      }
      int a;
    };
    void foo(A x) { x.foo(x.a); }

Reviewers: ruiu, sfertile, espindola

Reviewed By: ruiu

Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63182

llvm-svn: 363126
2019-06-12 07:35:42 +00:00
Sean Fertile 6a573e3ec3 Revert "Revert "[ELF] Suppress "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table""
This reverts commit f49f58527a6d8147524d8d6f2eb1feb70f856292.

llvm-svn: 362744
2019-06-06 20:16:59 +00:00
Sean Fertile 6ba76dd779 Revert "Revert "Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded""
This reverts commit 729111cf1824159bb4dd331cab8a829eab30313f.

Reverting the previous commit breaks other LLD buildbots.

llvm-svn: 362743
2019-06-06 20:16:53 +00:00
Sean Fertile f1d9b3180e Revert "Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded"
This reverts commit 5d3b3188f7.

Breaks the PowerPC multi-stage buildbot.

llvm-svn: 362739
2019-06-06 19:34:26 +00:00
Sean Fertile a0a63b2f90 Revert "[ELF] Suppress "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table"
This reverts commit dcba4828a9.

This commit builds on  dcba4828a9 which breaks the
multi-staged PowerPC buildbot.

llvm-svn: 362738
2019-06-06 19:34:18 +00:00
Fangrui Song 7ccfdad7ab [PPC32] Support GD/LD/IE/LE TLS models and their relaxations
Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D62940

llvm-svn: 362722
2019-06-06 17:03:10 +00:00
Fangrui Song 82442adfc0 [PPC32] Improve the 32-bit PowerPC port
Many -static/-no-pie/-shared/-pie applications linked against glibc or musl
should work with this patch. This also helps FreeBSD PowerPC64 to migrate
their lib32 (PR40888).

* Fix default image base and max page size.
* Support new-style Secure PLT (see below). Old-style BSS PLT is not
  implemented, so it is not suitable for FreeBSD rtld now because it doesn't
  support Secure PLT yet.
* Support more initial relocation types:
  R_PPC_ADDR32, R_PPC_REL16*, R_PPC_LOCAL24PC, R_PPC_PLTREL24, and R_PPC_GOT16.
  The addend of R_PPC_PLTREL24 is special: it decides the call stub PLT type
  but it should be ignored for the computation of target symbol VA.
* Support GNU ifunc
* Support .glink used for lazy PLT resolution in glibc
* Add a new thunk type: PPC32PltCallStub that is similar to PPC64PltCallStub.
  It is used by R_PPC_REL24 and R_PPC_PLTREL24.

A PLT stub used in -fPIE/-fPIC usually loads an address relative to
.got2+0x8000 (-fpie/-fpic code uses _GLOBAL_OFFSET_TABLE_ relative
addresses).
Two .got2 sections in two object files have different addresses, thus a PLT stub
can't be shared by two object files. To handle this incompatibility,
change the parameters of Thunk::isCompatibleWith to
`const InputSection &, const Relocation &`.

PowerPC psABI specified an old-style .plt (BSS PLT) that is both
writable and executable. Linkers don't make separate RW- and RWE segments,
which causes all initially writable memory (think .data) executable.
This is a big security concern so a new PLT scheme (secure PLT) was developed to
address the security issue.

TLS will be implemented in D62940.

glibc older than ~2012 requires .rela.dyn to include .rela.plt, it can
not handle the DT_RELA+DT_RELASZ == DT_JMPREL case correctly. A hack
(not included in this patch) in LinkerScript.cpp addOrphanSections() to
work around the issue:

    if (Config->EMachine == EM_PPC) {
      // Older glibc assumes .rela.dyn includes .rela.plt
      Add(In.RelaDyn);
      if (In.RelaPlt->isLive() && !In.RelaPlt->Parent)
        In.RelaDyn->getParent()->addSection(In.RelaPlt);
    }

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D62464

llvm-svn: 362721
2019-06-06 17:03:00 +00:00
Fangrui Song dcba4828a9 [ELF] Suppress "STT_SECTION symbol should be defined" on .eh_frame, .debug*, .zdebug* and .gcc_except_table
Summary:
With -r or --emit-relocs, we warn `STT_SECTION symbol should be defined`
on relocations to discarded section symbol. This was added as an error
in rLLD319404, but was not so effective before D61583 (it turned the
error to a warning).

Relocations from .eh_frame .debug* .zdebug* .gcc_except_table to
discarded .text are very common and somewhat expected. Don't warn/error
on them. As a reference, ld.bfd has a similar logic in
_bfd_elf_default_action_discarded() to allow these cases.

Delete invalid-undef-section-symbol.test because what it intended to
check is now covered by the updated comdat-discarded-reloc.s

Delete relocatable-eh-frame.s because we allow relocations from
.eh_frame as a special case now.

Reviewers: grimar, phosek, ruiu, espindola

Reviewed By: ruiu

Subscribers: emaste, arichardson, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62840

llvm-svn: 362497
2019-06-04 13:41:29 +00:00
Fangrui Song 8522d579b8 [ELF][PPC64] Rename some PPC64 ELFv2 specific RelExpr from R_PPC_* to R_PPC64_*
The following abstract relocation types (RelExpr) are PPC64 ELFv2 ABI specific,
not used by PPC32. So rename them to prevent confusion when the PPC32 port is improved.

* R_PPC_CALL R_PPC_CALL_PLT:
  R_PPC_CALL_PLT represents R_PPC64_REL14 and R_PPC64_REL24.
  If the function is not preemptable, R_PPC_CALL_PLT can be optimized to R_PPC_CALL:
  the formula adjusts the symbol VA from the global entry point to the local entry point.
* R_PPC_TOC: represents R_PPC64_TOC.  We don't have a test. Add one to ppc64-relocs.s
  Rename it to R_PPC64_TOCBASE because `@tocbase` is the assembly form.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D62800

llvm-svn: 362359
2019-06-03 06:21:33 +00:00
Fangrui Song 0526c0cd8e [ELF] Implement Local Dynamic style TLSDESC for x86-64
For the Local Dynamic case of TLSDESC, _TLS_MODULE_BASE_ is defined as a
special TLS symbol that makes:

1) Without relaxation: it produces a dynamic TLSDESC relocation that
computes 0. Adding @dtpoff to access a TLS symbol.
2) With LD->LE relaxation: _TLS_MODULE_BASE_@tpoff = 0 (lowest address in
the TLS block). Adding @tpoff to access a TLS symbol.

For 1), this saves dynamic relocations and GOT slots as otherwise
(General Dynamic) we would create an R_X86_64_TLSDESC and reserve two
GOT slots for each symbol.

Add ElfSym::TlsModuleBase and change the signature of getTlsTpOffset()
to special case _TLS_MODULE_BASE_.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D62577

llvm-svn: 362078
2019-05-30 10:00:20 +00:00
Peter Collingbourne ba2816be82 ELF: Add basic partition data structures and behaviours.
This change causes us to read partition specifications from partition
specification sections and split output sections into partitions according
to their reachability from partition entry points.

This is only the first step towards a full implementation of partitions. Later
changes will add additional synthetic sections to each partition so that
they can be loaded independently.

Differential Revision: https://reviews.llvm.org/D60353

llvm-svn: 361925
2019-05-29 03:55:20 +00:00
Fangrui Song 719322411c [ELF] Implement General Dynamic style TLSDESC for x86-64
This handles two initial relocation types R_X86_64_GOTPC32_TLSDESC and
R_X86_64_TLSDESC_CALL, as well as the GD->LE and GD->IE relaxations.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D62513

llvm-svn: 361911
2019-05-29 02:03:56 +00:00
Fangrui Song 5d3b3188f7 Reland D61583 [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded
This is implemented by creating Undefined (instead of Defined) for such
local STT_SECTION symbols. It allows us to catch errors when there are
relocations to such discarded sections (e.g. in PR41693, ld.bfd and gold
error but we don't). Updated comdat-discarded-error.s checks we emit
friendly error message.

For relocatable-eh-frame.s, ld.lld -r a.o a.o will now error
"STT_SECTION symbol should be defined" because the section .eh_frame
refers to is now an Undefined instead of a Defined.
So I have to change `error()` to `warn()` to retain the output.

rLLD361144 inadvertently enabled the error for --gdb-index
(in LLDDwarfObj<ELFT>::findAux()).

Relocations from .debug_info (not in comdat) to .text.* (in comdat) for
DW_AT_low_pc are common. If an .text.* was discarded, rLLD361144 would error,
which was unexpected. (Note, if we don't error as this patch does,
InputSection::relocateNonAlloc() will resolve such relocations).

llvm-svn: 361830
2019-05-28 14:34:28 +00:00
Haojian Wu 241dcb386e Revert [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded
This reverts r361792 (git commit cfca5095df), the
revision causes link errors internally, will share more details with the
author.

llvm-svn: 361806
2019-05-28 11:21:59 +00:00
Fangrui Song cfca5095df [ELF] Error on relocations to STT_SECTION symbols if the sections were discarded
This is implemented by creating Undefined (instead of Defined) for such
local STT_SECTION symbols. It allows us to catch errors when there are
relocations to such discarded sections (e.g. in PR41693, ld.bfd and gold
error but we don't). Updated comdat-discarded-error.s checks we emit
friendly error message.

For relocatable-eh-frame.s, ld.lld -r a.o a.o will now error
"STT_SECTION symbol should be defined" because the section .eh_frame
refers to is now an Undefined instead of a Defined.
So I have to change `error()` to `warn()` to retain the output.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D61583

llvm-svn: 361792
2019-05-28 06:34:52 +00:00
Fangrui Song 2109572464 [ELF] Fix getRelocTargetVA formulae of R_TLS and R_NEG_TLS
For R_TLS:
1) Delete Sym.isTls() . The assembler ensures the symbol is STT_TLS.
   If not (the input is broken), we would crash (dereferencing null Out::TlsPhdr).
2) Change Sym.isUndefWeak() to Sym.isUndefined(), otherwise with --noinhibit-exec
   we would still evaluate the symbol and crash.
3) Return A if the symbol is undefined. This is PR40570.
   The case is probably unrealistic but returning A matches R_ABS and the
   behavior of several dynamic loaders.

R_NEG_TLS is obsoleted Sun TLS we don't fully support, but
R_RELAX_TLS_GD_TO_LE_NEG is still used by GD->LE relaxation (subl $var@tpoff,%eax).

They should add the addend. Unfortunately I can't test it as compilers don't seem to generate non-zero implicit addends.

Reviewed By: ruiu

Differential Revision: https://reviews.llvm.org/D62098

llvm-svn: 361146
2019-05-20 11:47:31 +00:00
Fangrui Song ed2ad77ccb [ARM][AArch64] Revert Android Bionic PT_TLS overaligning hack
This reverts D53906.

D53906 increased p_align of PT_TLS on ARM/AArch64 to 32/64 to make the
static TLS layout compatible with Android Bionic's ELF TLS. However,
this may cause glibc ARM/AArch64 programs to crash (see PR41527).

The faulty PT_TLS in the executable satisfies p_vaddr%p_align != 0. The
remainder is normally 0 but may be non-zero with the hack in place. The
problem is that we increase PT_TLS's p_align after OutputSections'
addresses are fixed (assignAddress()). It is possible that
p_vaddr%old_p_align = 0 while p_vaddr%new_p_align != 0.

For a thread local variable defined in the executable, lld computed TLS
offset (local exec) is different from glibc computed TLS offset from
another module (initial exec/generic dynamic). Note: PR41527 said the
bug affects initial exec but actually generic dynamic is affected as
well.

(glibc is correct in that it compute offsets that satisfy
`offset%p_align == p_vaddr%p_align`, which is a basic ELF requirement.
This hack appears to work on FreeBSD rtld, musl<=1.1.22, and Bionic, but
that is just because they (and lld) incorrectly compute offsets that
satisfy `offset%p_align = 0` instead.)

Android developers are fine to revert this patch, carry this patch in
their tree before figuring out a long-term solution (e.g. a dummy .tdata
with sh_addralign=64 sh_size={0,1} in crtbegin*.o files. The overhead is
now insignificant after D62059).

Reviewed By: rprichard, srhines

Differential Revision: https://reviews.llvm.org/D62055

llvm-svn: 361090
2019-05-18 03:16:00 +00:00
Fangrui Song 898896836d [ELF][X86] Fix R_RELAX_TLS_GD_TO_LE_NEG and R_NEG_TLS after D62059
After D62059, we don't align p_memsz of PT_TLS to p_align. The
getRelocTargetVA formula should align it instead.

It becomes clear that R_NEG_TLS and R_TLS are opposite from each other.

In i386-tls-le-align.s, I put ret after call ___tls_get_addr@plt as
otherwise ld.bfd would reject the relaxation:
TLS transition from R_386_TLS_GD to R_386_TLS_LE_32 against `a' at 0x3 in section `.text' failed

llvm-svn: 361088
2019-05-18 01:58:40 +00:00
Fangrui Song 348731aeed [ELF] Fix TP offset of TLS Variant I after D62059
As Ryan Prichard pointed out, after D62059, the TP offset is incorrect.

Add x86-64-tls-le-align.s to check this.  Better formulae for both
variants should take p_vaddr%p_align into account (offset%p_align =
p_vaddr%p_align is a basic ELF requirement), but I can't find a way to
test the behavior.

llvm-svn: 361084
2019-05-18 00:43:10 +00:00
Fangrui Song f3a3b93f54 [ELF] -r: fix R_*_NONE to section symbols on Elf*_Rel targets
On Elf*_Rel targets, for a relocation to a section symbol, an R_ABS is
added which will be used by relocateOne() to compute the implicit
addend.

Addends of R_*_NONE should be ignored, so don't emit an R_ABS.

This fixes crashes on X86 and ARM because their relocateOne() do not
handle R_*_NONE.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D62052

llvm-svn: 361036
2019-05-17 14:11:03 +00:00
Bob Haarman 5ff1eb6418 Revert r358069 "Discard debuginfo for object files empty after GC"
The change broke some scenarios where debug information is still
needed, although MarkLive cannot see it, including the
Chromium/Android build. Reverting to unbreak that build.

llvm-svn: 360955
2019-05-16 23:33:06 +00:00
Fangrui Song 912251e82f [PPC64] toc-indirect to toc-relative relaxation
This is based on D54720 by Sean Fertile.

When accessing a global symbol which is not defined in the translation unit,
compilers will generate instructions that load the address from the toc entry.

If the symbol is defined, non-preemptable, and addressable with a 32-bit
signed offset from the toc pointer, the address can be computed
directly. e.g.

    addis 3, 2, .LC0@toc@ha  # R_PPC64_TOC16_HA
    ld    3, .LC0@toc@l(3)   # R_PPC64_TOC16_LO_DS, load the address from a .toc entry
    ld/lwa 3, 0(3)           # load the value from the address

    .section .toc,"aw",@progbits
    .LC0: .tc var[TC],var

can be relaxed to

    addis 3,2,var@toc@ha     # this may be relaxed to a nop,
    addi  3,3,var@toc@l      # then this becomes addi 3,2,var@toc
    ld/lwa 3, 0(3)           # load the value from the address

We can delete the test ppc64-got-indirect.s as its purpose is covered by
newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s

Reviewed By: ruiu, sfertile

Differential Revision: https://reviews.llvm.org/D60958

llvm-svn: 360112
2019-05-07 04:26:05 +00:00
Fangrui Song 98b70f6705 [ELF] Change std::max<uint64_t> to uint32_t for section alignment
Summary:
We use `uint32_t SectionBase::Alignment` and `uint32_t
PhdrEntry::p_align` despite alignments being 64 bits in ELF64.
Fix the std::max template arguments accordingly.

The currently 160-byte InputSection will become 168 bytes if we make SectionBase::Alignment uint64_t.

Differential Revision: https://reviews.llvm.org/D61171

llvm-svn: 359268
2019-04-26 04:07:58 +00:00
Fangrui Song d986e41fe4 [PPC64] Allow R_PPC64_DTPREL* to preemptable local-dynamic symbols
Similar to D60945.

Differential Revision: https://reviews.llvm.org/D60994

llvm-svn: 358950
2019-04-23 06:31:44 +00:00
George Rimar 3275742898 [LLD][ELF] - Do not forget to use ch_addralign field after decompressing the sections.
LLD did not use ELF::Chdr::ch_addralign for decompressed sections.
This resulted in a broken output.

Fixes https://bugs.llvm.org/show_bug.cgi?id=40482.

Differential revision: https://reviews.llvm.org/D60959

llvm-svn: 358885
2019-04-22 13:40:42 +00:00
Fangrui Song bc4b159bb1 [ELF][X86] Allow R_386_TLS_LDO_32 and R_X86_64_DTPOFF{32,64} to preemptable local-dynamic symbols
Summary:
Fixes PR35242. A simplified reproduce:

    thread_local int i; int f() { return i; }

% {g++,clang++} -fPIC -shared -ftls-model=local-dynamic -fuse-ld=lld a.cc
ld.lld: error: can't create dynamic relocation R_X86_64_DTPOFF32 against symbol: i in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output

In isStaticLinkTimeConstant(), Syn.IsPreemptible is true, so it is not
seen as a constant. The error is then issued in processRelocAux().

A symbol of the local-dynamic TLS model cannot be preempted but it can
preempt symbols of the global-dynamic TLS model in other DSOs.
So it makes some sense that the variable is not static.

This patch fixes the linking error by changing getRelExpr() on
R_386_TLS_LDO_32 and R_X86_64_DTPOFF{32,64} from R_ABS to R_DTPREL.
R_PPC64_DTPREL_* and R_MIPS_TLS_DTPREL_* need similar fixes, but they are not handled in this patch.

As a bonus, we use `if (Expr == R_ABS && !Config->Shared)` to find
ld-to-le opportunities. R_ABS is overloaded here for such STT_TLS symbols.
A dedicated R_DTPREL is clearer.

Differential Revision: https://reviews.llvm.org/D60945

llvm-svn: 358870
2019-04-22 03:10:40 +00:00
Fangrui Song e1f3191a0d [ELF][X86] Rename R_RELAX_TLS_GD_TO_IE_END to R_RELAX_TLS_GD_TO_IE_GOTPLT
Summary:
This relocation type is used by R_386_TLS_GD. Its formula is the same as
R_GOTPLT (e.g R_X86_64_GOT{32,64} R_386_TLS_GOTIE). Rename it to be clearer.

Differential Revision: https://reviews.llvm.org/D60941

llvm-svn: 358868
2019-04-22 02:48:37 +00:00
Fangrui Song 2bc3a19a49 [ELF] Use llvm::bsearch. NFC
Differential Revision: https://reviews.llvm.org/D60813

llvm-svn: 358565
2019-04-17 08:00:46 +00:00
Rui Ueyama 3a8bb7cd2c Discard debuginfo for object files empty after GC
Patch by Robert O'Callahan.

Rust projects tend to link in all object files from all dependent
libraries and rely on --gc-sections to strip unused code and data.
Unfortunately --gc-sections doesn't currently strip any debuginfo
associated with GC'ed sections, so lld links in the full debuginfo from
all dependencies even if almost all that code has been discarded. See
https://github.com/rust-lang/rust/issues/56068 for some details.

Properly stripping debuginfo for discarded sections would be difficult,
but a simple approach that helps significantly is to mark debuginfo
sections as live only if their associated object file has at least one
live code/data section. This patch does that. In a (contrived but not
totally artificial) Rust testcase linked above, it reduces the final
binary size from 46MB to 5.1MB.

Differential Revision: https://reviews.llvm.org/D54747

llvm-svn: 358069
2019-04-10 10:37:10 +00:00
Rui Ueyama 68b9f45fee Replace `typedef A B` with `using B = A`. NFC.
I did this using Perl.

Differential Revision: https://reviews.llvm.org/D60003

llvm-svn: 357372
2019-04-01 00:11:24 +00:00
Fangrui Song 210949a221 [ELF] Change GOT*_FROM_END (relative to end(.got)) to GOTPLT* (start(.got.plt))
Summary:
This should address remaining issues discussed in PR36555.

Currently R_GOT*_FROM_END are exclusively used by x86 and x86_64 to
express relocations types relative to the GOT base. We have
_GLOBAL_OFFSET_TABLE_ (GOT base) = start(.got.plt) but end(.got) !=
start(.got.plt)

This can have problems when _GLOBAL_OFFSET_TABLE_ is used as a symbol, e.g.
glibc dl_machine_dynamic assumes _GLOBAL_OFFSET_TABLE_ is start(.got.plt),
which is not true.

  extern const ElfW(Addr) _GLOBAL_OFFSET_TABLE_[] attribute_hidden;
  return _GLOBAL_OFFSET_TABLE_[0]; // R_X86_64_GOTPC32

In this patch, we

* Change all GOT*_FROM_END to GOTPLT* to fix the problem.
* Add HasGotPltOffRel to denote whether .got.plt should be kept even if
  the section is empty.
* Simplify GotSection::empty and GotPltSection::empty by setting
  HasGotOffRel and HasGotPltOffRel according to GlobalOffsetTable early.

The change of R_386_GOTPC makes X86::writePltHeader simpler as we don't
have to compute the offset start(.got.plt) - Ebx (it is constant 0).

We still diverge from ld.bfd (at least in most cases) and gold in that
.got.plt and .got are not adjacent, but the advantage doing that is
unclear.

Reviewers: ruiu, sivachandra, espindola

Subscribers: emaste, mehdi_amini, arichardson, dexonsmith, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59594

llvm-svn: 356968
2019-03-25 23:46:19 +00:00
Peter Collingbourne e2b8c40a77 ELF: Use bump pointer allocator for uncompressed section buffers. NFCI.
This shaves another word off SectionBase and makes it possible to clone a
section using the implicit copy constructor.

This basically reverts r311056, which removed the mutex in order to
make the code easier to understand. On balance I think it's probably more
straightforward to have a mutex here than to have an unusual copy constructor
in SectionBase.

Differential Revision: https://reviews.llvm.org/D59269

llvm-svn: 355966
2019-03-12 20:32:30 +00:00
George Rimar cc19dc75fb [LLD][ELF] - Improve "sh_addralign is not a power of 2" diagnostics.
This patch removes the precompiled binary from inputs,
replacing it with a YAML. And teaches LLD to report a
section name in case of such error.

Differential revision: https://reviews.llvm.org/D58670

llvm-svn: 354959
2019-02-27 10:28:23 +00:00
Rui Ueyama 980fb790c1 Remove a comparator from header and instead use lambdas for simplicity. NFC.
llvm-svn: 354052
2019-02-14 19:21:10 +00:00
Rui Ueyama b8b81e9b43 Improve error message for unknown relocations.
Previously, we showed the following message for an unknown relocation:

  foo.o: unrecognized reloc 256

This patch improves it so that the error message includes a symbol name:

  foo.o: unknown relocation (256) against symbol bar

llvm-svn: 354040
2019-02-14 18:02:20 +00:00
Peter Collingbourne 8331f61a51 ELF: Allow GOT relocs pointing to non-preemptable ifunc to resolve to an IRELATIVE where possible.
Non-GOT non-PLT relocations to non-preemptible ifuncs result in the
creation of a canonical PLT, which now takes the identity of the IFUNC
in the symbol table. This (a) ensures address consistency inside and
outside the module, and (b) fixes a bug where some of these relocations
end up pointing to the resolver.

Fixes (at least) PR40474 and PR40501.

Differential Revision: https://reviews.llvm.org/D57371

llvm-svn: 353981
2019-02-13 21:49:55 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Sean Fertile 3ca494b2ee Modify InputSectionBase::getLocation to add section and offset to every loc.
The section and offset can be very helpful in diagnosing certian errors.
For example on a relocation overflow or misalignment diagnostic:

test.c:(function  foo): relocation R_PPC64_ADDR16_DS out of range: ...

The function foo can have many R_PPC64_ADDR16_DS relocations. Adding the offset
and section will identify exactly which relocation is causing the failure.

Differential Revision: https://reviews.llvm.org/D56453

llvm-svn: 350828
2019-01-10 15:08:06 +00:00
Ryan Prichard d7d2369c09 [ARM][AArch64] Increase TLS alignment to reserve space for Android's TCB
ARM and AArch64 use TLS variant 1, where the first two words after the
thread pointer are reserved for the TCB, followed by the executable's TLS
segment. Both the thread pointer and the TLS segment are aligned to at
least the TLS segment's alignment.

Android/Bionic historically has not supported ELF TLS, and it has
allocated memory after the thread pointer for several Bionic TLS slots
(currently 9 but soon only 8). At least one of these allocations
(TLS_SLOT_STACK_GUARD == 5) is widespread throughout Android/AArch64
binaries and can't be changed.

To reconcile this disagreement about TLS memory layout, set the minimum
alignment for executable TLS segments to 8 words on ARM/AArch64, which
reserves at least 8 words of memory after the TP (2 for the ABI-specified
TCB and 6 for alignment padding). For simplicity, and because lld doesn't
know when it's targeting Android, increase the alignment regardless of
operating system.

Differential Revision: https://reviews.llvm.org/D53906

llvm-svn: 350681
2019-01-09 00:09:59 +00:00
Peter Smith fe3015d164 [ELF][AArch64] Fix adrp to undefined weak reference.
In the ABI for the 64-bit Arm architecture the section on weak references
states:
During linking, the symbol value of an undefined weak reference is:
- Zero if the relocation type is absolute
- The address of the place if the relocation type is pc-relative.

The relocations associated with an ADRP are relative so we should resolve
the undefined weak reference to the place instead of 0. This matches GNU
ld.bfd behaviour.

fixes pr34928

Differential Revision: https://reviews.llvm.org/D55599

llvm-svn: 349024
2018-12-13 11:13:01 +00:00
Rui Ueyama c9c34bdc1a Do not use a hash table to uniquify mergeable strings.
Previously, we have a hash table containing strings and their offsets
to manage mergeable strings. Technically we can live without that, because
we can do binary search on a vector of mergeable strings to find a mergeable
strings.

We did have both the hash table and the binary search because we thought
that that is faster.

We recently observed that lld tend to consume more memory than gold when
building an output with debug info. A few percent of memory is consumed by
the hash table. So, we needed to reevaluate whether or not having the extra
hash table is a good CPU/memory tradeoff. I run a few benchmarks with and
without the hash table.

I got a mixed result for the benchmark. We observed a regression for some
programs by removing the hash table (that's what we expected), but we also
observed that performance imrpovements for some programs. This is perhaps
due to reduced memory usage.

Differential Revision: https://reviews.llvm.org/D55234

llvm-svn: 348401
2018-12-05 19:13:31 +00:00
Fangrui Song 01fbb06b12 [ELF] Simplify getSectionPiece
Reviewers: ruiu, espindola

Reviewed By: ruiu

Subscribers: grimar, emaste, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D55248

llvm-svn: 348311
2018-12-04 22:25:05 +00:00
Rui Ueyama aea706083f Inline a function template that is used only once. NFC.
llvm-svn: 348013
2018-11-30 18:19:15 +00:00
George Rimar d2f8db827d [ELF] - Fix R_AARCH64_ADR_GOT_PAGE, R_AARCH64_LD64_GOT_LO12 handling against IFUNC symbols.
This is https://bugs.llvm.org/show_bug.cgi?id=38074.

The issue is that when calling a function, LLD generates a
.got entry that points to the IFUNC resolver function when
instead, it should use the PLT entries properly for
handling the IFUNC.

So we should create a got entry that points to PLT entry,
which itself loads the value from 
.got.plt, relocated with R_*_IRELATIVE to make things work.
Patch do that.

Differential revision: https://reviews.llvm.org/D54314

llvm-svn: 347650
2018-11-27 10:30:46 +00:00
George Rimar 0fc5dcd1c8 [LLD][ELF] - Simplify. NFCI.
This makes getRISCVPCRelHi20 to be static local helper,
and rotates the 'if' condition.

llvm-svn: 347497
2018-11-23 15:13:26 +00:00
George Rimar 8329028b49 [ELF] - Renamed few more AArch64 specific relocation expressions. NFC.
They are AArch64 only, so have to have AARCH64_* prefix.

llvm-svn: 346963
2018-11-15 15:35:44 +00:00
Peter Smith ad51cee866 [AArch64] Fix resolution of R_PLT_PAGE RelExpr
The R_AARCH64_ADR_PREL_PG_HI21 relocation type is given the R_PAGE_PC
RelExpr. This can be transformed to R_PLT_PAGE_PC via toPlt().
Unfortunately the resolution is identical to R_PAGE_PC so instead of
getting the address of the PLT entry we get the address of the symbol
which may not be correct in the case of static ifuncs. The fix is to
handle the cases separately and use getPltVA() + A with R_PLT_PAGE_PC.

Differential Revision: https://reviews.llvm.org/D54474

llvm-svn: 346863
2018-11-14 13:53:47 +00:00
George Rimar 8ef9babb67 [ELF] - Renamed AArch64 specific relocations expressions. NFC.
They did not have AArch64 prefix. Now they do.

llvm-svn: 346749
2018-11-13 10:16:36 +00:00
George Rimar 3608decaa5 [ELF] - Do not crash when -r output uses linker script with `/DISCARD/`
This is https://bugs.llvm.org/show_bug.cgi?id=39493.

We crashed previously because did not handle /DISCARD/ properly
when -r was used. I think it is uncommon to use scripts with -r, though I see
nothing wrong to handle the /DISCARD/ so that we will not crash at least.

Differential revision: https://reviews.llvm.org/D53864

llvm-svn: 345819
2018-11-01 09:20:06 +00:00
Ryan Prichard e7cb0225a0 [ELF] Refactor per-target TLS layout configuration. NFC.
Summary:
There are really three different kinds of TLS layouts:

 * A fixed TLS-to-TP offset. On architectures like PowerPC, MIPS, and
   RISC-V, the thread pointer points to a fixed offset from the start
   of the executable's TLS segment. The offset is 0x7000 for PowerPC
   and MIPS, which allows a signed 16-bit offset to reach 0x1000 of
   per-thread implementation data and 0xf000 of the application's TLS
   segment. The size and layout of the TCB isn't relevant to the static
   linker and might not be known.

 * A fixed TCB size. This is the format documented as "variant 1" in
   Ulrich Drepper's TLS spec. The thread pointer points to a 2-word TCB
   followed by the executable's TLS segment. The first word is always
   the DTV pointer. Used on ARM. The thread pointer must be aligned to
   the TLS segment's alignment, possibly creating alignment padding.

 * Variant 2. This format predates variant 1 and is also documented in
   Drepper's TLS spec. It allocates the executable's TLS segment before
   the thread pointer, apparently for backwards-compatibility. It's
   used on x86 and SPARC.

Factor out an lld:🧝:getTlsTpOffset() function for use in a
follow-up patch for Android. The TcbSize/TlsTpOffset fields are only used
in getTlsTpOffset, so replace them with a switch on Config->EMachine.

Reviewers: espindola, ruiu, PkmX, jrtc27

Reviewed By: ruiu, PkmX, jrtc27

Subscribers: jyknight, emaste, sdardis, nemanjai, javed.absar, arichardson, kristof.beyls, kbarton, fedor.sergeev, atanasyan, PkmX, jsji, llvm-commits

Differential Revision: https://reviews.llvm.org/D53905

llvm-svn: 345775
2018-10-31 20:53:17 +00:00
Sean Fertile 4b5ec7fb80 Reland "[PPC64] Add split - stack support."
Recommitting https://reviews.llvm.org/rL344544 after fixing undefined behavior
from left-shifting a negative value. Original commit message:

This support is slightly different then the X86_64 implementation in that calls
to __morestack don't need to get rewritten to calls to __moresatck_non_split
when a split-stack caller calls a non-split-stack callee. Instead the size of
the stack frame requested by the caller is adjusted prior to the call to
__morestack. The size the stack-frame will be adjusted by is tune-able through a
new --split-stack-adjust-size option.

llvm-svn: 344622
2018-10-16 17:13:01 +00:00
Sean Fertile 831a1336ff Revert "[PPC64] Add split - stack support."
This reverts commit https://reviews.llvm.org/rL344544, which causes failures on
a undefined behaviour sanitizer bot -->
lld/ELF/Arch/PPC64.cpp:849:35: runtime error: left shift of negative value -1

llvm-svn: 344551
2018-10-15 20:20:28 +00:00
Sean Fertile 795cc9332b [PPC64] Add split - stack support.
This support is slightly different then the X86_64 implementation in that calls
to __morestack don't need to get rewritten to calls to __moresatck_non_split
when a split-stack caller calls a non-split-stack callee. Instead the size of
the stack frame requested by the caller is adjusted prior to the call to
__morestack. The size the stack-frame will be adjusted by is tune-able through a
new --split-stack-adjust-size option.

Differential Revision: https://reviews.llvm.org/D52099

llvm-svn: 344544
2018-10-15 19:05:57 +00:00
Rui Ueyama 2b53b4bea6 Attempt to fix ubsan.
Previously, we cast a pointer to Elf{32,64}_Chdr like this

  auto *Hdr = reinterpret_cast<const ELF64_Chdr>(Ptr);

and read from its members like this

  read32(&Hdr->ch_size);

I was thinking that this does not violate alignment requirement,
since &Hdr->ch_size doesn't really access memory, but seems like
it is a violation in terms of C++ spec (?)

In this patch, I use a different struct that allows unaligned access.

llvm-svn: 344083
2018-10-09 21:41:53 +00:00
Rui Ueyama e28c146423 Avoid unnecessary buffer allocation and memcpy for compressed sections.
Previously, we uncompress all compressed sections before doing anything.
That works, and that is conceptually simple, but that could results in
a waste of CPU time and memory if uncompressed sections are then
discarded or just copied to the output buffer.

In particular, if .debug_gnu_pub{names,types} are compressed and if no
-gdb-index option is given, we wasted CPU and memory because we
uncompress them into newly allocated bufers and then memcpy the buffers
to the output buffer. That temporary buffer was redundant.

This patch changes how to uncompress sections. Now, compressed sections
are uncompressed lazily. To do that, `Data` member of `InputSectionBase`
is now hidden from outside, and `data()` accessor automatically expands
an compressed buffer if necessary.

If no one calls `data()`, then `writeTo()` directly uncompresses
compressed data into the output buffer. That eliminates the redundant
memory allocation and redundant memcpy.

This patch significantly reduces memory consumption (20 GiB max RSS to
15 Gib) for an executable whose .debug_gnu_pub{names,types} are in total
5 GiB in an uncompressed form.

Differential Revision: https://reviews.llvm.org/D52917

llvm-svn: 343979
2018-10-08 16:58:59 +00:00
Sid Manning 261eec5fa5 [ELF][HEXAGON] Add support for GOT relocations.
The GOT is referenced through the symbol _GLOBAL_OFFSET_TABLE_ .

The relocation added calculates the offset into the global offset table for
the entry of a symbol.  In order to get the correct TargetVA I needed to
create an new relocation expression, HEXAGON_GOT.  It does
Sym.getGotVA() - In.GotPlt->getVA().

Differential Revision: https://reviews.llvm.org/D52744

llvm-svn: 343784
2018-10-04 14:54:17 +00:00
Fangrui Song dbaeec6892 [ELF] llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
Summary: The convenience wrapper in STLExtras is available since rL342102.

Reviewers: ruiu, espindola

Subscribers: emaste, arichardson, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D52569

llvm-svn: 343146
2018-09-26 20:54:42 +00:00
Rui Ueyama 4e247522ac Reset input section pointers to null on each linker invocation.
Previously, if you invoke lld's `main` more than once in the same process,
the second invocation could fail or produce a wrong result due to a stale
pointer values of the previous run.

Differential Revision: https://reviews.llvm.org/D52506

llvm-svn: 343009
2018-09-25 19:26:58 +00:00
Petr Hosek e717ae2117 [ELF] Use the Repl point to avoid the segfault when using ICF
This addresses PR38918.

Differential Revision: https://reviews.llvm.org/D52202

llvm-svn: 342704
2018-09-21 00:55:42 +00:00
Sean Fertile e0e586b997 [PPC64] Helper for offset from a function's global entry to local entry. [NFC]
The PPC64 elf V2 abi defines 2 entry points for a function. There are a few
places we need to calculate the offset from the global entry to the local entry
and how this is done is not straight forward. This patch adds a helper function
mostly for documentation purposes, explaining how the 2 entry points differ and
why we choose one over the other, as well as documenting how the offsets are
encoded into a functions st_other field.

Differential Revision: https://reviews.llvm.org/D52231

llvm-svn: 342603
2018-09-20 00:26:47 +00:00
Sterling Augustine b55236f522 When a relocation to an undefined symbol is an R_X86_64_PC32, an input
section will not have an input file. Don't crash under those circumstances.

Neither clang nor llvm-mc generates R_X86_64_PC32 relocations due to
https://reviews.llvm.org/D43383, which makes it hard to write a test case.
However, gcc does generate such relocations. I want to get a fix in now,
but will figure out a way to actually exercise this code path as soon
as I can.

llvm-svn: 341408
2018-09-04 21:06:59 +00:00
Ben Dunbobbin df6f0ad210 [LLD] Check too large offsets into merge sections earlier
This patch moves the checking for too large offsets into merge sections
earlier.

Without this change the large offset generated in the added test-case
will cause an assert (as it happens to be a value reserved as a
"tombstone" in the DenseMap implementation) when OffsetMap is queried in
getSectionPiece().

To simplify the code and avoid future mistakes I have refactored so that
there is only one function that looks up offsets in the OffsetMap.

Differential Revision: https://reviews.llvm.org/D51180

llvm-svn: 341206
2018-08-31 11:51:51 +00:00
Sterling Augustine 48b469746c Support shared objects for split stack.
llvm-svn: 339626
2018-08-13 22:29:15 +00:00
Rui Ueyama 5cd9c6bcd8 Support RISC-V
Patch by PkmX.

This patch makes lld recognize RISC-V target and implements basic
relocation for RV32/RV64 (and RVC). This should be necessary for static
linking ELF applications.

The ABI documentation for RISC-V can be found at:
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md.
Note that the documentation is far from complete so we had to figure out
some details from bfd.

The patch should be pretty straightforward. Some highlights:

 - A new relocation Expr R_RISCV_PC_INDIRECT is added. This is needed as
   the low part of a PC-relative relocation is linked to the corresponding
   high part (auipc), see:
   https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#pc-relative-symbol-addresses

 - LLVM's MC support for RISC-V is very incomplete (we are working on
   this), so tests are given in objectyaml format with the original
   assembly included in the comments. Once we have complete support for
   RISC-V in MC, we can switch to llvm-as/llvm-objdump.

 - We don't support linker relaxation for now as it requires greater
   changes to lld that is beyond the scope of this patch. Once this is
   accepted we can start to work on adding relaxation to lld.

Differential Revision: https://reviews.llvm.org/D39322

llvm-svn: 339364
2018-08-09 17:59:56 +00:00
Jordan Rupprecht 0f6d31812e [LLD] Update split stack support to handle more generic prologues. Improve error handling. Add test file for better code-coverage. Update tests to be more complete.
Submitting patch on behalf of saugustine.

Differential Revision: https://reviews.llvm.org/D49926

llvm-svn: 338750
2018-08-02 18:13:40 +00:00
George Rimar 300d363dfd [LLD][ELF] - Remove dead check from adjustSplitStackFunctionPrologues().
In according to the comment, undefined symbol should never reach there.
So, should be able to remove the check. I am assuming this is NFC. 

llvm-svn: 338723
2018-08-02 14:44:39 +00:00
George Rimar 47ec1e07c7 [LLD][ELF] - An attemp to fix BB after rL338718.
BB is unhappy :`-(
http://lab.llvm.org:8011/builders/lld-perf-testsuite/builds/5632

llvm-svn: 338722
2018-08-02 14:34:39 +00:00
George Rimar a7dbe571e6 [LLD][ELF] - Remove excessive cases from getRelocTargetVA(). NFC.
There is no point to explicitly proccess the expressions this patch removes.
We already have a llvm_unreachable for the default case.

llvm-svn: 338718
2018-08-02 14:15:02 +00:00
George Rimar 467505bd31 [LLD][ELF] - Remove dead code. NFC.
It does not seem that this code is alive.
I seems was needed previously but we fixed it.

If it is still needed, it needs new tests,
but for now I do not know how to trigger it,
and so I removed it.

llvm-svn: 338713
2018-08-02 13:18:49 +00:00
George Rimar 676dc17db0 [LLD][ELF] - Apply clang-format to InputSections.cpp. NFC.
llvm-svn: 338498
2018-08-01 08:11:54 +00:00
George Rimar a4211551f1 [LLD][ELF] - Removed excessive llvm:: prefix. NFC.
llvm-svn: 338497
2018-08-01 08:10:50 +00:00
Rui Ueyama 0e1ba29ac3 Simplify. NFC.
llvm-svn: 338409
2018-07-31 18:13:36 +00:00
Sterling Augustine 4fd84c18df Implement framework for linking split-stack object files, and x86_64 support.
llvm-svn: 337332
2018-07-17 23:16:02 +00:00
George Rimar 484aabc818 [ELF] - Eliminate ObjFile<ELFT>::getLineInfo. NFC.
Flow is the same, but a bit shorter after this change.

llvm-svn: 337183
2018-07-16 15:29:35 +00:00
Igor Kudrin 4f48b3ef90 [ELF] Update addends in non-allocatable sections for REL targets when creating a relocatable output.
This fixes PR37735.

Differential Revision: https://reviews.llvm.org/D48929

llvm-svn: 336799
2018-07-11 12:52:04 +00:00
Zaara Syeda 75c348a097 [PPC64] Add TLS local dynamic to local exec relaxation
This patch adds the target call back relaxTlsLdToLe to support TLS relaxation
from local dynamic to local exec model.

Differential Revision: https://reviews.llvm.org/D48293

llvm-svn: 336559
2018-07-09 16:35:51 +00:00
Zaara Syeda de54f584cc [PPC64] Add support for R_PPC64_GOT_DTPREL16* relocations
The local dynamic TLS access on PPC64 ELF v2 ABI uses R_PPC64_GOT_DTPREL16*
relocations when a TLS variables falls outside 2 GB of the thread storage
block. This patch adds support for these relocations by adding a new RelExpr
called R_TLSLD_GOT_OFF which emits a got entry for the TLS variable relative
to the dynamic thread pointer using the relocation R_PPC64_DTPREL64. It then
evaluates the R_PPC64_GOT_DTPREL16* relocations as the got offset for the
R_PPC64_DTPREL64 got entries.

Differential Revision: https://reviews.llvm.org/D48484

llvm-svn: 335732
2018-06-27 13:55:41 +00:00
Sean Fertile f60cb34c91 [PPC64] Thread-local storage general-dynamic to initial-exec relaxation.
Patch adds support for relaxing the general-dynamic tls sequence to
initial-exec.

the relaxation performs the following transformation:
addis r3, r2, x@got@tlsgd@ha --> addis r3, r2, x@got@tprel@ha
addi r3, r3, x@got@tlsgd@l   --> ld r3, x@got@tprel@l(r3)
bl __tls_get_addr(x@tlsgd)   --> nop
nop                          --> add r3, r3, r13

and instead of emitting a DTPMOD64/DTPREL64 pair for x, we emit a single
R_PPC64_TPREL64.

Differential Revision: https://reviews.llvm.org/D48090

llvm-svn: 335651
2018-06-26 19:38:18 +00:00
Simon Atanasyan 00d8843fa3 [ELF] Pass a pointer to InputFile to the getRelocTargetVA to escape dereferencing of nullptr. NFC
llvm-svn: 334392
2018-06-11 08:37:19 +00:00
Simon Atanasyan ed9ee69ccf [ELF][MIPS] Multi-GOT implementation
Almost all entries inside MIPS GOT are referenced by signed 16-bit
index. Zero entry lies approximately in the middle of the GOT. So the
total number of GOT entries cannot exceed ~16384 for 32-bit architecture
and ~8192 for 64-bit architecture. This limitation makes impossible to
link rather large application like for example LLVM+Clang. There are two
workaround for this problem. The first one is using the -mxgot
compiler's flag. It enables using a 32-bit index to access GOT entries.
But each access requires two assembly instructions two load GOT entry
index to a register. Another workaround is multi-GOT. This patch
implements it.

Here is a brief description of multi-GOT for detailed one see the
following link https://dmz-portal.mips.com/wiki/MIPS_Multi_GOT.

If the sum of local, global and tls entries is less than 64K only single
got is enough. Otherwise, multi-got is created. Series of primary and
multiple secondary GOTs have the following layout:
```
- Primary GOT
    Header
    Local entries
    Global entries
    Relocation only entries
    TLS entries

- Secondary GOT
    Local entries
    Global entries
    TLS entries
...
```

All GOT entries required by relocations from a single input file
entirely belong to either primary or one of secondary GOTs. To reference
GOT entries each GOT has its own _gp value points to the "middle" of the
GOT. In the code this value loaded to the register which is used for GOT
access.

MIPS 32 function's prologue:
```
lui     v0,0x0
0: R_MIPS_HI16  _gp_disp
addiu   v0,v0,0
4: R_MIPS_LO16  _gp_disp
```

MIPS 64 function's prologue:
```
lui     at,0x0
14: R_MIPS_GPREL16  main
```

Dynamic linker does not know anything about secondary GOTs and cannot
use a regular MIPS mechanism for GOT entries initialization. So we have
to use an approach accepted by other architectures and create dynamic
relocations R_MIPS_REL32 to initialize global entries (and local in case
of PIC code) in secondary GOTs. But ironically MIPS dynamic linker
requires GOT entries and correspondingly ordered dynamic symbol table
entries to deal with dynamic relocations. To handle this problem
relocation-only section in the primary GOT contains entries for all
symbols referenced in global parts of secondary GOTs. Although the sum
of local and normal global entries of the primary got should be less
than 64K, the size of the primary got (including relocation-only entries
can be greater than 64K, because parts of the primary got that overflow
the 64K limit are used only by the dynamic linker at dynamic link-time
and not by 16-bit gp-relative addressing at run-time.

The patch affects common LLD code in the following places:

- Added new hidden -mips-got-size flag. This flag required to set low
maximum size of a single GOT to be able to test the implementation using
small test cases.

- Added InputFile argument to the getRelocTargetVA function. The same
symbol referenced by GOT relocation from different input file might be
allocated in different GOT. So result of relocation depends on the file.

- Added new ctor to the DynamicReloc class. This constructor records
settings of dynamic relocation which used to adjust address of 64kb page
lies inside a specific output section.

With the patch LLD is able to link all LLVM+Clang+LLD applications and
libraries for MIPS 32/64 targets.

Differential revision: https://reviews.llvm.org/D31528

llvm-svn: 334390
2018-06-11 07:24:31 +00:00
Zaara Syeda 4455b37666 [PPC64] Add support for local-exec TLS model
This patch adds the relocations needed support the local-exec TLS model:

R_PPC64_TPREL16
R_PPC64_TPREL16_HA
R_PPC64_TPREL16_LO
R_PPC64_TPREL16_HI
R_PPC64_TPREL16_DS
R_PPC64_TPREL16_LO_DS
R_PPC64_TPREL16_HIGHER
R_PPC64_TPREL16_HIGHERA
R_PPC64_TPREL16_HIGHEST
R_PPC64_TPREL16_HIGHESTA

Differential Revision: https://reviews.llvm.org/D47598

llvm-svn: 334304
2018-06-08 17:04:09 +00:00
Sean Fertile 1a8343fce3 [PPC64] Support R_PPC64_GOT_TLSLD16 relocations.
Add support for the R_PPC64_GOT_TLSLD16 relocations used to build the address of
the tls_index struct used in local-dynamic tls.

Differential Revision: https://reviews.llvm.org/D47538

llvm-svn: 333681
2018-05-31 18:44:12 +00:00
Sean Fertile fb613e552a Rename R_TLSGD/R_TLSLD to add _GOT_FROM_END. NFC.
getRelocTargetVA for R_TLSGD and R_TLSLD RelExprs calculate an offset from the
end of the got, so adjust the names to reflect this.

Differential Revision: https://reviews.llvm.org/D47379

llvm-svn: 333674
2018-05-31 18:07:06 +00:00
Sean Fertile ef0f7496d1 [PPC64] Support General-Dynamic tls.
Adds handling of all the relocation types for general-dynamic thread local
storage.

Differential Revision: https://reviews.llvm.org/D47325

llvm-svn: 333420
2018-05-29 14:34:38 +00:00
Peter Collingbourne 11dc7fcae2 ELF: Do not ICF two sections with different output sections.
Note that this doesn't do the right thing in the case where there is
a linker script. We probably need to move output section assignment
before ICF to get the correct behaviour here.

Differential Revision: https://reviews.llvm.org/D47241

llvm-svn: 333052
2018-05-23 01:58:43 +00:00
Simon Atanasyan 0560050668 [ELF][MIPS] Fix calculation of GP relative relocations in case of relocatable output
Some MIPS relocations depend on "gp" value. By default, this value has
0x7ff0 offset from a .got section. But relocatable files produced by a
compiler or a linker might redefine this default value and we have to
use it for a calculation of the relocation result. When we generate EXE
or DSO it's trivial. Generating a relocatable output is more difficult
case because the linker does calculate relocations in this case and
cannot store individual "gp" values used by each input object file.
As a workaround we add the "gp" value to the relocation addend.

This fixes https://llvm.org/pr31149

Differential revision: https://reviews.llvm.org/D45972

llvm-svn: 331772
2018-05-08 15:34:06 +00:00
Sean Fertile d2e887d2f6 [PPC64] Emit plt call stubs to the text section rather then the plt section.
On PowerPC calls to functions through the plt must be done through a call stub
that is responsible for:
1) Saving the toc pointer to the stack.
2) Loading the target functions address from the plt into both r12 and the
   count register.
3) Indirectly branching to the target function.

Previously we have been emitting these call stubs to the .plt section, however
the .plt section should be reserved for the lazy symbol resolution stubs. This
patch moves the call stubs to the text section by moving the implementation from
writePlt to the thunk framework.

Differential Revision: https://reviews.llvm.org/D46204

llvm-svn: 331607
2018-05-06 19:13:29 +00:00
Zaara Syeda f61b0733a8 [PPC64] Remove support for ELF V1 ABI in LLD
The current support for V1 ABI in LLD is incomplete.
This patch removes V1 ABI support and changes the default behavior to V2 ABI,
issuing an error when using the V1 ABI. It also updates the testcases to V2
and removes any V1 specific tests.

Differential Revision: https://reviews.llvm.org/D46316

llvm-svn: 331529
2018-05-04 15:09:49 +00:00
Zaara Syeda 116c0424da Fix warning: result of 32-bit shift implicitly converted to 64 bits - NFC
Fix warning caused by rL331046.

Differential Revision: https://reviews.llvm.org/D45729

llvm-svn: 331181
2018-04-30 14:37:28 +00:00
Rafael Espindola f1652d4c60 Split .eh_frame sections in parellel.
We can now split them in the same spot we split merge sections.

llvm-svn: 331064
2018-04-27 18:17:36 +00:00
Rafael Espindola 9bf1006278 Split merge sections early.
Now that getSectionPiece is fast (uses a hash) it is probably OK to
split merge sections early.

The reason I want to do this is to split eh_frame sections in the same
place.

This does mean that we have to decompress early. Given that the only
compressed sections are debug info, I don't think we are missing much.

It is a small improvement: 0.5% on the geometric mean.

llvm-svn: 331058
2018-04-27 16:29:57 +00:00
Zaara Syeda 82dd99e08e [PPC64] Add offset to local entry point when calling functions without plt
PPC64 V2 ABI describes two entry points to a function. The global entry point
sets up the TOC base pointer. When calling a local function, the call should
branch to the local entry point rather than the global entry point.
Section 3.4.1 describes using the 3 most significant bits of the st_other
field to find out how many instructions there are between the local and global
entry point. This patch adds the correct offset required to branch to the local
entry point of a function.

Differential Revision: https://reviews.llvm.org/D45729

llvm-svn: 331046
2018-04-27 15:41:19 +00:00
Rui Ueyama d134d2e509 Remove duplicate "error:" from an error message.
This patch also simplifies the code a bit which wasn't committed in
https://reviews.llvm.org/r330600.

llvm-svn: 330644
2018-04-23 20:34:35 +00:00
Zaara Syeda 25b488b0ea [PPC64] Fix toc restore nops offset for V2 ABI
The PPC64 V2 ABI restores the toc base by loading from an offset of 24 from r1.
This patch fixes the offset and updates the testcases from V1 to V2. It also
issues an error when a nop is missing after a call to an external function.

Differential Revision: https://reviews.llvm.org/D45892

llvm-svn: 330600
2018-04-23 15:01:24 +00:00
Rafael Espindola 4809e2c11d Define InputSection::getOffset inline.
This is much simpler than the other section types and there are many
places where the section type is statically know.

llvm-svn: 330350
2018-04-19 18:00:46 +00:00
Rafael Espindola f4d6e8caea Simplify Repl handling.
Now that we don't ICF synthetic sections, we can go back to the old
logic on whose responsibility it is to check Repl.

The idea is that Sec->something() will not check Repl. It is the
responsibility of the caller to find the correct Sec.

llvm-svn: 330346
2018-04-19 17:26:50 +00:00