Commit Graph

25 Commits

Author SHA1 Message Date
Jim Grosbach 44e5c39c29 Thumb2 relaxation for tADR to t2ADR.
llvm-svn: 148456
2012-01-19 02:09:38 +00:00
Jim Grosbach b008df40d3 Add comment and fix range check in condition.
llvm-svn: 148455
2012-01-19 01:50:30 +00:00
Jim Grosbach cb80eb2e75 Thumb2 relaxation for LDR(literal).
If the fixup is out of range for the Thumb1 instruction, relax it
to the Thumb2 encoding instead.

rdar://10711829

llvm-svn: 148424
2012-01-18 21:54:16 +00:00
Jim Grosbach aba3de99c0 Tidy up. MCAsmBackend naming conventions.
llvm-svn: 148400
2012-01-18 18:52:16 +00:00
Jim Grosbach adcc938c46 Thumb2 load/store fixups don't set the thumb bit.
Load/store instructions w/ a fixup to be relative a function marked as thumb
don't use the low bit to specify thumb vs. non-thumb like interworking
branches do, so don't set it when dealing with those fixups.

rdar://10348687.

llvm-svn: 148366
2012-01-18 00:40:25 +00:00
Jim Grosbach 3b50c9ec7f Move some ARM specific MCAssmebler bits into the ARMAsmBackend.
llvm-svn: 148364
2012-01-18 00:23:57 +00:00
Rafael Espindola a0124055b1 Move the ARM specific parts of the ELF writer to Target/ARM.
llvm-svn: 147115
2011-12-22 00:37:50 +00:00
Rafael Espindola 1ad4095d6b Reduce the exposure of Triple::OSType in the ELF object writer. This will
avoid including ADT/Triple.h in many places when the target specific bits are
moved.

llvm-svn: 147059
2011-12-21 17:00:36 +00:00
Jim Grosbach 8648c10184 ARM assembly parsing and encoding support for LDRD(label).
rdar://9932658

llvm-svn: 146921
2011-12-19 23:06:24 +00:00
Jim Grosbach 425e180ce8 Tidy up value checking.
llvm-svn: 145895
2011-12-06 01:53:17 +00:00
Jim Grosbach 9105085b4a Fix ARM handling of tBcc branch relaxation.
rdar://10069056

llvm-svn: 145885
2011-12-06 01:08:19 +00:00
Jim Grosbach 25b63fa117 Move target-specific logic out of generic MCAssembler.
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

llvm-svn: 145881
2011-12-06 00:47:03 +00:00
Jim Grosbach 34a7c6dfd7 Simple branch relaxation for Thumb2 Bcc instructions.
Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.

llvm-svn: 145871
2011-12-05 23:45:46 +00:00
Jim Grosbach d3f02cbce9 Generalize the fixup info for ARM mode.
We don't (yet) have the granularity in the fixups to be specific about which
bitranges are affected. That's a future cleanup, but we're not there yet.

llvm-svn: 144852
2011-11-16 22:48:37 +00:00
Jim Grosbach 7ccdb7c0ae Fix encoding of NOP used for padding in ARM mode .align.
llvm-svn: 144842
2011-11-16 22:40:25 +00:00
Jim Grosbach fb2f1d61f4 ARM VLD/VST assembly parsing for symbolic address operands.
llvm-svn: 143413
2011-11-01 01:24:45 +00:00
Jim Grosbach d76f43e18c Correct for my over-eager delete finger.
llvm-svn: 140892
2011-09-30 22:02:45 +00:00
Jim Grosbach d2222c386c ARM Fixup valus for movt/movw are for the whole value.
Remove an assert that was expecting only the relevant 16bit portion for
the fixup being handled. Also kill some dead code in the T2 portion.

rdar://9653509

llvm-svn: 140861
2011-09-30 17:23:05 +00:00
Jim Grosbach 21a60b6f90 ARM asm backend initialize isThumbMode based on target triple.
llvm-svn: 138501
2011-08-24 22:27:35 +00:00
Jim Grosbach 181d2f92b5 Thumb assembly parsing and encoding for LDR(literal).
llvm-svn: 138052
2011-08-19 18:20:48 +00:00
Jim Grosbach f00b9ccd22 ARM Thumb blx instruction fixup has same data range as bl.
These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.

llvm-svn: 137947
2011-08-18 16:57:50 +00:00
Jim Grosbach 45e50d8a0b ARM .align NOP padding uses different encoding pre-ARMv6.
Patch by Kristof Beyls and James Malloy.

llvm-svn: 137723
2011-08-16 17:06:20 +00:00
Evan Cheng 5928e69d20 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
llvm-svn: 136010
2011-07-25 23:24:55 +00:00
Evan Cheng f2596bc62a Move TargetAsmParser.h TargetAsmBackend.h and TargetAsmLexer.h to MC where they belong.
llvm-svn: 135833
2011-07-23 00:45:41 +00:00
Evan Cheng ad5f485957 Sink ARM mc routines into MCTargetDesc.
llvm-svn: 135825
2011-07-23 00:00:19 +00:00