Commit Graph

64695 Commits

Author SHA1 Message Date
Silviu Baranga 314e58fdcc Add hardware division as a default feature on Cortex-A15. Also add test cases to check this, and change diagnostics for the hwdiv-arm feature to something useful.
llvm-svn: 192963
2013-10-18 10:18:40 +00:00
David Majnemer 451b7dd1ef CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomics
There are targets that support i128 sized scalars but cannot emit
instructions that modify them directly.  The proper thing to do is to
emit a libcall.

This fixes PR17481.

llvm-svn: 192957
2013-10-18 08:03:43 +00:00
Alp Toker 42235db0e9 Fix a conversion warning in the mingw32 build
gcc diagnoses this:
  warning: converting to non-pointer type 'unsigned int' from NULL

Also remove an empty statement.

No change in functionality.

llvm-svn: 192955
2013-10-18 07:53:25 +00:00
Alexey Samsonov 742e6b8efd [DebugInfo] Remove unneeded struct member and hide struct definition. No functionality change.
llvm-svn: 192954
2013-10-18 07:13:32 +00:00
Alp Toker 153675b718 Fix initialization order warning in mingw32 build
No change in functionality.

llvm-svn: 192953
2013-10-18 07:09:58 +00:00
Alexey Samsonov 5b5a7865e7 [DebugInfo] Remove dead code.
llvm-svn: 192952
2013-10-18 07:03:16 +00:00
Hans Wennborg 7ddcdc82a5 Revert "Re-commit r192758 - MC: quote tricky symbol names in asm output"
This caused the clang-native-mingw32-win7 buildbot to break.

The assembler was complaining about the following lines that were showing up
in the asm for CrashRecoveryContext.cpp:

  movl  $"__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4", 4(%eax)
  calll "_AddVectoredExceptionHandler@8"
  .def   "__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4";
  "__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4":
  calll "_RemoveVectoredExceptionHandler@4"

Reverting for now.

llvm-svn: 192940
2013-10-18 02:14:40 +00:00
Eric Christopher ffbc4decc2 Temporarily revert r192749 as it is causing problems for LTO and
requires a more in depth change to the IR structure.

llvm-svn: 192938
2013-10-18 01:57:30 +00:00
David Blaikie 01fae51fef DIEHash: Add more things (and remove one character) from the COLLECT_ATTR macro
Makes the uses more terse and requires that they use a semicolon at the
end that helps editors indent proceeding lines correctly.

llvm-svn: 192925
2013-10-17 22:14:08 +00:00
David Blaikie ca353be652 DIEHash: Support for simple (non-recursive, non-reused) type references
llvm-svn: 192924
2013-10-17 22:07:09 +00:00
David Peixotto 8e5abc52cb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets
This commit implements the correct lowering of the
COPY_STRUCT_BYVAL_I32 pseudo-instruction for thumb1 targets.
Previously, the lowering of COPY_STRUCT_BYVAL_I32 generated the
post-increment forms of ldr/ldrh/ldrb instructions. Thumb1 does not
have the post-increment form of these instructions so the generated
assembly contained invalid instructions.

Passing the generated assembly to gcc caused it to complain with an
error like this:

  Error: cannot honor width suffix -- `ldrb r3,[r0],#1'

and the integrated assembler would generate an object file with an
invalid instruction encoding.

This commit contains a small test case that demonstrates the problem
with thumb1 targets as well as an expanded test case that more
throughly tests the lowering of byval struct passing for arm,
thumb1, and thumb2 targets.

llvm-svn: 192916
2013-10-17 19:52:05 +00:00
David Peixotto c32e24a1b7 Refactor lowering for COPY_STRUCT_BYVAL_I32
This commit refactors the lowering of the COPY_STRUCT_BYVAL_I32
pseudo-instruction in the ARM backend. We introduce a new helper
class that encapsulates all of the operations needed during the
lowering. The operations are implemented for each subtarget in
different subclasses. Currently only arm and thumb2 subtargets are
supported.

This refactoring was done to easily implement support for thumb1
subtargets. This initial patch does not add support for thumb1, but
is only a refactoring. A follow on patch will implement the support
for thumb1 subtargets.

No intended functionality change.

llvm-svn: 192915
2013-10-17 19:49:22 +00:00
Anders Waldenborg 959f04077c llvm-c: Add LLVMIntPtrType{,ForAS}InContext
All of the Core API functions have versions which accept explicit context, in
addition to ones which work on global context. This commit adds functions
which accept explicit context to the Target API for consistency.

Patch by Peter Zotov

Differential Revision: http://llvm-reviews.chandlerc.com/D1912

llvm-svn: 192913
2013-10-17 18:51:01 +00:00
Rafael Espindola 045a78fa7e Rename fields of GlobalStatus to match the coding style.
llvm-svn: 192910
2013-10-17 18:18:52 +00:00
Chad Rosier 37d29173aa [AArch64] Add support for NEON scalar three register different instruction
class.  The instruction class includes the signed saturating doubling
multiply-add long, signed saturating doubling multiply-subtract long, and
the signed saturating doubling multiply long instructions.

llvm-svn: 192908
2013-10-17 18:12:29 +00:00
Rafael Espindola 27797baee7 rename SafeToDestroyConstant to isSafeToDestroyConstant and clang-format.
llvm-svn: 192907
2013-10-17 18:06:32 +00:00
Rafael Espindola 026c9cbefe Simplify the interface of AnalyzeGlobal a bit and rename to analyzeGlobal.
No functionality change.

llvm-svn: 192906
2013-10-17 18:00:25 +00:00
Daniel Sanders a4eaf59f9e [mips][msa] Added lsa instruction
llvm-svn: 192895
2013-10-17 13:38:20 +00:00
Alexey Samsonov caabb0eac1 [DebugInfo] Delete dead code, simplify and fix code style for some existing code. No functionality change.
llvm-svn: 192894
2013-10-17 13:28:16 +00:00
Daniel Sanders 0390568a09 [mips][msa] Removed ldx.[bhwd] and stx.[bhwd].
These were present in a previous version of the MSA spec but are not
present in the published version. There is no hardware that uses these
instructions.

llvm-svn: 192888
2013-10-17 12:16:03 +00:00
Richard Sandiford 95f7ba988b Replace sra with srl if a single sign bit is required
E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2).

llvm-svn: 192884
2013-10-17 11:16:57 +00:00
Andrea Di Biagio 561badf717 Fix edge condition in DAGCombiner to improve codegen of shift sequences.
When canonicalizing dags according to the rule
(shl (zext (shr X, c1) ), c1) ==> (zext (shl (shr X, c1), c1))

remember to add the new shl dag to the DAGCombiner worklist of nodes.
If we don't explicitly add it to the worklist of nodes to visit, we
may not trigger later on the rule that folds the shift left + logical
shift right into a AND instruction with bitmask.

llvm-svn: 192883
2013-10-17 11:02:58 +00:00
Evgeniy Stepanov 21a9c93a4d [msan] Use zero-extension in shadow cast by default.
Switch to sign-extension in r192575 caused 7% perf loss on 482.sphinx3.

llvm-svn: 192882
2013-10-17 10:53:50 +00:00
Anders Waldenborg 39f5d7d5f0 llvm-c: Don't assert in LLVMTargetMachineEmitToFile on nonexistent file
Error handling code for raw_fd_ostream constructor is present, but
never used, because formatted_raw_ostream will always assert on closed
fd's before.

Patch by Peter Zotov

Differential Revision: http://llvm-reviews.chandlerc.com/D1909

llvm-svn: 192881
2013-10-17 10:39:35 +00:00
Daniel Sanders 199b731b42 [mips][msa] Correct definition order of ftrunc_[su], ftint_[su], and ftq.
Define these three instructions in alphabetical order (like the rest of the
file).
No functional change.

llvm-svn: 192880
2013-10-17 10:30:12 +00:00
Michael Kuperstein 2cbd5132bf Changing DebugInfoFinder to iterate over all the compile units.
Solves http://llvm.org/bugs/show_bug.cgi?id=17507

Committed on behalf of alon.mishne@intel.com

llvm-svn: 192879
2013-10-17 10:27:12 +00:00
Anders Waldenborg a89c1e3145 llvm-c: Return NULL from LLVMGetFirstTarget instead of asserting
If no targets are registered, LLVMGetFirstTarget currently fails with
an assertion. This patch makes it return NULL instead, similarly to
how LLVMGetNextTarget would.

Patch by Peter Zotov

Differential Revision: http://llvm-reviews.chandlerc.com/D1908

llvm-svn: 192878
2013-10-17 10:25:24 +00:00
Dmitry Vyukov b1ad5720a2 tsan: implement no_sanitize_thread attribute
If a function has no_sanitize_thread attribute,
do not instrument memory accesses in it.

llvm-svn: 192871
2013-10-17 07:20:06 +00:00
Jim Grosbach c044c65470 x86: Move bitcasts outside concat_vector.
Consider the following:

typedef unsigned short ushort4U __attribute__((ext_vector_type(4),
aligned(2)));
typedef unsigned short ushort4 __attribute__((ext_vector_type(4)));
typedef unsigned short ushort8 __attribute__((ext_vector_type(8)));
typedef int int4 __attribute__((ext_vector_type(4)));

int4 __bbase_cvt_int(ushort4 v) {
  ushort8 a;
  a.lo = v;
  return _mm_cvtepu16_epi32(a);
}

This generates the, not unreasonable, IR:
define <4 x i32> @foo0(double %v.coerce) nounwind ssp {
  %tmp = bitcast double %v.coerce to <4 x i16>
  %tmp1 = shufflevector <4 x i16> %tmp, <4 x i16> undef, <8 x i32> <i32
  %0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
  %tmp2 = tail call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %tmp1)
  ret <4 x i32> %tmp2
}

The problem is when type legalization gets hold of the v4i16. It
legalizes that by spilling to the stack, then doing a zero-extending
load. Things go even more silly from there, ending up with something
like:
_foo0:
  movsd %xmm0, -8(%rsp)       <== Spill to the stack.
  movq  -8(%rsp), %xmm0       <== Reload it right back out.
  pmovzxwd  %xmm0, %xmm1      <== Here's what we actually asked for.
  pblendw $1, %xmm1, %xmm0    <== We don't need this at all
  pmovzxwd  %xmm0, %xmm0      <== We already did this
  ret

The v8i8 to v8i16 zext intrinsic gives even worse results, with two
table lookups via pshufb instructions(!!).

To avoid all that, we can move the bitcasting until after we've formed
the wider (legal) vector type. Then our normal codegen flows along
nicely and we get the expected:
_foo0:
  pmovzxwd  %xmm0, %xmm0
  ret

rdar://15245794

llvm-svn: 192866
2013-10-17 02:58:06 +00:00
Eric Christopher 2c8b7907c3 According to the dwarf standard pubnames and pubtypes for languages
like C++ should be the fully qualified names for the type.

Add a routine that does a language specific context walk to build
up the qualified name and use it when we add types/names to the
tables. Expand the gnu pubnames testcase as it's the most complex
to make sure that qualified types are also being added.

llvm-svn: 192865
2013-10-17 02:06:06 +00:00
Filip Pizlo a535b14157 Expose install_fatal_error_handler() through the C API.
I expose the API with some caveats:

- The C++ API involves a traditional void* opaque pointer for the fatal 
error callback.  The C API doesn’t do this.  I don’t think that the void* 
opaque pointer makes any sense since this is a global callback - there will 
only be one of them.  So if you need to pass some data to your callback, 
just put it in a global variable.

- The bindings will ignore the gen_crash_diag boolean.  I ignore it because 
(1) I don’t know what it does, (2) it’s not documented AFAIK, and (3) I 
couldn’t imagine any use for it.  I made the gut call that it probably 
wasn’t important enough to expose through the C API.

llvm-svn: 192864
2013-10-17 01:38:28 +00:00
Jack Carter d4e9615d1c [projects/test-suite] White space and long line fixes.
No functionality changes.

llvm-svn: 192863
2013-10-17 01:34:33 +00:00
Eric Christopher 96eff3f393 Add the subprogram DIEs to the context they're created with only
if they're a declaration, otherwise they're owned by the compile
unit.

llvm-svn: 192861
2013-10-17 01:31:12 +00:00
Hans Wennborg 69918bccab Re-commit r192758 - MC: quote tricky symbol names in asm output
The reason this got reverted was that the @feat.00 symbol which was emitted
for every TU became quoted, and on cygwin/mingw we use the gas assembler which
couldn't handle the quotes.

This commit fixes the problem by only emitting @feat.00 for win32, where we use
clang -cc1as to assemble. gas would just drop this symbol anyway, so there is no
loss there.

With @feat.00 gone, there shouldn't be quoted symbols showing up on cygwin since
it uses the Itanium ABI, which doesn't put these funny characters in symbols.

> Because of win32 mangling, we produce symbol and section names with
> funny characters in them, most notably @ characters.
>
> MC would choke on trying to parse its own assembly output. This patch addresses
> that by:
>
> - Making @ trigger quoting of symbol names
> - Also quote section names in the same way
> - Just parse section names like other identifiers (to allow for quotes)
> - Don't assume @ signifies a symbol variant if it is in a string.

llvm-svn: 192859
2013-10-17 01:13:02 +00:00
David Blaikie 8a142aaa01 DIEHash: Include the type's context in the type hash.
llvm-svn: 192856
2013-10-17 00:10:34 +00:00
David Blaikie 6316ca45a7 DIEHash: Use DW_FORM_sdata for integers, per spec.
This allows us to produce the same hash as GCC for at least some simple
examples.

llvm-svn: 192855
2013-10-16 23:36:20 +00:00
Anders Waldenborg b822cffad2 llvm-c: Add LLVMDumpType
The C API currently allows to dump values (LLVMDumpValue), but a similar method for types was not exported.

Patch by Peter Zotov

Differential Revision: http://llvm-reviews.chandlerc.com/D1911

llvm-svn: 192852
2013-10-16 21:30:25 +00:00
Chad Rosier 846a72539c [AArch64] Add support for NEON scalar negate instruction.
llvm-svn: 192843
2013-10-16 21:04:39 +00:00
Chad Rosier 175601d997 [AArch64] Add support for NEON scalar absolute value instruction.
llvm-svn: 192842
2013-10-16 21:04:34 +00:00
David Blaikie 920bb2a758 Remove ambiguity introduced in r192836
llvm-svn: 192840
2013-10-16 20:40:46 +00:00
Eric Christopher 081efcc3ac Add support for the VSX target attribute. No functional change
as we don't actually use it to emit any code yet.

llvm-svn: 192837
2013-10-16 20:38:58 +00:00
David Blaikie 71a0ad66a9 DIEHash: Include the trailing zero byte after the children of a DIE
llvm-svn: 192836
2013-10-16 20:29:06 +00:00
Yunzhong Gao dfc277f350 Enabling 3DNow! prefetch instruction for a few AMD processors: bobcat, jaguar,
bulldozer and piledriver. Support for the instruction itself seems to have
already been added in r178040.

Differential Revision: http://llvm-reviews.chandlerc.com/D1933

llvm-svn: 192828
2013-10-16 19:04:11 +00:00
Rafael Espindola 6174e5ee68 Create an atom with just the data that failed to disassemble.
Patch by Stephen Checkoway.

llvm-svn: 192827
2013-10-16 19:03:14 +00:00
Andrew Trick 811a2ef96e After PostRA scheduling, don't set kill flags on undef operands.
This should fix the ATOM buildbot failing on break-avx-dep.ll.

llvm-svn: 192824
2013-10-16 18:30:23 +00:00
Rafael Espindola bab2afbfbe Fix MCDataAtom never calling remap when adding data.
This patch fixes a small mistake in MCDataAtom::addData() where it doesn't ever
call remap():

-  if (Data.size() > Begin - End - 1)
+  if (Data.size() > End + 1 - Begin)
     remap(Begin, End + 1);

This is currently not visible because of another bug is the disassembler, so
the patch includes a unit test.

Patch by Stephen Checkoway.

llvm-svn: 192823
2013-10-16 18:26:16 +00:00
Anders Waldenborg 84355db7f9 [llvm-c] Add LLVMPrintModuleToString.
Like LLVMDumpModule but returns the string (that needs to be freed
with LLVMDisposeMessage) instead of printing it to stderr.

Differential Revision: http://llvm-reviews.chandlerc.com/D1941

llvm-svn: 192821
2013-10-16 18:00:54 +00:00
Arnold Schwaighofer a66582470b SLPVectorizer: Don't vectorize volatile memory operations
radar://15231682

Reapply r192799,
  http://lab.llvm.org:8011/builders/lldb-x86_64-debian-clang/builds/8226
showed that the bot is still broken even with this out.

llvm-svn: 192820
2013-10-16 17:52:40 +00:00
Arnold Schwaighofer 06a0324f6a Revert "SLPVectorizer: Don't vectorize volatile memory operations"
This speculatively reverts commit 192799. It might have broken a linux buildbot.

llvm-svn: 192816
2013-10-16 17:19:40 +00:00
Tom Stellard b34186ae38 R600: Fix a crash in the AMDILCFGStructurizer
We were calling llvm_unreachable() when failing to optimize the
branch into if case.  However, it is still possible for us
to structurize the CFG by duplicating blocks even if this optimization
fails.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 192813
2013-10-16 17:06:02 +00:00