Commit Graph

233832 Commits

Author SHA1 Message Date
Tom Stellard f3af841462 AMDGPU/SI: Don't use fixup_si_rodata for scratch rsrc relocations
Summary:
We need to set the fixup type to FK_Data_4 for the
SCRATCH_RSRC_DWORD[01] symbols, since these require absolute
relocations, and fixup_si_rodata is for relative relocations.

Reviewers: arsenm, kzhuravl

Subscribers: arsenm, kzhuravl, llvm-commits

Differential Revision: http://reviews.llvm.org/D21153

llvm-svn: 272417
2016-06-10 19:26:38 +00:00
Mehdi Amini cbd68ecf04 Move CodeGen test from Generic to X86 specific directory
llvm-svn: 272416
2016-06-10 19:14:01 +00:00
Nico Weber a691689ae8 Remove a few gendered pronouns.
llvm-svn: 272415
2016-06-10 18:53:04 +00:00
Mehdi Amini 1d396832d3 Interprocedural Register Allocation (IPRA): add a Transformation Pass
Adds a MachineFunctionPass that scans the body to find calls, and
update the register mask with the one saved by the
RegUsageInfoCollector analysis in PhysicalRegisterUsageInfo.

Patch by Vivek Pandya <vivekvpandya@gmail.com>

Differential Revision: http://reviews.llvm.org/D21180

llvm-svn: 272414
2016-06-10 18:37:21 +00:00
Josh Gao 4e9cef0491 Strip Android version when looking up toolchain paths.
Summary:
Android target triples can include a version number in the abi field
(e.g. 'aarch64-linux-android21'), used for checking for availability.
However, the driver was searching for toolchain binaries using the
passed in triple as a prefix.

Reviewers: srhines, danalbert, t.p.northover

Subscribers: t.p.northover, aemerson, tberghammer, danalbert, srhines, cfe-commits

Differential Revision: http://reviews.llvm.org/D21163

llvm-svn: 272413
2016-06-10 18:30:33 +00:00
David Majnemer b2b0da4ad0 [-fms-extensions] Permit incomplete types in dynamic exception specifications
Microsoft headers, comdef.h and comutil.h, assume that this is an OK
thing to do.  Downgrade the hard error to a warning if we are in
-fms-extensions mode.

This fixes PR28080.

llvm-svn: 272412
2016-06-10 18:24:41 +00:00
Sanjay Patel d558bdadd2 [x86] add test for PR28044
llvm-svn: 272411
2016-06-10 18:05:55 +00:00
Chad Rosier 840b3efeae Add a period. NFC.
llvm-svn: 272410
2016-06-10 17:59:22 +00:00
Chad Rosier a8bc512be5 Fix whitespace. NFC.
llvm-svn: 272409
2016-06-10 17:58:01 +00:00
Saleem Abdulrasool 6d0d228d2a test: split test into two files
Split up the test cases into two inputs as per post-commit review comments from
Renato.  NFC.

llvm-svn: 272408
2016-06-10 17:33:28 +00:00
Jim Ingham b2e7d28ed6 SBThread also had some places where it got the ExecutionContext w/o
taking the API lock.

llvm-svn: 272407
2016-06-10 17:22:26 +00:00
Michael Kuperstein 9a0542a792 [X86] Add costs for SSE zext/sext to v4i64 to TTI
The costs are somewhat hand-wavy, but should be much closer to the truth
than what we get from BasicTTI.

Differential Revision: http://reviews.llvm.org/D21156

llvm-svn: 272406
2016-06-10 17:01:05 +00:00
Xinliang David Li df5843a532 [profile] fix bot failure on darwin
Profile setting accross shared lib is broken on darwin (to be investigated).
Move the test to Linux only for now

llvm-svn: 272404
2016-06-10 16:23:32 +00:00
Mehdi Amini bbacddfe92 Interprocedural Register Allocation (IPRA) Analysis
Add an option to enable the analysis of MachineFunction register
usage to extract the list of clobbered registers.

When enabled, the CodeGen order is changed to be bottom up on the Call
Graph.

The analysis is split in two parts, RegUsageInfoCollector is the
MachineFunction Pass that runs post-RA and collect the list of
clobbered registers to produce a register mask.

An immutable pass, RegisterUsageInfo, stores the RegMask produced by
RegUsageInfoCollector, and keep them available. A future tranformation
pass will use this information to update every call-sites after
instruction selection.

Patch by Vivek Pandya <vivekvpandya@gmail.com>

Differential Revision: http://reviews.llvm.org/D20769

llvm-svn: 272403
2016-06-10 16:19:46 +00:00
Strahinja Petrovic b859896815 This patch fixes target linker emulation for ARM 32 big endian.
llvm-svn: 272402
2016-06-10 16:09:20 +00:00
Evandro Menezes 72d6a934cc [streambuf] Added call to traits_type::copy to common case in xsgetn()
Patch by Laman Sole <laxman.g@partner.samsung.com>, Sebastian Pop
<s.pop@samsung.com>, Aditya Kumar <aditya.k7@samsung.com>

Differential Revision: http://reviews.llvm.org/D21103

llvm-svn: 272401
2016-06-10 16:00:29 +00:00
Evandro Menezes a3a0a60cff [AArch64] Add preferred alignments for Exynos M1
Differential Revision: http://reviews.llvm.org/D21203

llvm-svn: 272400
2016-06-10 16:00:18 +00:00
Krzysztof Parzyszek 96cfc381e2 [Hexagon] Remove incorrect offset scaling
llvm-svn: 272399
2016-06-10 15:43:18 +00:00
Sanjay Patel 27f06ae7a5 [x86] fix test attributes and autogenerate checks
llvm-svn: 272398
2016-06-10 15:30:52 +00:00
Sanjay Patel cccccd9ab5 [x86] add missing tests for fcmp ueq/one
Somehow, the codegen logic for these sequences has gone completely untested
until now (note the 2 compare instructions generated per test).

There's also an *Intel* AVX optimization opportunity exposed in these cases
and the existing tests. Intel's (but not AMD's) AVX spec shows that extra FP
predicates were added, so a single comparison should always be sufficient,
and operand commutation should never be necessary.

llvm-svn: 272397
2016-06-10 15:17:54 +00:00
Sanjay Patel 330a359fb3 [x86] regenerate checks
llvm-svn: 272396
2016-06-10 14:48:50 +00:00
Matthew Simpson 12b9c5ba98 Reapply "[TTI] Refine default cost for interleaved load groups with gaps"
This reapplies commit r272385 with a fix. The build was failing when compiled
with gcc, but not with clang. With the fix, we now get the data layout from the
current TTI implementation, which will hopefully solve the issue.

llvm-svn: 272395
2016-06-10 14:33:30 +00:00
Ben Craig 330c0b6c8c Preallocate ExplodedNode hash table
Rehashing the ExplodedNode table is very expensive. The hashing
itself is expensive, and the general activity of iterating over the
hash table is highly cache unfriendly. Instead, we guess at the
eventual size by using the maximum number of steps allowed. This
generally avoids a rehash. It is possible that we still need to
rehash if the backlog of work that is added to the worklist
significantly exceeds the number of work items that we process. Even
if we do need to rehash in that scenario, this change is still a
win, as we still have fewer rehashes that we would have prior to
this change.

For small work loads, this will increase the memory used. For large
work loads, it will somewhat reduce the memory used. Speed is
significantly increased. A large .C file took 3m53.812s to analyze
prior to this change. Now it takes 3m38.976s, for a ~6% improvement.

http://reviews.llvm.org/D20933

llvm-svn: 272394
2016-06-10 13:22:13 +00:00
Roman Shirokiy d93998f606 Test commit
llvm-svn: 272393
2016-06-10 13:12:48 +00:00
Simon Pilgrim 2fa2690bca [X86][SSE] Added target shuffle combine tests for byte shift/rotates (PSLLDQ/PSRLDQ/PALIGNR)
llvm-svn: 272392
2016-06-10 13:03:22 +00:00
Matthew Simpson 65c7b74de4 Revert "[TTI] Refine default cost for interleaved load groups with gaps"
This reverts commit r272385. This commit broke the build. I'm temporarily
reverting to investigate.

llvm-svn: 272391
2016-06-10 12:41:33 +00:00
Simon Atanasyan 9b861181f9 [ELF] Use static function isPreemptible instead of SymbolBody::isPreemptible. NFC
Just for consistency with other parts of the code.

llvm-svn: 272390
2016-06-10 12:26:39 +00:00
Simon Atanasyan 311b4b15e1 [ELF][MIPS] Move MIPS specific code under `if` block to accent its specificity. NFC
llvm-svn: 272389
2016-06-10 12:26:28 +00:00
Simon Atanasyan a26a157b0a [ELF][MIPS] Fix mask used to parse MIPS 3-in-1 relocation packet
In isPreemptible routine we interested in R_MIPS_GPREL16 relocation
only. This relocation fits 0xf. So the new mask 0xff is just to conform
the ABI specification.

llvm-svn: 272388
2016-06-10 12:26:09 +00:00
Eric Liu f4a5710a80 [include-fixer] give users an option to show N more headers in case there are too many candidates.
Summary: give users an option to show N more headers in case there are too many candidates.

Reviewers: bkramer

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D21181

llvm-svn: 272387
2016-06-10 12:09:33 +00:00
Clement Courbet 8251ebfac6 [ASTMatchers] New forEachOverriden matcher.
Matches methods overridden by the given method.

llvm-svn: 272386
2016-06-10 11:54:43 +00:00
Matthew Simpson b16907f17a [TTI] Refine default cost for interleaved load groups with gaps
This patch refines the default cost for interleaved load groups having gaps. If
a load group has gaps, the legalized instructions corresponding to the unused
elements will be dead. Thus, we don't need to account for them in the cost
model. Instead, we only need to account for the fraction of legalized loads
that will actually be used.

Differential Revision: http://reviews.llvm.org/D20873

llvm-svn: 272385
2016-06-10 11:27:51 +00:00
Sam Kolton 945231ada5 [AMDGPU] AsmParser: Support for sext() modifier in SDWA. Some code cleaning in AMDGPUOperand.
Summary:
sext() modifier is supported in SDWA instructions only for integer operands. Spec is unclear should integer operands support abs and neg modifiers with sext - for now they are not supported.
Renamed InputModsWithNoDefault to FloatInputMods. Added SextInputMods for operands that support sext() modifier.
Added AMDGPUOperand::Modifier struct to handle register and immediate modifiers.
Code cleaning in AMDGPUOperand class: organize method in groups (render-, predicate-methods...).

Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl

Differential Revision: http://reviews.llvm.org/D20968

llvm-svn: 272384
2016-06-10 09:57:59 +00:00
Simon Pilgrim 34263ad995 [X86][AVX512] Added VPSLLDQ/VPSRLDQ memory fold tests
Memory operand is new for AVX512 (SSE/AVX2 didn't support it).

Also dropped the 'mask' from the tests (VPSLLDQ/VPSRLDQ don't support masked operations).

Regenerated VPALIGNR test now that the shuffle comments work

llvm-svn: 272383
2016-06-10 09:56:20 +00:00
Sean Silva de47d4785a Fix stale name in comment.
llvm-svn: 272382
2016-06-10 08:48:49 +00:00
Miklos Vajna e9c756512b clang-rename: fix the DynamicCastExpr test on ps4
It has RTTI disabled by default, so need to enable it explicitly.

Reviewers: silvas

Differential Revision: http://reviews.llvm.org/D21186

llvm-svn: 272381
2016-06-10 08:29:02 +00:00
Roger Ferrer Ibanez 1efc17e1ec test commit: remove trailing whitespaces in README.txt
llvm-svn: 272380
2016-06-10 08:19:58 +00:00
George Rimar 0a2f19701e [ELF] - Properly check that R_X86_64_PC32 and R_X86_64_32 relocations are disallowed in DSO.
Initially we wanted to check that these two relocations are not present when linking DSO because of 
possible overflow in runtime. Patch moves them to writable segment in testcases to allow
proper error check to trigger.
Otherwise error message about using dynamic relocations against text segment was shown.

Differential revision: http://reviews.llvm.org/D21184

llvm-svn: 272379
2016-06-10 08:15:12 +00:00
Clement Courbet b9e6487e76 test commit: remove trailing whitespace in comments
llvm-svn: 272378
2016-06-10 08:12:37 +00:00
George Rimar 3ed2b08dad [ELF] - Inform user that we do not support dynamic relocations against text segment.
It was reported in PR28020, that lld does not link code which
gold do. But in fact that is expected behavior as we do not
support DT_TEXTREL.

This patch changes error message as it can report about relocations against
text segments exclusively, other dynamic relocations errors can 
be handled separately.

Differential revision: http://reviews.llvm.org/D21133

llvm-svn: 272377
2016-06-10 08:00:01 +00:00
Xinliang David Li eeaf0bcf53 Bug fix remove another illegal char from prof symbol name
End-end test with no integrated assembly should be added 
at some point (not done now because some bots are not properly configured to
support -no-integrated-as)

llvm-svn: 272376
2016-06-10 06:32:26 +00:00
Xinliang David Li 1d58b8d95e [profile] add profile path tests for shared lib
Test that __llvm_profile_set_filename invoked in
main program is 'visible' to shared lib (overriding
shared libary's profile path set on command line)

llvm-svn: 272375
2016-06-10 06:14:17 +00:00
Dan Liew 0617f15897 [LibFuzzer] Fix some unit test crashes on OSX.
This fixes the following unit tests:

FuzzerDictionary.ParseOneDictionaryEntry
FuzzerDictionary.ParseDictionaryFile

The issue appears to be mixing non-ASan-ified code (LibFuzzer) and
ASan-ified code (the unittest) as the tests would pass fine if
everything was built with ASan enabled.

I believe the issue is that different implementations of std::vector<>
are being used in LibFuzzer and outside LibFuzzer (in the unittests).
For Libcxx (I've not seen the issue manifest for libstdc++) we can disable
the ASanified std::vector<> by definining the ``_LIBCPP_HAS_NO_ASAN`` macro.
Doing this fixes the tests on OSX.

Differential Revision: http://reviews.llvm.org/D21049

llvm-svn: 272374
2016-06-10 05:33:07 +00:00
Craig Topper fcb7e6780a Add missing include for r272369
llvm-svn: 272373
2016-06-10 05:19:42 +00:00
Xinliang David Li af053d8b97 [profile] add profile path tests
Testing profile path setter predendence.

llvm-svn: 272372
2016-06-10 05:19:38 +00:00
Craig Topper 200d237e57 [AVX512] Add shuffle comment printing for masked VPERMPD/VPERMQ.
llvm-svn: 272371
2016-06-10 05:12:40 +00:00
Zachary Turner b84faa8baa Make PDBFile take a StreamInterface instead of a MemBuffer.
This is the next step towards being able to write PDBs.
MemoryBuffer is immutable, and StreamInterface is our replacement
which can be any combination of read-only, read-write, or write-only
depending on the particular implementation.

The one place where we were creating a PDBFile (in RawSession) is
updated to subclass ByteStream with a simple adapter that holds
a MemoryBuffer, and initializes the superclass with the buffer's
array, so that all the functionality of ByteStream works
transparently.

llvm-svn: 272370
2016-06-10 05:10:19 +00:00
Zachary Turner 5acb4ac6d7 Add support for writing through StreamInterface.
This adds method and tests for writing to a PDB stream.  With
this, even a PDB stream which is discontiguous can be treated
as a sequential stream of bytes for the purposes of writing.

Reviewed By: ruiu
Differential Revision: http://reviews.llvm.org/D21157

llvm-svn: 272369
2016-06-10 05:09:12 +00:00
Richard Trieu 6a77a1c01f Check for null pointers before calling the Stmt Profiler
Some calls from OMPClauseProfiler were calling the Stmt Profiler with null
pointers, but the profiler can only handle non-null pointers.  Add an assert
to the VisitStmt for valid pointers, and check all calls from OMPClauseProfiler
to be non-null pointers.

llvm-svn: 272368
2016-06-10 04:52:09 +00:00
Craig Topper 89c1761474 [AVX512] Fix shuffle comment printing to handle the masked versions of some shuffles. Previously we were printing the mask operands as the register names.
llvm-svn: 272367
2016-06-10 04:48:05 +00:00