Commit Graph

14 Commits

Author SHA1 Message Date
Alkis Evlogimenos ebbd66c042 Correctly compute live variable information for physical registers
when an implicitely defined register is later used by an alias. For example:

         call foo
         %reg1024 = mov %AL

The call implicitely defines EAX but only AL is used. Before this fix
no information was available on AL. Now EAX and all its aliases except
AL get defined and die at the call instruction whereas AL lives to be
killed by the assignment.

llvm-svn: 10813
2004-01-13 06:24:30 +00:00
Alkis Evlogimenos aaba4639f8 Change interface of MachineOperand as follows:
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.

llvm-svn: 10461
2003-12-14 13:24:17 +00:00
Alkis Evlogimenos 9bced9455a Remove unecessary if statements when looping on ImplicitDefs.
llvm-svn: 10444
2003-12-13 01:20:58 +00:00
Brian Gaeke 960707c335 Put all LLVM code into the llvm namespace, as per bug 109.
llvm-svn: 9903
2003-11-11 22:41:34 +00:00
John Criswell 482202a601 Added LLVM project notice to the top of every C++ source file.
Header files will be on the way.

llvm-svn: 9298
2003-10-20 19:43:21 +00:00
Alkis Evlogimenos 5f1f337d95 Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:

if (const unsigned* AS = TID.ImplicitDefs) {
  for (int i = 0; AS[i]; ++i) {
    // use AS[i]
  }
}

was changed to:

for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
  // use *AS
}

llvm-svn: 8960
2003-10-08 05:20:08 +00:00
Vikram S. Adve 7366fa1aa6 (1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".

llvm-svn: 6341
2003-05-27 00:05:23 +00:00
Chris Lattner 584bae4733 * Keep the BBMap around as long as the pass is live
* Change getVarInfo to take real virtual register numbers and offset them
  itself.  This has caused me so much grief, it's not even funny.

llvm-svn: 6115
2003-05-12 14:24:00 +00:00
Chris Lattner 5ab42e5739 Add a vector to keep track of which registers are allocatable. Remove FIXMEs
llvm-svn: 6015
2003-05-07 20:08:36 +00:00
Chris Lattner 9eb2172176 Re-add gross hack, it's still necessary. :(
llvm-svn: 6012
2003-05-06 21:44:54 +00:00
Chris Lattner 824698b891 Remove hideously nasty hack
llvm-svn: 6011
2003-05-06 21:32:39 +00:00
Chris Lattner f641fd08bc Minor cleanup
llvm-svn: 5976
2003-05-01 21:18:47 +00:00
Chris Lattner b4d58d7f9e Rename MachineInstrInfo -> TargetInstrInfo
llvm-svn: 5272
2003-01-14 22:00:31 +00:00
Chris Lattner cab0b442f2 New files
llvm-svn: 5262
2003-01-13 20:01:16 +00:00