Commit Graph

82400 Commits

Author SHA1 Message Date
Bill Wendling 374e9e825f Add blurb for LLVM D Compiler.
llvm-svn: 156733
2012-05-13 10:00:58 +00:00
Bill Wendling 60639ea6ff Add blurbs for pocl and TCE.
llvm-svn: 156732
2012-05-13 09:59:27 +00:00
Bill Wendling 4fefcdb179 Add OSL blurb.
llvm-svn: 156731
2012-05-13 09:55:24 +00:00
Bill Wendling 3f853ad8f8 Add FAUST blurb.
llvm-svn: 156730
2012-05-13 09:52:48 +00:00
Nadav Rotem e963870f77 Fix the tool documentation
llvm-svn: 156729
2012-05-13 05:52:56 +00:00
Gregory Szorc 43cb4edd84 Document Python bindings in release notes
llvm-svn: 156724
2012-05-12 21:12:22 +00:00
Benjamin Kramer c7eda3ee9c Fix spacing after if.
llvm-svn: 156716
2012-05-12 16:52:21 +00:00
Rafael Espindola 47b7dac220 Add support for the .rept directive. Patch by Vladmir Sorokin. I added support
for nesting.

llvm-svn: 156714
2012-05-12 16:31:10 +00:00
Benjamin Kramer 6bee7f750d ELF: Add support for the asm .version directive.
llvm-svn: 156712
2012-05-12 14:30:47 +00:00
Benjamin Kramer 95d31bcba5 AsmParser: Add support for the .purgem directive.
Based on a patch by Team PaX.

llvm-svn: 156709
2012-05-12 11:21:46 +00:00
Benjamin Kramer 38de62f883 AsmParser: Give a nice error message for .code16gcc, which is currently unsupported.
Patch by Team PaX!

llvm-svn: 156708
2012-05-12 11:19:04 +00:00
Benjamin Kramer 66b8d4d28f AsmParser: ignore the .extern directive.
llvm-svn: 156707
2012-05-12 11:18:59 +00:00
Benjamin Kramer e297b9f506 AsmParser: Add support for .ifc and .ifnc directives.
Based on a patch from PaX Team.

llvm-svn: 156706
2012-05-12 11:18:51 +00:00
Benjamin Kramer 62c18b0881 AsmParser: Add support for .ifb and .ifnb directives.
Based on a patch from PaX Team.

llvm-svn: 156705
2012-05-12 11:18:42 +00:00
Stepan Dyatkovskiy 0beab5e1cd Recommited r156374 with critical fixes in BitcodeReader/Writer:
Ordinary patch for PR1255.
Added new case-ranges orientated methods for adding/removing cases in SwitchInst. After this patch cases will internally representated as ConstantArray-s instead of ConstantInt, externally cases wrapped within the ConstantRangesSet object.
Old methods of SwitchInst are also works well, but marked as deprecated. So on this stage we have no side effects except that I added support for case ranges in BitcodeReader/Writer, of course test for Bitcode is also added. Old "switch" format is also supported.

llvm-svn: 156704
2012-05-12 10:48:17 +00:00
Jay Foad ca0c499609 Teach Function::hasAddressTaken that BlockAddress doesn't really take
the address of a function.

llvm-svn: 156703
2012-05-12 08:30:16 +00:00
Sirish Pande 8bb9745a5e Make sure new value jump is enabled for Hexagon V5 as well.
llvm-svn: 156700
2012-05-12 05:54:15 +00:00
Sirish Pande 4bd20c50eb Support for Hexagon feature, New Value Jump.
llvm-svn: 156698
2012-05-12 05:10:30 +00:00
Akira Hatanaka 763ab85690 Fix test cases.
llvm-svn: 156697
2012-05-12 03:25:16 +00:00
Akira Hatanaka a6c3fd8317 Remove MipsEmitGPRestore.cpp.
llvm-svn: 156696
2012-05-12 03:24:03 +00:00
Akira Hatanaka 3ecc5273c1 Delete all functions that are no longer needed in MipsFunctionInfo, including
the ones that get or set the frame index for the $gp save slot. 

Remove the piece of code in MipsFunctionInfo::getGlobalBaseReg() which returns
GP. This function should always return a virtual register.

llvm-svn: 156695
2012-05-12 03:22:13 +00:00
Akira Hatanaka 2e31e036b6 Stop reserving register $gp. Do not call isGPFI to check whether a frame object
is the $gp save slot.

llvm-svn: 156694
2012-05-12 03:21:18 +00:00
Akira Hatanaka 0fb87feb39 Do not add the pass which restores $gp after every function call.
llvm-svn: 156693
2012-05-12 03:19:51 +00:00
Akira Hatanaka f542ebd958 Make the following changes in MipsISelLowering.cpp:
- Stop creating stack frame objects needed for saving $gp.
- Insert a node that copies the global pointer register to register $gp
  before the call node. This will ensure $gp is valid at the entry of the
  called function.

llvm-svn: 156692
2012-05-12 03:19:04 +00:00
Akira Hatanaka c980f8453a Make the following changes in MipsFrameLowering.cpp:
- Stop emitting instructions needed to initialize the global pointer register.
- Stop emitting .cprestore directive.
- Do not take into account the $gp save slot when computing stack size.

llvm-svn: 156691
2012-05-12 03:18:00 +00:00
Jakob Stoklund Olesen 2d247c806f Speed up computeComposites() by using the new SubReg -> SubIdx map.
TableGen doesn't need to search through the SubRegs map to find an
inverse entry.

llvm-svn: 156690
2012-05-12 02:02:26 +00:00
Akira Hatanaka 8f3573034b Make the following changes in MipsAsmPrinter.cpp:
- Remove code which lowers pseudo SETGP01.
- Fix LowerSETGP01. The first two of the three instructions that are emitted to
  initialize the global pointer register now use register $2.
- Stop emitting .cpload directive.

llvm-svn: 156689
2012-05-12 00:48:43 +00:00
Chad Rosier 10702d5f22 Hoist simpler checks above llvm::PointerMayBeCaptured. No functional change intended.
llvm-svn: 156687
2012-05-12 00:43:40 +00:00
Jakob Stoklund Olesen 165473247f Don't look for empty live ranges in the unions.
Empty live ranges represent undef and still get allocated, but they
won't appear in LiveIntervalUnions.

Patch by Patrik Hägglund!

llvm-svn: 156685
2012-05-12 00:33:28 +00:00
Akira Hatanaka d918f77ba3 Insert instructions to the entry basic block which initializes the global
pointer register. 


This is the first of the series of patches which clean up the way global pointer
register is used. The patches will make the following improvements:

- Make $gp an allocatable temporary register rather than reserving it.
- Use a virtual register as the global pointer register and let the register
  allocator decide which register to assign to it or whether spill/reloads are
  needed.
- Make sure $gp is valid at the entry of a called function, which is necessary
  for functions using lazy binding.
- Remove the need for emitting .cprestore and .cpload directives.

llvm-svn: 156671
2012-05-12 00:17:17 +00:00
Michael J. Spencer a39c9bceeb Add doxygen comments.
llvm-svn: 156665
2012-05-11 23:34:39 +00:00
Akira Hatanaka 0661b81bca Do not replace operands of pseudo instructions with register $zero.
llvm-svn: 156663
2012-05-11 23:22:18 +00:00
Chad Rosier a33015d4e0 Revert 156658.
llvm-svn: 156662
2012-05-11 23:21:01 +00:00
Chad Rosier e40f5d3ee0 [fast-isel] Fast-isel doesn't use the expect intrinsic.
llvm-svn: 156658
2012-05-11 23:10:58 +00:00
Akira Hatanaka 5d60c36f37 Use regular expression to match register names.
llvm-svn: 156656
2012-05-11 23:00:40 +00:00
Bill Wendling 7d878db4e1 Make the URL a link instead.
llvm-svn: 156655
2012-05-11 22:38:33 +00:00
Michael J. Spencer 93303819ac [Support/StringRef] Add find_last_not_of and {r,l,}trim.
llvm-svn: 156652
2012-05-11 22:08:50 +00:00
Bill Wendling 393f432ddf Remove extraneous ; and the resulting warning.
llvm-svn: 156649
2012-05-11 21:56:04 +00:00
Bill Wendling 9cc768581a Add mention of Glasgow Haskell Compiler.
llvm-svn: 156648
2012-05-11 21:42:37 +00:00
Chad Rosier aa9cb9df59 [fast-isel] Add support for selecting @llvm.trap().
llvm-svn: 156646
2012-05-11 21:33:49 +00:00
Brendon Cahoon 5edcf8822d Updated instruction table due to addded intrinsics.
llvm-svn: 156644
2012-05-11 21:10:16 +00:00
Sirish Pande 95d0117bb3 Remove warnings from HexagonVLIWPacketizer.
llvm-svn: 156636
2012-05-11 20:00:34 +00:00
Duncan Sands 1367e49f6b Some release notes for dragonegg.
llvm-svn: 156635
2012-05-11 19:59:43 +00:00
Brendon Cahoon 31f8723ef3 Hexagon constant extender support.
Patch by Jyotsna Verma.

llvm-svn: 156634
2012-05-11 19:56:59 +00:00
Chad Rosier 06e34d9220 Typo.
llvm-svn: 156633
2012-05-11 19:43:29 +00:00
Chad Rosier 3268692aa8 [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Minor cleanup.
llvm-svn: 156632
2012-05-11 19:40:25 +00:00
Sirish Pande 83ccb6ce08 Hexagon V5 intrinsics support.
llvm-svn: 156631
2012-05-11 19:39:13 +00:00
Jakob Stoklund Olesen 3f3eb18010 Defer computation of SuperRegs.
Don't compute the SuperRegs list until the sub-register graph is
completely finished. This guarantees that the list of super-registers is
properly topologically ordered, and has no duplicates.

llvm-svn: 156629
2012-05-11 19:01:01 +00:00
Chad Rosier 90f9afe659 [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
retval.  Hoists check before emitting the call to avoid unnecessary work.
rdar://11430407
PR12796

llvm-svn: 156628
2012-05-11 18:51:55 +00:00
Nuno Lopes e2cfd3ce95 objectsize: add a few more tests and fix a bug
llvm-svn: 156625
2012-05-11 18:25:29 +00:00
Chad Rosier 519b12f927 [fast-isel] Rather then assert (or segfault in a non-asserts build), fall back
to selection DAG isel if we're unable to handle a non-double multi-reg retval.
rdar://11430407
PR12796

llvm-svn: 156622
2012-05-11 17:41:06 +00:00
Chad Rosier 466d3d8faa The return type is an unsigned, not a bool.
llvm-svn: 156621
2012-05-11 16:41:38 +00:00
Manman Ren 0d5ec28ccc Add space before an open parenthesis in control flow statements.
llvm-svn: 156620
2012-05-11 15:36:46 +00:00
Preston Gurd 09de6ae399 Added X86 Atom latencies to X86InstrMMX.td.
llvm-svn: 156615
2012-05-11 14:27:12 +00:00
Stepan Dyatkovskiy 05b46b3745 PR1255: ConstantRangesSet and CRSBuilder classes moved from include/llvm to include/llvm/Support.
llvm-svn: 156613
2012-05-11 10:34:23 +00:00
Hans Wennborg addad7388d Fix test/CodeGen/X86/tls-pie.ll.
llvm-svn: 156612
2012-05-11 10:19:54 +00:00
Hans Wennborg f9d0e44b82 Implement initial-exec TLS model for 32-bit PIC x86
This fixes a TODO from 2007 :) Previously, LLVM would emit the wrong
code here (see the update to test/CodeGen/X86/tls-pie.ll).

llvm-svn: 156611
2012-05-11 10:11:01 +00:00
Silviu Baranga ddc67a7655 Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.
llvm-svn: 156609
2012-05-11 09:28:27 +00:00
Silviu Baranga 5a719f9b9a Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate.
llvm-svn: 156608
2012-05-11 09:10:54 +00:00
Rafael Espindola 5f4b32f9d7 Fix a use after free when the streamer is destroyed. Fixes pr12622.
llvm-svn: 156606
2012-05-11 03:42:13 +00:00
Akira Hatanaka e37614438f Fix a misleading comment.
llvm-svn: 156603
2012-05-11 01:45:15 +00:00
Jim Grosbach dc1e36e9f5 Tidy up. Trailing whitespace.
llvm-svn: 156602
2012-05-11 01:41:30 +00:00
Jim Grosbach 3658412afc Tidy up. Trailing whitespace.
llvm-svn: 156601
2012-05-11 01:39:13 +00:00
Eli Friedman e0a64d83fc Fix a minor logic mistake transforming compares in instcombine. PR12514.
llvm-svn: 156600
2012-05-11 01:32:59 +00:00
Manman Ren dc8ad0058f ARM: peephole optimization to remove cmp instruction
This patch will optimize the following cases:
  sub r1, r3 | sub r1, imm
  cmp r3, r1 or cmp r1, r3 | cmp r1, imm
  bge L1

TO
  subs r1, r3
  bge  L1 or ble L1

If the branch instruction can use flag from "sub", then we can replace
"sub" with "subs" and eliminate the "cmp" instruction.

rdar: 10734411
llvm-svn: 156599
2012-05-11 01:30:47 +00:00
Dan Gohman dfab443ae8 Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),
but it generates int3 on x86 instead of ud2.

llvm-svn: 156593
2012-05-11 00:19:32 +00:00
Eric Christopher b6148ed72c Allow unique_file to take a mode for file permissions, but default
to user only read/write.

Part of rdar://11325849

llvm-svn: 156591
2012-05-11 00:07:44 +00:00
Chad Rosier 8244b1dc7e Fix intendation.
llvm-svn: 156589
2012-05-10 23:38:07 +00:00
Jakob Stoklund Olesen c08df9e5fd Compute secondary sub-registers.
The sub-registers explicitly listed in SubRegs in the .td files form a
tree. In a complicated register bank, it is possible to have
sub-register relationships across sub-trees. For example, the ARM NEON
double vector Q0_Q1 is a tree:

  Q0_Q1 = [Q0, Q1],  Q0 = [D0, D1], Q1 = [D2, D3]

But we also define the DPair register D1_D2 = [D1, D2] which is fully
contained in Q0_Q1.

This patch teaches TableGen to find such sub-register relationships, and
assign sub-register indices to them. In the example, TableGen will
create a dsub_1_dsub_2 sub-register index, and add D1_D2 as a
sub-register of Q0_Q1.

This will eventually enable the coalescer to handle copies of skewed
sub-registers.

llvm-svn: 156587
2012-05-10 23:27:10 +00:00
Nuno Lopes f573030391 objectsize: add support for GEPs with non-constant indexes
add an additional parameter to InstCombiner::EmitGEPOffset() to force it to *not* emit operations with NUW flag

llvm-svn: 156585
2012-05-10 23:17:35 +00:00
Preston Gurd 4fe10a5d9a Added X86 Atom latencies for instructions in X86InstrInfo.td.
llvm-svn: 156579
2012-05-10 21:58:35 +00:00
Eric Christopher ed51b9ec0b Add support for the 'X' inline asm operand modifier.
Patch by Jack Carter.

llvm-svn: 156577
2012-05-10 21:48:22 +00:00
Andrew Trick c5d7008f27 misched: Print machineinstrs with -debug-only=misched
llvm-svn: 156576
2012-05-10 21:06:21 +00:00
Andrew Trick 419eae2db7 misched: tracing register pressure heuristics.
llvm-svn: 156575
2012-05-10 21:06:19 +00:00
Andrew Trick 7ee9de51f2 misched: Add register pressure backoff to ConvergingScheduler.
Prioritize the instruction that comes closest to keeping pressure
under the target's limit. Then prioritize instructions that avoid
increasing the max pressure in the scheduled region. The max pressure
heuristic is a tad aggressive. Later I'll fix it to consider the
unscheduled pressure as well.

WIP: This is mostly functional but untested and not likely to do much good yet.
llvm-svn: 156574
2012-05-10 21:06:16 +00:00
Andrew Trick 795c1120a6 misched: Release only unscheduled nodes into ReadyQ.
llvm-svn: 156573
2012-05-10 21:06:14 +00:00
Andrew Trick 95dafd8b31 misched: Added ReadyQ container wrapper for Top and Bottom Queues.
llvm-svn: 156572
2012-05-10 21:06:12 +00:00
Andrew Trick 4add42f439 misched: Introducing Top and Bottom register pressure trackers during scheduling.
llvm-svn: 156571
2012-05-10 21:06:10 +00:00
Sirish Pande fc8118bf41 Hexagon V5 Support - V5 td file.
llvm-svn: 156569
2012-05-10 20:24:28 +00:00
Sirish Pande 69295b8963 Hexagon V5 FP Support.
llvm-svn: 156568
2012-05-10 20:20:25 +00:00
Andrew Trick 75812f815c RegPressure: API for speculatively checking instruction pressure.
Added getMaxExcessUpward/DownwardPressure. They somewhat abuse the
tracker by speculatively handling an instruction out of order. But it
is convenient for now. In the future, we will cache each instruction's
pressure contribution to make this efficient.

llvm-svn: 156561
2012-05-10 19:11:52 +00:00
Andrew Trick 1df762abf4 RegPressure: fix array index iteration style.
llvm-svn: 156560
2012-05-10 19:11:49 +00:00
Dan Gohman ed7c24e2d9 Teach DeadStoreElimination to eliminate exit-block stores with phi addresses.
llvm-svn: 156558
2012-05-10 18:57:38 +00:00
Manman Ren b555b382bd Revert: 156550 "ARM: peephole optimization to remove cmp instruction"
This commit broke an external linux bot and gave a compile-time warning.

llvm-svn: 156556
2012-05-10 18:49:43 +00:00
Jakob Stoklund Olesen c1e9087fbb Precompute lists of explicit sub-registers and indices.
The .td files specify a tree of sub-registers. Store that tree as
ExplicitSubRegs lists in CodeGenRegister instead of extracting it from
the Record when needed.

llvm-svn: 156555
2012-05-10 17:46:18 +00:00
Dan Gohman 0291246ce7 Rewrite ScalarEvolution::hasOperand to use an explicit worklist instead
of recursion, to avoid excessive stack usage on deep expressions.

llvm-svn: 156554
2012-05-10 17:21:30 +00:00
Nuno Lopes 300d629924 teach DSE and isInstructionTriviallyDead() about calloc
llvm-svn: 156553
2012-05-10 17:14:00 +00:00
Joel Jones 7f04344b8b formatting change: strip debug info from test
llvm-svn: 156551
2012-05-10 16:55:31 +00:00
Manman Ren c860887b2d ARM: peephole optimization to remove cmp instruction
This patch will optimize the following cases:
  sub r1, r3 | sub r1, imm
  cmp r3, r1 or cmp r1, r3 | cmp r1, imm
  bge L1

TO
  subs r1, r3
  bge  L1 or ble L1

If the branch instruction can use flag from "sub", then we can replace
"sub" with "subs" and eliminate the "cmp" instruction.

rdar: 10734411
llvm-svn: 156550
2012-05-10 16:48:21 +00:00
Joel Jones 3d90a9ae65 Fix a problem with incomplete equality testing of PHINodes in
Instruction::IsIdenticalToWhenDefined.

This manifested itself when inlining two calls to the same function.  The 
inlined function had a switch statement that returned one of a set of 
global variables.  Without this modification, the two phi instructions that 
chose values from the branches of the switch instruction inlined from the 
callee were considered equivalent and jump-threading replaced a load for the 
first switch value with a phi selecting from the second switch, thereby 
producing incorrect code.

This patch has been tested with "make check-all", "lnt runteste nt", and 
llvm self-hosted, and on the original program that had this problem, 
wireshark.

<rdar://problem/11025519>

llvm-svn: 156548
2012-05-10 15:59:41 +00:00
Nadav Rotem 1a65397017 Fix merge-typo and cleanup
llvm-svn: 156541
2012-05-10 12:50:02 +00:00
Nadav Rotem 15946e50c1 AVX2: Add an additional broadcast idiom.
llvm-svn: 156540
2012-05-10 12:39:13 +00:00
Nadav Rotem b86a3fb8d0 Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in the program.
Starting r155461 we are able to select patterns for vbroadcast even when the load op is used by other users.

Fix PR11900.

llvm-svn: 156539
2012-05-10 12:22:05 +00:00
Andrew Trick 5d13399851 Fix TableGen's RegPressureSet weight normalization to handle subreg DAGS.
I initially assumed that the subreg graph was a tree. That may not be true.

llvm-svn: 156524
2012-05-10 00:32:15 +00:00
Jim Grosbach 1ace8b6a76 ExecutionEngine: Check for NULL ErrorStr before using it.
Patch by Yury Mikhaylov <yury.mikhaylov@gmail.com>.

llvm-svn: 156523
2012-05-10 00:31:50 +00:00
Jakob Stoklund Olesen 982205bcae Fix warning text.
llvm-svn: 156521
2012-05-09 23:43:30 +00:00
Dan Gohman f8b19d09ba Fix the objc_storeStrong recognizer to stop before walking off the
end of a basic block if there's no store.

llvm-svn: 156520
2012-05-09 23:08:33 +00:00
Jakob Stoklund Olesen 9b41e5dbc6 Compute a backwards SubReg -> SubRegIndex map for each register.
This mapping is for internal use by TableGen. It will not be exposed in
the generated files.

Unfortunately, the mapping is not completely well-defined. The X86 xmm
registers appear with multiple sub-register indices in the ymm
registers. This is because of the odd idempotent sub_sd and sub_ss
sub-register indices. I hope to be able to eliminate them entirely, so
we can require the sub-registers to form a tree.

For now, just place the canonical sub_xmm index in the mapping, and
ignore the idempotents.

llvm-svn: 156519
2012-05-09 22:15:00 +00:00
Jakob Stoklund Olesen 7d1fa380c5 Rename getSubRegs() to computeSubRegs().
That's what it does.

llvm-svn: 156518
2012-05-09 22:09:17 +00:00
Nuno Lopes 7100f463b0 objectsize:
refactor code a bit to enable future changes to support run-time information
add support to compute allocation sizes at run-time if penalty > 1 (e.g., malloc(x), calloc(x, y), and VLAs)

llvm-svn: 156515
2012-05-09 21:30:57 +00:00
Chad Rosier 1cdb85e048 Add unittests for Triple::getMacOSXVersion and Triple::getiOSVersion.
llvm-svn: 156507
2012-05-09 19:31:41 +00:00
Danil Malyshev 47aba39004 Added a regress test for the bug #9964 before close it.
This bug was fixed by Jim Grosbach in #138879, thanks Jim!

llvm-svn: 156505
2012-05-09 19:07:04 +00:00
Roman Divacky e07cc042f6 Mark .opd @progbits, thus avoiding a warning from asm.
llvm-svn: 156494
2012-05-09 18:24:23 +00:00
Chad Rosier 9d7b1cee39 Set the default iOS version to 3.0.
llvm-svn: 156492
2012-05-09 18:23:00 +00:00
Bob Wilson 8d4e2fab63 Use the cpuid 64 bit flag to pick the default CPU name for an unknown model.
For the Family 6 switch in sys::getHostCPUName, an unrecognized model was
reported as "i686".  That's a really bad default since it means that new
CPUs will be treated as if they can only use 32-bit code.  This just looks
at the cpuid extended feature flag for 64 bit support, and if that is set,
it uses a default x86-64 cpu.  Similar logic is already used for the Family
15 code.  <rdar://problem/11314502>

llvm-svn: 156486
2012-05-09 17:47:03 +00:00
Chad Rosier 2778cbc880 Don't return true on a function with a void return type.
llvm-svn: 156484
2012-05-09 17:38:47 +00:00
Chad Rosier d84eaac673 Add Triple::getiOSVersion.
This new function provides a way to get the iOS version number from ios triples.
Part of rdar://11409204

llvm-svn: 156483
2012-05-09 17:23:48 +00:00
Hans Wennborg b7ef2fe8ae Introduce llvm-c function LLVMPrintModuleToFile.
This lets you save the textual representation of the LLVM IR to a file.
Before this patch it could only be printed to STDERR from llvm-c.

Patch by Carlo Kok!

llvm-svn: 156479
2012-05-09 16:54:17 +00:00
Nuno Lopes 01547b3ad2 change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept.
This commit only adds the parameter. Code taking advantage of it will follow.

llvm-svn: 156473
2012-05-09 15:52:43 +00:00
Manuel Klimek 13cfa00018 Make it possible to switch off solution folders. VS Express does not support
them, and requires the user to click away one error message per folder on
project load.

llvm-svn: 156472
2012-05-09 15:10:54 +00:00
Filipe Cabecinhas 5c43305383 Fixed a typo
llvm-svn: 156471
2012-05-09 14:43:50 +00:00
Bill Wendling a3aeb980d2 Supply a C interface to the "LinkModules" method.
Patch by Andrew Wilkins!

llvm-svn: 156469
2012-05-09 08:55:40 +00:00
Craig Topper 28540adfcf Remove unused variable to get rid of warning.
llvm-svn: 156466
2012-05-09 07:08:58 +00:00
Akira Hatanaka ca41d13bbd Add another peephole pattern for conditional moves.
llvm-svn: 156460
2012-05-09 02:29:29 +00:00
Jakob Stoklund Olesen 7e21d617ef Use ptr_rc_tailcall instead of GR32_TC.
The getPointerRegClass() hook will return GR32_TC, or whatever is
appropriate for the current function.

Patch by Yiannis Tsiouris!

llvm-svn: 156459
2012-05-09 01:50:09 +00:00
Akira Hatanaka 05b9dad1e6 Make register FP allocatable if the compiled function does not have dynamic
allocas.

llvm-svn: 156458
2012-05-09 01:38:13 +00:00
Akira Hatanaka 0a8ab718cb Expand 64-bit shifts if target ABI is O32.
llvm-svn: 156457
2012-05-09 00:55:21 +00:00
Richard Trieu edf46e6b6e Remove unused variable to silence compiler warning.
llvm-svn: 156456
2012-05-09 00:30:21 +00:00
Bob Wilson 7789aae96d Do not install llvm-config-host for cross-builds of clang. rdar://11317847
My previous change to install llvm-config-host for cross-builds resulted
in that file being installed even when the normal llvm-config was not
installed, e.g., when building the install-clang target.  Daniel suggested
this alternative, which solves the immediate problem and also avoids the gunk
in the top-level makefile.

llvm-svn: 156448
2012-05-09 00:07:02 +00:00
Dan Gohman 41375a3545 Miscellaneous accumulated cleanups.
llvm-svn: 156445
2012-05-08 23:39:44 +00:00
Kevin Enderby fe3d005ca5 Fix it so llvm-objdump -arch does accept x86 and x86-64 as valid arch names.
PR12731.  Patch by Meador Inge!

llvm-svn: 156444
2012-05-08 23:38:45 +00:00
Seth Cantrell 40306e7e30 add to 3.1 release notes
llvm-svn: 156443
2012-05-08 23:34:38 +00:00
Dan Gohman 61708d37d6 Fix objc_storeStrong pattern matching to catch a potential use of the
old value after the store but before it is released.
This fixes rdar:/11116986.

llvm-svn: 156442
2012-05-08 23:34:08 +00:00
Jakob Stoklund Olesen 10191fd44f Use a shared function for a common operation.
llvm-svn: 156441
2012-05-08 23:27:30 +00:00
Eric Christopher 8d2a77de63 Fix thinko in conditional.
Part of rdar://11352000 and should bring the buildbots back.

llvm-svn: 156421
2012-05-08 21:24:39 +00:00
Jim Grosbach 92f6adc8be DAGCombiner should not change the type of an extract_vector index.
When a combine twiddles an extract_vector, care should be take to preserve
the type of the index operand. No luck extracting a reasonable testcase,
unfortunately.

rdar://11391009

llvm-svn: 156419
2012-05-08 20:56:07 +00:00
Eric Christopher d666bb0dd8 Remove excess semi-colons to quiet warnings.
llvm-svn: 156416
2012-05-08 20:45:04 +00:00
Daniel Dunbar 5f1c956eb0 [Support] Fix sys::GetRandomNumber() to always use a high quality seed.
llvm-svn: 156414
2012-05-08 20:38:00 +00:00
Sirish Pande 1c9f7dbc10 Update load/store instruction patterns in Hexagon V4.
llvm-svn: 156411
2012-05-08 19:50:20 +00:00
Akira Hatanaka fd82286e62 Formatting fixes.
Patch by Jack Carter.

llvm-svn: 156409
2012-05-08 19:14:42 +00:00
Akira Hatanaka c515bfb9e7 Define mips16 instruction formats.
Patch by Reed Kotler.

llvm-svn: 156408
2012-05-08 19:08:58 +00:00
Eric Christopher 4d25052a9a Handle OpDeref in case it comes in as a register operand.
Part of rdar://11352000

llvm-svn: 156405
2012-05-08 18:56:00 +00:00
Eric Christopher 137e966b65 Update comment.
llvm-svn: 156404
2012-05-08 18:55:57 +00:00
Daniel Dunbar d18888242e Revert r156393, "[tests] Remove some remaining DejaGNU related cruft.", this
patch wasn't ready yet.

llvm-svn: 156395
2012-05-08 18:26:07 +00:00
Daniel Dunbar 898f02a613 [tests] Remove some remaining DejaGNU related cruft.
llvm-svn: 156393
2012-05-08 18:11:49 +00:00
Rafael Espindola ac57583236 Adding -fcolor-diagnostics is causing problem to users that parse the build
output. Peter Collingbourne also reports that it is showing up in
$(llvm-config --cflags).

Revert this for now since I don't know enough cmake to fix it properly.

This reverts commit 18efed7adc79c1970f307bb5b015d199012ba872.

llvm-svn: 156392
2012-05-08 18:11:06 +00:00
Daniel Dunbar 149c04a5cf Regenerate configure.
llvm-svn: 156390
2012-05-08 17:48:32 +00:00
Daniel Dunbar 3d92154e60 [docs] Remove POD based man page docs (and build system support).
- Currently this leaves us with less build system support (e.g., installing man pages) for the docs than is desired. I'm working on fixing this, but it may take a while. If someone finds this particularly egregious let me know and I will prioritize it.

llvm-svn: 156389
2012-05-08 17:48:21 +00:00
Nuno Lopes 24ac479a7d remove autoupgrade code for old function attributes format.
I still left another fixme regarding alignment, because I'm unsure how to remove that code without breaking things

llvm-svn: 156387
2012-05-08 17:07:35 +00:00
Daniel Dunbar 9e5585dd82 [docs] Add support for building man pages using Sphinx.
llvm-svn: 156386
2012-05-08 16:50:47 +00:00
Daniel Dunbar 2e395e17c3 [docs] Integrate the command guide into the toctree.
llvm-svn: 156385
2012-05-08 16:50:43 +00:00
Daniel Dunbar 8f4a8a636c [docs] Add ReST version of all the man pages.
- The POD versions are slated for execution, but are still around until
   llvm.org machinery is in place.

llvm-svn: 156384
2012-05-08 16:50:35 +00:00
Nuno Lopes f7596c91af remove TYPE_CODE_FUNCTION_OLD type code. it is no longer in use and it was marked for removal in 3.0
llvm-svn: 156383
2012-05-08 16:16:20 +00:00
Jakob Stoklund Olesen 276ae14023 s/CSR_Ghc/CSR_NoRegs/
Share the CalleeSavedRegs defs between all calling conventions having no
callee-saved registers.

Patch by Yiannis Tsiouris!

llvm-svn: 156382
2012-05-08 15:07:29 +00:00
NAKAMURA Takumi a087dae052 Lit: rewind WinWaitReleased() stuff in TestRunner.
r145222 "lit/TestRunner.py: [Win32] Introduce WinWaitReleased(f), to wait for file handles to be released by children."
r145223 "lit/TestRunner.py: Use RemoveForce()."
r145381 "lit/TestRunner.py: Try to catch ERROR_FILE_NOT_FOUND, too."
r152916 "lit/TestRunner.py: [Win32] Check all opened_files[] released, rather than (obsoleted) written_files[]."
r153172 "lit/TestRunner.py: [Win32] Rework WinWaitReleased() again! "win32file" from Python Win32 Extensions."

llvm-svn: 156381
2012-05-08 14:31:52 +00:00
NAKAMURA Takumi 3b7f995b75 Windows/PathV2.inc: Retry rename() for (maximum) 2 seconds.
Files might be opend by system scanners (eg. file indexer, virus scanner, &c).

llvm-svn: 156380
2012-05-08 14:31:46 +00:00
Duncan Sands 3bbb1d50df Calling ReassociateExpression recursively is extremely dangerous since it will
replace the operands of expressions with only one use with undef and generate
a new expression for the original without using RAUW to update the original.
Thus any copies of the original expression held in a vector may end up
referring to some bogus value - and using a ValueHandle won't help since there
is no RAUW.  There is already a mechanism for getting the effect of recursion
non-recursively: adding the value to be recursed on to RedoInsts.  But it wasn't
being used systematically.  Have various places where recursion had snuck in at
some point use the RedoInsts mechanism instead.  Fixes PR12169.

llvm-svn: 156379
2012-05-08 12:16:05 +00:00
Stepan Dyatkovskiy 5eafce5c88 Rejected r156374: Ordinary PR1255 patch. Due to clang-x86_64-debian-fnt buildbot failure.
llvm-svn: 156377
2012-05-08 08:33:21 +00:00
Craig Topper 7daf897678 Remove 256-bit AVX non-temporal store intrinsics. Similar was previously done for 128-bit.
llvm-svn: 156375
2012-05-08 06:58:15 +00:00
Stepan Dyatkovskiy b6a4640163 Ordinary patch for PR1255.
Added new case-ranges orientated methods for adding/removing cases in SwitchInst. After this patch cases will internally representated as ConstantArray-s instead of ConstantInt, externally cases wrapped within the ConstantRangesSet object.
Old methods of SwitchInst are also works well, but marked as deprecated. So on this stage we have no side effects except that I added support for case ranges in BitcodeReader/Writer, of course test for Bitcode is also added. Old "switch" format is also supported.

llvm-svn: 156374
2012-05-08 06:36:08 +00:00