4 Commits

Author	SHA1	Message	Date
Jakob Stoklund Olesen	369bddf5ad	Fix a batch of x86 tests to be coalescer independent. ... Most of these tests require a single mov instruction that can come either before or after a 2-addr instruction. -join-physregs changes the behavior, but the results are equivalent. llvm-svn: 130891	2011-05-04 23:54:51 +00:00
Dan Gohman	e99a3c191e	Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it ... has an immediate with at least 32 bits of leading zeros, to avoid needing to materialize that immediate in a register first. FileCheckize, tidy, and extend a testcase to cover this case. This fixes rdar://7527390. llvm-svn: 93160	2010-01-11 17:58:34 +00:00
Dan Gohman	40503396da	Eliminate more uses of llvm-as and llvm-dis. ... llvm-svn: 81290	2009-09-08 23:54:48 +00:00
Chris Lattner	3c7d3d5700	Compile x86-64-and-mask.ll into: ... _test: movl %edi, %eax ret instead of: _test: movl $4294967295, %ecx movq %rdi, %rax andq %rcx, %rax ret It would be great to write this as a Pat pattern that used subregs instead of a 'pseudo' instruction, but I don't know how to do that in td files. llvm-svn: 47658	2008-02-27 05:47:54 +00:00