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100 Commits

Author SHA1 Message Date
Evan Cheng 2bb4035707 Move TargetRegistry and TargetSelect from Target to Support where they belong. 
These are strictly utilities for registering targets and components.

llvm-svn: 138450
 2011-08-24 18:08:43 +00:00
Evan Cheng bc153d49b7 Next round of MC refactoring. This patch factor MC table instantiations, MC 
registeration and creation code into XXXMCDesc libraries.

llvm-svn: 135184
 2011-07-14 20:59:42 +00:00
Evan Cheng c5e6d2f519 - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo 
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.

llvm-svn: 134884
 2011-07-11 03:57:24 +00:00
Evan Cheng 703a0fbf39 Hide the call to InitMCInstrInfo into tblgen generated ctor. 
llvm-svn: 134244
 2011-07-01 17:57:27 +00:00
Evan Cheng 194c3dc01f Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. 
llvm-svn: 134030
 2011-06-28 21:14:33 +00:00
Evan Cheng 1e210d08d8 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc 
llvm-svn: 134024
 2011-06-28 20:07:07 +00:00
Evan Cheng 6cc775f905 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
 2011-06-28 19:10:37 +00:00
Anton Korobeynikov d08fbd19f5 Move callee-saved regs spills / reloads to TFI 
llvm-svn: 120228
 2010-11-27 23:05:03 +00:00
Anton Korobeynikov 0eecf5d201 Move hasFP() and few related hooks to TargetFrameInfo. 
llvm-svn: 119740
 2010-11-18 21:19:35 +00:00
Jakob Stoklund Olesen 8289f78569 Remove the isMoveInstr() hook. 
llvm-svn: 108567
 2010-07-16 22:35:46 +00:00
Jakob Stoklund Olesen 7c1392a765 Remove redundant branch. Thanks, Anton! 
llvm-svn: 108097
 2010-07-11 17:17:35 +00:00
Jakob Stoklund Olesen 74e5bf85f7 Replace copyRegToReg with copyPhysReg for SystemZ. 
llvm-svn: 108092
 2010-07-11 16:40:46 +00:00
Stuart Hastings 0125b6410a Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This 
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.

llvm-svn: 106243
 2010-06-17 22:43:56 +00:00
Rafael Espindola f2dffcef82 Remove the TargetRegisterClass member from CalleeSavedInfo 
llvm-svn: 105344
 2010-06-02 20:02:30 +00:00
Evan Cheng 168ced94d8 Implement @llvm.returnaddress. rdar://8015977. 
llvm-svn: 104421
 2010-05-22 01:47:14 +00:00
Dan Gohman 779c69bbc5 Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it 
doesn't have to guess.

llvm-svn: 103194
 2010-05-06 20:33:48 +00:00
Evan Cheng efb126a665 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. 
llvm-svn: 103193
 2010-05-06 19:06:44 +00:00
Chris Lattner 6f306d7d30 use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() 
llvm-svn: 100214
 2010-04-02 20:16:16 +00:00
Dale Johannesen 4244d12769 Teach AnalyzeBranch, RemoveBranch and the branch 
folder to be tolerant of debug info following the
branch(es) at the end of a block.

llvm-svn: 100168
 2010-04-02 01:38:09 +00:00
Dan Gohman 047a767d74 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
 2009-12-05 00:44:40 +00:00
Chris Lattner a48f44d9ee improve portability to avoid conflicting with std::next in c++'0x. 
Patch by Howard Hinnant!

llvm-svn: 90365
 2009-12-03 00:50:42 +00:00
Chris Lattner d82510e109 add some missing #includes 
llvm-svn: 86367
 2009-11-07 09:20:54 +00:00
Dan Gohman be8137b0b4 Replace TargetInstrInfo::isInvariantLoad and its target-specific 
implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.

llvm-svn: 83475
 2009-10-07 17:38:06 +00:00
Anton Korobeynikov 30b1c2f636 Turn few asserts into errors / unreachable's 
llvm-svn: 76313
 2009-07-18 13:33:17 +00:00
Duncan Sands 35e95639c0 Avoid a compiler warning when assertions are turned off. 
llvm-svn: 76176
 2009-07-17 12:25:14 +00:00
Anton Korobeynikov ff21565821 Provide crazy pseudos for regpairs spills / reloads 
llvm-svn: 76060
 2009-07-16 14:34:15 +00:00
Anton Korobeynikov 7fa0ce1a21 Handle long-disp stuff more consistently 
llvm-svn: 76059
 2009-07-16 14:33:52 +00:00
Anton Korobeynikov 5b03970c7b Another predicate routine 
llvm-svn: 76057
 2009-07-16 14:33:01 +00:00
Anton Korobeynikov 5761e33ce4 More helpers 
llvm-svn: 76056
 2009-07-16 14:32:41 +00:00
Anton Korobeynikov b22afc7bcc Add bunch of branch folding stuff 
llvm-svn: 76055
 2009-07-16 14:32:19 +00:00
Anton Korobeynikov 0f8c47a7bb Add missed opcodes to short => long displacement conversion 
llvm-svn: 76054
 2009-07-16 14:31:52 +00:00
Anton Korobeynikov 201d49d56a Cleanup 
llvm-svn: 76053
 2009-07-16 14:31:32 +00:00
Anton Korobeynikov fef4a3b762 Add missed condbranch opcodes 
llvm-svn: 76043
 2009-07-16 14:27:26 +00:00
Anton Korobeynikov b106b60456 Handle FP callee-saved regs 
llvm-svn: 76029
 2009-07-16 14:23:01 +00:00
Anton Korobeynikov 345e08d24c Implement FP regs spills / restores 
llvm-svn: 76024
 2009-07-16 14:21:41 +00:00
Anton Korobeynikov 8195797de2 Add bunch of FP instructions 
llvm-svn: 76019
 2009-07-16 14:20:24 +00:00
Anton Korobeynikov b950f1961b Another attempt to fix prologue emission 
llvm-svn: 76007
 2009-07-16 14:16:26 +00:00
Anton Korobeynikov 6759661c3f Add proper register aliases 
llvm-svn: 75999
 2009-07-16 14:12:54 +00:00
Anton Korobeynikov 1eb6262b4b Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. 
llvm-svn: 75990
 2009-07-16 14:10:17 +00:00
Anton Korobeynikov 3db6283188 Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes. 
llvm-svn: 75989
 2009-07-16 14:09:56 +00:00
Anton Korobeynikov 5af8f0ebf1 Provide hooks for spilling / restoring stuff 
llvm-svn: 75969
 2009-07-16 14:01:27 +00:00
Anton Korobeynikov ace2a02a84 Implement InsertBranch() hook 
llvm-svn: 75966
 2009-07-16 14:00:10 +00:00
Anton Korobeynikov f0d7d6ce65 Provide "wide" muls and divs/rems 
llvm-svn: 75958
 2009-07-16 13:56:42 +00:00
Anton Korobeynikov 0f59e1e874 SELECT_CC lowering 
llvm-svn: 75948
 2009-07-16 13:52:51 +00:00
Anton Korobeynikov 8695a30066 Emit callee-saved regs spills / restores 
llvm-svn: 75943
 2009-07-16 13:51:12 +00:00
Anton Korobeynikov d694b9ff8b Some preliminary call lowering 
llvm-svn: 75941
 2009-07-16 13:50:21 +00:00
Anton Korobeynikov 04be818918 Add shifts and reg-imm address matching 
llvm-svn: 75927
 2009-07-16 13:43:18 +00:00
Anton Korobeynikov cf7ea6a94f Add bunch of 32-bit patterns... Uffff :) 
llvm-svn: 75926
 2009-07-16 13:42:31 +00:00
Anton Korobeynikov 09082fa01a Add simple reg-reg and reg-imm moves 
llvm-svn: 75912
 2009-07-16 13:29:38 +00:00
Anton Korobeynikov c334c28b3b Let's start another backend :) 
llvm-svn: 75909
 2009-07-16 13:27:25 +00:00