Commit Graph

2011 Commits

Author SHA1 Message Date
Manman Ren 9691f7fa35 Debug Info: support for gdwarf-2 gdwarf-3 gdwarf-4
These options will add a module flag with name "Dwarf Version".
The behavior flag is currently set to Warning, so when two values disagree,
a warning will be emitted.

llvm-svn: 184276
2013-06-19 01:46:49 +00:00
Adrian Prantl 1f56b2a4f1 Add some comments to r184252.
rdar://problem/14101097

llvm-svn: 184259
2013-06-18 23:32:21 +00:00
Adrian Prantl c1a3fe7f9b Emit forward decls for structs with declarations only when we are
limiting debug info.

FIXME: There is still work left to do here, the testcase should work even with -flimit-debug-info.

rdar://problem/14101097

llvm-svn: 184252
2013-06-18 23:01:56 +00:00
Michael Gottesman 1534399059 [multiprecision-builtins] Added missing builtin __builtin_{add,sub}cb for {add,sub} with carry for bytes.
I have had several people ask me about why this builtin was not available in
clang (since it seems like a logical conclusion). This patch implements said
builtins.

Relevant tests are included as well. I also updated the Clang language extension reference.

rdar://14192664.

llvm-svn: 184227
2013-06-18 20:40:40 +00:00
John McCall 1fe2a8c87e Add support for -fpcc-struct-return. Patch by Arthur O'Dwyer!
llvm-svn: 184166
2013-06-18 02:46:29 +00:00
Adrian Prantl de5fde0b05 Remove an ugly hack that was meant to eliminate the breakpoint ambiguity
between a block assignment and the entry of the block function. In reality
this wouldn't work anyway because blocks are predominantly created
on-the-fly inside of an ObjC method invocation.
The proper fix for the ambiguity is to use -gcolumn-info to differentiate
the breakpoints.

This is expected to break some block-related darwin-gdb tests.

rdar://problem/14039866

llvm-svn: 184157
2013-06-18 00:27:36 +00:00
Rafael Espindola 3d4276e3cf Use atomic instructions on Bitrig armv6. Patch by Patrick Wildt.
llvm-svn: 184113
2013-06-17 20:00:15 +00:00
Manman Ren 9bb34d66b3 X86 intrinsics: cmpge|gt|nge|ngt_ss|_sd
These intrinsics should return the comparision result in the low bits and keep 
the high bits of the first source operand.

When calling to builtin functions, the source operands are swapped and the high
bits of the second source operand are kept. To fix the issue, an extra
shufflevector is used.

rdar://14153896

llvm-svn: 184110
2013-06-17 19:42:49 +00:00
Serge Pavlov f7c1a2152a Clean up empty struct/union recognition.
Make use of getTypeSizeInChars to detect structs/unions of zero size. It allows
more accurate detection of types of zero size. It however has a side effect -
sequence of used types may change, that is why the test 'override-layout' was
modified.

llvm-svn: 184088
2013-06-17 17:18:51 +00:00
Ed Schouten 60afa2d923 Emit native implementations of atomic operations on FreeBSD/armv6.
Just like on Linux, FreeBSD/armv6 assumes the system supports
ldrex/strex unconditionally. It is also used by the kernel. We can
therefore enable support for it, like we do on Linux.

While there, change one of the unit tests to explicitly test against
armv5 instead of armv7, as it actually tests whether libcalls are
emitted.

llvm-svn: 184040
2013-06-15 09:40:14 +00:00
Eli Friedman c68dbeffe3 Fix buildbot breakage on PPC64.
llvm-svn: 183847
2013-06-12 17:31:32 +00:00
Eli Friedman f045007f11 Add support for complex compound assignments where the LHS is a scalar.
Fixes <rdar://problem/11224126> and PR12790.

llvm-svn: 183821
2013-06-12 01:40:06 +00:00
Eli Friedman 96fd264cc0 Make va_arg and argument passing to varargs functions work correctly with
AVX vectors when AVX is turned on.

Fixes <rdar://problem/10513611>.

llvm-svn: 183813
2013-06-12 00:13:45 +00:00
Eli Friedman 1f16b743d9 Correctly handle designated initializers which modify an array initialized
with a string.  This case is sort of tricky because we can't modify the
StringLiteral used to represent such initializers.
We are forced to decompose the string into individual characters.

Fixes <rdar://problem/10465114>.

llvm-svn: 183791
2013-06-11 21:48:11 +00:00
Eli Friedman 2761350730 Fix a very silly mistake in r183590.
llvm-svn: 183720
2013-06-11 01:59:28 +00:00
Eli Friedman 61f615af81 Fix a FIXME in a testcase about packed structs and calls I left around
while fixing a related bug.  The fix here was simpler than I thought it
would be.

Fixes <rdar://problem/10530444>.

llvm-svn: 183718
2013-06-11 01:08:22 +00:00
Jin-Gu Kang 0b5ca604a9 Added a type checking which handle the case of an ext vector and integral scalar
llvm-svn: 183602
2013-06-08 02:15:36 +00:00
Eli Friedman c11c169530 Fix va_arg on x86-64 for a struct containing a single int128_t. PR16248
llvm-svn: 183590
2013-06-07 23:20:55 +00:00
Fariborz Jahanian 44d23b85d9 blocks: fixes an ast bug when block pointer variable
is evaluated in a condition expression and then
dereferenced to envoke the block. This is
pr15663 and I applied a slight variation of the
patch with a test case. (patch is from
Arthur O'Dwyer). Also // rdar://14085217

llvm-svn: 183471
2013-06-07 00:48:14 +00:00
Tim Northover 0ae9391824 Diagnose malformed x86 inline asm using 'y' constraint.
X86's 'y' inline assembly constraint represents an MMX register, this change
prevents Clang from hitting an assertion when passed an incompatible type to
deal with.

llvm-svn: 183467
2013-06-07 00:04:50 +00:00
Jakob Stoklund Olesen 303caedd4b Implement SparcV9ABIInfo::EmitVAArg.
This could actually be implemented with the LLVM IR va_arg instruction,
but it doesn't seem to offer any advantages over accessing the va_list
pointer directly.

Using the va_list pointer directly makes it possible to perform type
coercion directly from the argument array, and the va_list updates are
exposed to the optimizers.

llvm-svn: 183292
2013-06-05 03:00:18 +00:00
Jakob Stoklund Olesen 36af2529ee Fix CoerceIntOrPtrToIntOrPtr on big-endian targets.
Type coercion for argument passing is equivalent to storing the source
type and loading the destination type from the same pointer. On
big-endian targets, this means that the high bits of integers are
preserved.

This patch fixes the CoerceIntOrPtrToIntOrPtr() function on big-endian
targets by inserting the required shift instructions to preserve the
high bits instead of the low bits.

This is used by SparcABIInfo when passing small structs in the high bits
of registers.

llvm-svn: 183291
2013-06-05 03:00:13 +00:00
Jakob Stoklund Olesen a3661146ea Heed ABIArgInfo::getInReg() for return values.
The 'inreg' attribute can also be applied to function return values in
LLVM IR. The SPARC v9 backend is using the flag when returning structs
containing 32-bit floats.

llvm-svn: 183290
2013-06-05 03:00:09 +00:00
Bob Wilson d91fff27ca Rephrase asm_mismatched_size_modifier diagnostic. <rdar://problem/14050339>
The text of this diagnostic was unnecessarily specific to the current ARM
implementation of validateConstraintModifier, and it gave a potentially
confusing suggestion for fixing the problem. The ARM-specific issue is not
a big deal since that is the only target that currently does any checking of
asm operand modifiers, but until my change in 183172 it was still wrong for
output operands in the way that it referred to the value being truncated when
put into a register, since output operands are retrieved from the registers
instead of being put into them. The bigger problem is that its suggestion to
"use a modifier" is wrong and confusing in the case where a "q" modifier is
incorrectly used with an "r" constraint. In that case, the solution might
well be to remove the modifier or perhaps change the constraint. It's better
to just leave the diagnostic message more generic.

llvm-svn: 183209
2013-06-04 06:10:09 +00:00
Aaron Ballman 5d041beb4e Adding support for MSVC #pragma detect_mismatch functionality by emitting a FAILIFMISMATCH linker command into the object file.
llvm-svn: 183178
2013-06-04 02:07:14 +00:00
Bob Wilson 1710d59553 Do not report -Wasm-operand-widths for ARM output operands. <rdar://14050337>
We're getting reports of this warning getting triggered in cases where it
is not adding any value. There is no asm operand modifier that you can use
to silence it, and there's really nothing wrong with having an LDRB, for
example, with a "char" output.

llvm-svn: 183172
2013-06-03 23:57:13 +00:00
Ed Schouten c7e82bd4e3 Add support for optimized (non-generic) atomic libcalls.
For integer types of sizes 1, 2, 4 and 8, libcompiler-rt (and libgcc)
provide atomic functions that pass parameters by value and return
results directly.

libgcc and libcompiler-rt only provide optimized libcalls for
__atomic_fetch_*, as generic libcalls on non-integer types would make
little sense. This means that we can finally make __atomic_fetch_* work
on architectures for which we don't provide these operations as builtins
(e.g. ARM).

This should fix the dreaded "cannot compile this atomic library call
yet" error that would pop up once every while.

llvm-svn: 183033
2013-05-31 19:27:59 +00:00
Ed Schouten 8c23472265 Slightly extend matching for atomic loads.
Also add the "=" to the matched pattern, to see whether we actually save
the loaded value.

llvm-svn: 183029
2013-05-31 19:18:14 +00:00
Fariborz Jahanian 615de765ab Patch to issue error when target of MacOS and iOS
does not support large load/store of atomic objects.
// rdar://13973577

llvm-svn: 182781
2013-05-28 17:37:39 +00:00
Jakob Stoklund Olesen 02dc6a1451 Build correct coercion types in SparcV9ABIInfo.
The coercion type serves two purposes:

 1. Pad structs to a multiple of 64 bits, so they are passed
    'left-aligned' in registers.

 2. Expose aligned floating point elements as first-level elements, so
    the code generator knows to pass them in floating point registers.

We also compute the InReg flag which indicates that the struct contains
aligned 32-bit floats. This flag is used by the code generator to pick
the right registers.

llvm-svn: 182753
2013-05-28 04:57:37 +00:00
Jakob Stoklund Olesen d28ab7e802 Add a SparcV9ABIInfo class for handling the standard SPARC v9 ABI.
- All integer arguments smaller than 64 bits are extended.
- Large structs are passed indirectly, not using 'byval'.
- Structs up to 32 bytes in size are returned in registers.

Some things are not implemented yet:

- EmitVAArg can be implemented in terms of the va_arg instruction.
- When structs are passed in registers, float members require special
  handling because they are passed in the floating point registers.
- Structs are left-aligned when passed in registers. This may require
  padding.

llvm-svn: 182745
2013-05-27 21:48:25 +00:00
Diego Novillo 5f2b1ce21e [PATCH] Generate cold attribute for functions marked __atribute__((cold))
This removes a FIXME in CodeGenModule::SetLLVMFunctionAttributesForDefinition.
When a function is declared cold we can now generate the IR attribute in
addition to marking the function to be optimized for size.

I tried adding a separate CHECK in the existing test, but it was
failing.  I suppose CHECK matches one line exactly once?  This would be
a problem if the attributes are listed in a different order, though they
seem to be sorted.

llvm-svn: 182666
2013-05-24 20:18:15 +00:00
Chad Rosier b9aff1edb3 [ms-inline asm] Don't diagnose an empty lookup for inline assmebly. This happen
for labels in inline assembly that aren't in the lookup tables.  E.g.,

  __asm {
   a:
   jmp a
  }

rdar://13983623

llvm-svn: 182659
2013-05-24 18:32:55 +00:00
Aaron Ballman ef50ee9ebd Suffixing #pragma comment(lib) library names with .lib if necessary. This matches MSVC behavior, as well as allows us to properly link libraries such as the ones provided by the MSDN examples.
llvm-svn: 182647
2013-05-24 15:06:56 +00:00
Justin Holewinski 9f3bfeb3b6 [NVPTX] Add entire list of supported builtins
llvm-svn: 182468
2013-05-22 12:58:29 +00:00
Reid Kleckner b144d36693 Implement __declspec(selectany) under -fms-extensions
selectany only applies to externally visible global variables.  It has
the effect of making the data weak_odr.

The MSDN docs suggest that unused definitions can only be dropped at
linktime, so Clang uses weak instead of linkonce.  MSVC optimizes away
references to constant selectany data, so it must assume that there is
only one definition, hence weak_odr.

Reviewers: espindola

Differential Revision: http://llvm-reviews.chandlerc.com/D814

llvm-svn: 182266
2013-05-20 14:02:37 +00:00
Jim Grosbach d10f1c04aa ARM: Improve codegen for vget_low_* and vget_high_ intrinsics.
These intrinsics use the __builtin_shuffle() function to extract the
low and high half, respectively, of a 128-bit NEON vector. Currently,
they're defined to use bitcasts to simplify the emitter, so we get code
like:
uint16x4_t vget_low_u32(uint16x8_t __a) {
  return (uint32x2_t) __builtin_shufflevector((int64x2_t) __a,
                                              (int64x2_t) __a,
                                              0);
}

While this works, it results in those bitcasts going all the way through
to the IR, resulting in code like:
  %1 = bitcast <8 x i16> %in to <2 x i64>
  %2 = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32>
  %zeroinitializer
  %3 = bitcast <1 x i64> %2 to <4 x i16>

We can instead easily perform the operation directly on the input vector
like:

uint16x4_t vget_low_u16(uint16x8_t __a) {
  return __builtin_shufflevector(__a, __a, 0, 1, 2, 3);
}

Not only is that much easier to read on its own, it also results in
cleaner IR like:

  %1 = shufflevector <8 x i16> %in, <8 x i16> undef,
                     <4 x i32> <i32 0, i32 1, i32 2, i32 3>

This is both easier to read and easier for the back end to reason
about effectively since the operation is obfuscating the source with
bitcasts.

rdar://13894163

llvm-svn: 181865
2013-05-15 02:40:04 +00:00
Rafael Espindola 2219fc5821 Fix __clear_cache on ARM.
Current gcc's produce an error if __clear_cache is anything but

__clear_cache(char *a, char *b);

It looks like we had just implemented a gcc bug that is now fixed.

llvm-svn: 181784
2013-05-14 12:45:47 +00:00
Rafael Espindola 92dbc3183f Use atomic instructions on linux thumb v7.
This matches gcc's behaviour. The patch also explicitly parses the version so
that this keeps working when we add support for v8.

llvm-svn: 181750
2013-05-14 00:44:24 +00:00
Rafael Espindola 101d5b956a Use atomic instructions on ARM linux.
This is safe given how the pre-v6 atomic ops funcions in libgcc are
implemented.

This fixes pr15429.

llvm-svn: 181728
2013-05-13 20:09:47 +00:00
Reid Kleckner b0f459e8ae Add pragma-comment.c test case for r181426 that I forgot to add
llvm-svn: 181546
2013-05-09 21:10:06 +00:00
Ben Langmuir 3b4c30b7e7 CodeGen for CapturedStmts
EmitCapturedStmt creates a captured struct containing all of the captured
variables, and then emits a call to the outlined function.  This is similar in
principle to EmitBlockLiteral.

GenerateCapturedFunction actually produces the outlined function.  It is based
on GenerateBlockFunction, but is much simpler.  The function type is determined
by the parameters that are in the CapturedDecl.

Some changes have been added to this patch that were reviewed as part of the
serialization patch and moving the parameters to the captured decl.

Differential Revision: http://llvm-reviews.chandlerc.com/D640

llvm-svn: 181536
2013-05-09 19:17:11 +00:00
Eli Bendersky d142ce7068 Fix test in two ways: remove incorrect comment (the intrinsic generated now
is of the llvm.sjlj.* flavore) and convert grep->FileCheck

llvm-svn: 181468
2013-05-08 20:58:01 +00:00
Ulrich Weigand 47445073f8 Add SystemZ support
This patch then adds all the usual platform-specific pieces for SystemZ:
driver support, basic target info, register names and constraints,
ABI info and vararg support.  It also adds new tests to verify pre-defined
macros and inline asm, and updates a test for the minimum alignment change.

This version of the patch incorporates feedback from reviews by
Eric Christopher and John McCall.  Thanks to all reviewers!

Patch by Richard Sandiford.

llvm-svn: 181211
2013-05-06 16:26:41 +00:00
Tim Northover 8ec8c4bf89 AArch64: teach Clang about __clear_cache intrinsic
libgcc provides a __clear_cache intrinsic on AArch64, much like it
does on 32-bit ARM.

llvm-svn: 181111
2013-05-04 07:15:13 +00:00
Adrian Prantl 52bf3c4c3f Reapply r180982 with repaired logic and an additional testcase.
Un-break the gdb buildbot.
- Use the debug location of the return expression for the cleanup code
  if the return expression is trivially evaluatable, regardless of the
  number of stop points in the function.
- Ensure that any EH code in the cleanup still gets the line number of
  the closing } of the lexical scope.
- Added a testcase with EH in the cleanup.

rdar://problem/13442648

llvm-svn: 181056
2013-05-03 20:11:48 +00:00
John McCall f413f5ed44 Move parsing of identifiers in MS-style inline assembly into
the actual parser and support arbitrary id-expressions.

We're actually basically set up to do arbitrary expressions here
if we wanted to.

Assembly operands permit things like A::x to be written regardless
of language mode, which forces us to embellish the evaluation
context logic somewhat.  The logic here under template instantiation
is incorrect;  we need to preserve the fact that an expression was
unevaluated.  Of course, template instantiation in general is fishy
here because we have no way of delaying semantic analysis in the
MC parser.  It's all just fishy.

I've also fixed the serialization of MS asm statements.

This commit depends on an LLVM commit.

llvm-svn: 180976
2013-05-03 00:10:13 +00:00
Chad Rosier bc668b0642 Fix typo in FileCheck.
llvm-svn: 180877
2013-05-01 20:10:14 +00:00
Chad Rosier 368ec9eafc [inline asm] Add a test case for r180873. Test case needs to be on the clang
side because we need an inline asm diagnostics handler in place.  Unfortunately,
we emit a .s file because we need to build the SelectionDAG to hit the backend
issue.
rdar://13446483

llvm-svn: 180874
2013-05-01 19:50:45 +00:00
Adrian Prantl ab067ae8b0 Revert 180817 because 180816 was reverted.
llvm-svn: 180823
2013-04-30 22:45:09 +00:00