Commit Graph

582 Commits

Author SHA1 Message Date
Colin LeMahieu 4b1eac4dda [Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.
llvm-svn: 224735
2014-12-22 21:40:43 +00:00
Colin LeMahieu af1e5de141 [Hexagon] Adding classes and load unsigned byte instruction, updating usages.
llvm-svn: 224730
2014-12-22 21:20:03 +00:00
Colin LeMahieu 0f850bde0e [Hexagon] Removing old variants of instructions and updating references.
llvm-svn: 224612
2014-12-19 20:29:29 +00:00
Colin LeMahieu 38ce8cd2e2 [Hexagon] Adding bit extraction and table indexing instructions.
llvm-svn: 224610
2014-12-19 20:01:08 +00:00
Colin LeMahieu 3c7f664d5a [Hexagon] Adding bit insertion instructions.
llvm-svn: 224609
2014-12-19 19:54:38 +00:00
Colin LeMahieu d63ef93b4b [Hexagon] Adding more xtype shift instructions.
llvm-svn: 224608
2014-12-19 19:51:35 +00:00
Colin LeMahieu cc09d1ccc5 [Hexagon] Adding xtype shift instructions.
llvm-svn: 224604
2014-12-19 19:34:50 +00:00
Colin LeMahieu f3db884efb [Hexagon] Adding transfers to and from control registers.
llvm-svn: 224599
2014-12-19 19:06:32 +00:00
Colin LeMahieu 402f772b82 [Hexagon] Adding doubleregs for control registers. Renaming control register class.
llvm-svn: 224598
2014-12-19 18:56:10 +00:00
Colin LeMahieu 5ccbb1298b [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
llvm-svn: 224556
2014-12-19 00:06:53 +00:00
Colin LeMahieu 174476ed96 Reverting 224550, was not ready for commit.
llvm-svn: 224552
2014-12-18 23:36:15 +00:00
Colin LeMahieu 9000481cda [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
llvm-svn: 224550
2014-12-18 23:27:51 +00:00
Colin LeMahieu 2055538edb [Hexagon] Reconfiguring register alternate names.
llvm-svn: 224455
2014-12-17 20:35:11 +00:00
Colin LeMahieu aa1bade7b4 [Hexagon] Updating doubleword shift usages to new versions.
llvm-svn: 224391
2014-12-16 23:36:15 +00:00
Colin LeMahieu 7fc90fc7e9 [Hexagon] Removing old XTYPE/BIT instructions and replacing usages.
llvm-svn: 224381
2014-12-16 22:17:09 +00:00
Colin LeMahieu f5acc8c625 [Hexagon] Adding tstbit/bitclr/bitset instructions.
llvm-svn: 224374
2014-12-16 21:28:58 +00:00
Colin LeMahieu 615757f2f1 [Hexagon] Adding bit count and twiddling instructions.
llvm-svn: 224367
2014-12-16 20:57:56 +00:00
Colin LeMahieu 6fce46baf6 [Hexagon] Adding asr/lsr/asl reg/imm, asl with saturation, asr with rounding. Doubleword abs/neg/not. Interleave and deinterleave instructions.
llvm-svn: 224365
2014-12-16 20:40:23 +00:00
Colin LeMahieu 1944a8cd04 [Hexagon] Adding absolute value, and negate with saturation
llvm-svn: 224346
2014-12-16 17:44:49 +00:00
Colin LeMahieu 455f24aa77 [Hexagon] Adding saturate and swizzle instructions.
llvm-svn: 224343
2014-12-16 16:27:17 +00:00
Colin LeMahieu d9b23509bf [Hexagon] Removing old multiply defs and updating references to new versions.
llvm-svn: 224340
2014-12-16 16:10:01 +00:00
Colin LeMahieu d9a00a9c38 [Hexagon] Adding doubleword multiplies with and without accumulation.
llvm-svn: 224293
2014-12-16 00:07:24 +00:00
Colin LeMahieu 18c927620a [Hexagon] Adding halfword to doubleword multiplies.
llvm-svn: 224289
2014-12-15 23:29:37 +00:00
Colin LeMahieu 64ffd52943 [Hexagon] Adding logical-logical accumulation instructions and tests.
llvm-svn: 224288
2014-12-15 23:19:07 +00:00
Colin LeMahieu 71e11a1d0d [Hexagon] Adding a number of additional multiply forms with tests.
llvm-svn: 224282
2014-12-15 22:10:37 +00:00
Colin LeMahieu 4a46429305 [Hexagon] Adding misc multiply encodings and tests.
llvm-svn: 224273
2014-12-15 21:17:03 +00:00
Colin LeMahieu 26f884aedf [Hexagon] Adding doubleworld accumulating multiplies of halfwords.
llvm-svn: 224267
2014-12-15 20:17:46 +00:00
Colin LeMahieu 572c53e258 [Hexagon] Adding accumulating half word multiplies.
llvm-svn: 224266
2014-12-15 20:10:28 +00:00
Colin LeMahieu d1704cdc07 [Hexagon] Adding multiply with rnd/sat/rndsat
llvm-svn: 224265
2014-12-15 20:01:59 +00:00
Colin LeMahieu fe4012a969 [Hexagon] Adding encoding bits for halfword multiplies.
llvm-svn: 224261
2014-12-15 19:22:07 +00:00
Colin LeMahieu 90482a77b1 [Hexagon] Adding double word add/min/minu/max/maxu instructions and tests.
llvm-svn: 224153
2014-12-12 21:29:25 +00:00
Colin LeMahieu 984ef17d66 [Hexagon] Adding J class call instructions.
llvm-svn: 224150
2014-12-12 21:12:27 +00:00
Matthias Braun 7e37a5f523 [CodeGen] Add print and verify pass after each MachineFunctionPass by default
Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

This is the 2nd attempt at this after realizing that PassManager::add() may
actually delete the pass.

llvm-svn: 224059
2014-12-11 21:26:47 +00:00
Rafael Espindola 01c73610d0 This reverts commit r224043 and r224042.
check-llvm was failing.

llvm-svn: 224045
2014-12-11 20:03:57 +00:00
Matthias Braun a7c82a9f1d [CodeGen] Add print and verify pass after each MachineFunctionPass by default
Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

llvm-svn: 224042
2014-12-11 19:42:05 +00:00
Colin LeMahieu 150b6b3a73 [Hexagon] Renaming classes in preparation for replacement.
llvm-svn: 224036
2014-12-11 19:01:28 +00:00
Colin LeMahieu adab80720d [Hexagon] Ading i64 <- i32, i32 sextw pattern.
llvm-svn: 224027
2014-12-11 17:08:21 +00:00
Colin LeMahieu eb52f69f59 [Hexagon] Adding encoding information for sign extend word instruction.
llvm-svn: 224026
2014-12-11 16:43:06 +00:00
Colin LeMahieu 220adb6370 [Hexagon] Adding combine ri/ir instructions.
llvm-svn: 223971
2014-12-10 22:23:07 +00:00
Colin LeMahieu db0b13cef0 [Hexagon] Adding encodings for JR class instructions. Updating complier usages.
llvm-svn: 223967
2014-12-10 21:24:10 +00:00
Colin LeMahieu 8872d20788 [Hexagon] Adding JR class predicated call reg instructions.
llvm-svn: 223933
2014-12-10 18:24:16 +00:00
Colin LeMahieu b32bf14c2a [Hexagon] [NFC] Cleaning up unused classes.
llvm-svn: 223845
2014-12-09 22:33:26 +00:00
Colin LeMahieu b030c254c0 [Hexagon] Fixing broken tests.
llvm-svn: 223823
2014-12-09 20:36:53 +00:00
Colin LeMahieu 4af437fee5 [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
llvm-svn: 223821
2014-12-09 20:23:30 +00:00
Colin LeMahieu b580d7d8c8 [Hexagon] Adding word combine dot-new form and replacing old combine opcode.
llvm-svn: 223815
2014-12-09 19:23:45 +00:00
Colin LeMahieu 30dcb232b0 [Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.
llvm-svn: 223800
2014-12-09 18:16:49 +00:00
Colin LeMahieu 5cf5632696 [Hexagon] Removing old def versions and replacing usages with versions that have encodings.
llvm-svn: 223720
2014-12-08 23:55:43 +00:00
Colin LeMahieu f5b4d655d2 [Hexagon] Adding any8, all8, and/or/xor/andn/orn/not predicate register forms, mask, and vitpack instructions and patterns.
llvm-svn: 223710
2014-12-08 23:07:59 +00:00
Colin LeMahieu b6c4dd96f9 [Hexagon] Adding xtype doubleword add, sub, and, or, xor and patterns.
llvm-svn: 223702
2014-12-08 22:19:14 +00:00
Colin LeMahieu 9bfe5473da [Hexagon] Adding xtype doubleword comparisons. Removing unused multiclass.
llvm-svn: 223701
2014-12-08 21:56:47 +00:00
Colin LeMahieu 025f860638 [Hexagon] Adding xtype parity, min, minu, max, maxu instructions.
llvm-svn: 223693
2014-12-08 21:19:18 +00:00
Colin LeMahieu 8d1376c60e [Hexagon] Adding xtype halfword add/sub ll/hl/lh/hh/sat/<<16 instructions.
llvm-svn: 223692
2014-12-08 20:33:01 +00:00
Colin LeMahieu cc46cd8eec [Hexagon] Adding add/sub with saturation. Removing unused def. Cleaning up shift patterns.
llvm-svn: 223680
2014-12-08 18:33:49 +00:00
Colin LeMahieu b56e6cd9b9 [Hexagon] Adding combine reg, reg with predicated forms.
llvm-svn: 223667
2014-12-08 17:33:06 +00:00
Colin LeMahieu a55070dbdd [Hexagon] Adding packhl instruction.
llvm-svn: 223664
2014-12-08 17:01:18 +00:00
Colin LeMahieu d8b766072b [Hexagon] Relocating logical instructions and templates later in the td file.
llvm-svn: 223523
2014-12-05 21:51:12 +00:00
Colin LeMahieu 2c77a35e6e [Hexagon] Adding sub/and/or reg, imm forms
llvm-svn: 223522
2014-12-05 21:38:29 +00:00
Colin LeMahieu 9665f98c10 [Hexagon] Updating mux_ir/ri/ii/rr with encoding bits
llvm-svn: 223515
2014-12-05 21:09:27 +00:00
Colin LeMahieu 19985e9a8d [Hexagon] Adding tfrih/l instructions.
llvm-svn: 223506
2014-12-05 20:07:19 +00:00
Colin LeMahieu a4ab58101a [Hexagon] Adding add reg, imm form with encoding bits and test.
llvm-svn: 223504
2014-12-05 19:51:23 +00:00
Colin LeMahieu 383c36e3a8 [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form.
llvm-svn: 223494
2014-12-05 18:24:06 +00:00
Colin LeMahieu 63035ebee1 [Hexagon] [NFC] Rearranging patterns and mux instruction.
llvm-svn: 223488
2014-12-05 17:58:06 +00:00
Colin LeMahieu 7358593e34 [Hexagon] [NFC] Rearranging def order.
llvm-svn: 223487
2014-12-05 17:55:51 +00:00
Colin LeMahieu 7f0a430c7d [Hexagon] Adding combine reg-reg forms.
llvm-svn: 223485
2014-12-05 17:38:36 +00:00
Colin LeMahieu 01785bb063 [Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions.
llvm-svn: 223482
2014-12-05 17:27:39 +00:00
Colin LeMahieu 5d6f03bd5a [Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests.
llvm-svn: 223334
2014-12-04 03:41:21 +00:00
NAKAMURA Takumi 597fbb5230 HexagonMCInst.h: Qualify constants explicitly to appease msc17.
llvm-svn: 223325
2014-12-04 00:26:39 +00:00
Colin LeMahieu 654f2d2037 [Hexagon] Converting member InstrDesc to static variable.
llvm-svn: 223268
2014-12-03 21:40:25 +00:00
Colin LeMahieu 7e9908ea10 [Hexagon] Converting subclass members to an implicit operand.
llvm-svn: 223264
2014-12-03 20:23:22 +00:00
Colin LeMahieu 089791db48 [NFC] Fixing pendantic warning extra semicolons.
llvm-svn: 223246
2014-12-03 17:36:39 +00:00
Colin LeMahieu 1d04fa411f [Hexagon] [NFC] Moving function implementations out of header. Clang-formatting files.
llvm-svn: 223245
2014-12-03 17:35:39 +00:00
Colin LeMahieu b4e5be4c66 [Hexagon] [NFC] Renaming *packetStart to *packetBegin
llvm-svn: 223243
2014-12-03 17:31:43 +00:00
Colin LeMahieu 6e0f9f8d61 [Hexagon] Adding cmp* immediate form instructions.
llvm-svn: 222849
2014-11-26 19:43:12 +00:00
Colin LeMahieu 31abe33726 [Hexagon] Adding and64, or64, and xor64 instructions.
llvm-svn: 222846
2014-11-26 18:55:59 +00:00
Craig Topper c50d64b07b Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.
llvm-svn: 222801
2014-11-26 00:46:26 +00:00
Colin LeMahieu b3d08bb44b [Hexagon] Adding add64 and sub64 instructions.
llvm-svn: 222795
2014-11-25 22:15:44 +00:00
Colin LeMahieu 6f6c4ff1fc Reverting 222792
llvm-svn: 222793
2014-11-25 21:39:57 +00:00
Colin LeMahieu aaf33928ee [Hexagon] Adding compare with immediate instructions.
llvm-svn: 222792
2014-11-25 21:30:28 +00:00
Colin LeMahieu 6f352b03a4 [Hexagon] Adding NOP encoding bits.
llvm-svn: 222791
2014-11-25 21:23:07 +00:00
Colin LeMahieu e83bc7476f [Hexagon] Adding C2_mux instruction.
llvm-svn: 222784
2014-11-25 20:20:09 +00:00
Colin LeMahieu 902157c249 [Hexagon] Replacing cmp* instructions with ones that contain encoding bits.
llvm-svn: 222771
2014-11-25 18:20:52 +00:00
Colin LeMahieu 287c4e1762 Removing unused variable.
llvm-svn: 222676
2014-11-24 18:55:32 +00:00
Colin LeMahieu 397a25e7cd [Hexagon] Adding asrh instruction, removing unused multiclasses.
llvm-svn: 222670
2014-11-24 18:04:42 +00:00
Colin LeMahieu 3b3197ef95 [Hexagon] Adding aslh instruction.
llvm-svn: 222668
2014-11-24 17:44:19 +00:00
Colin LeMahieu 098256c5e6 [Hexagon] Adding zxth instruction.
llvm-svn: 222662
2014-11-24 17:11:34 +00:00
Colin LeMahieu bb7d6f5514 [Hexagon] Adding zxtb instruction.
llvm-svn: 222660
2014-11-24 16:48:43 +00:00
Colin LeMahieu 310991c66f [Hexagon] Adding sxth instruction.
llvm-svn: 222577
2014-11-21 21:54:59 +00:00
Colin LeMahieu 91ffec908f [Hexagon] Adding sxtb instruction. Renaming some identically named classes that will be removed after converting referencing defs.
llvm-svn: 222575
2014-11-21 21:35:52 +00:00
Colin LeMahieu e88447d8de [Hexagon] Removing SUB_rr and replacing with A2_sub.
llvm-svn: 222571
2014-11-21 21:19:18 +00:00
Reid Kleckner 357600eab5 Add out of line virtual destructors to all LLVMTargetMachine subclasses
These recently all grew a unique_ptr<TargetLoweringObjectFile> member in
r221878.  When anyone calls a virtual method of a class, clang-cl
requires all virtual methods to be semantically valid. This includes the
implicit virtual destructor, which triggers instantiation of the
unique_ptr destructor, which fails because the type being deleted is
incomplete.

This is just part of the ongoing saga of PR20337, which is affecting
Blink as well. Because the MSVC ABI doesn't have key functions, we end
up referencing the vtable and implicit destructor on any virtual call
through a class. We don't actually end up emitting the dtor, so it'd be
good if we could avoid this unneeded type completion work.

llvm-svn: 222480
2014-11-20 23:37:18 +00:00
Mehdi Amini fee89e43ad Update Makefile following directory removal in r222466
llvm-svn: 222475
2014-11-20 22:48:24 +00:00
Colin LeMahieu ff06261aed [Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they have a circular dependency.
llvm-svn: 222458
2014-11-20 21:56:35 +00:00
Colin LeMahieu ac00643603 [Hexagon] Adding A2_xor instruction with IR selection pattern and test.
llvm-svn: 222399
2014-11-19 23:22:23 +00:00
Colin LeMahieu 21866546ae [Hexagon] Adding A2_or instruction with IR selection pattern and test.
llvm-svn: 222396
2014-11-19 22:58:04 +00:00
Colin LeMahieu 44fd1c8bdf [Hexagon] Adding A2_and instruction.
llvm-svn: 222274
2014-11-18 22:45:47 +00:00
Colin LeMahieu 38765e6d89 [Hexagon] Adding A2_sub instruction
Renaming test files.

llvm-svn: 222263
2014-11-18 21:51:51 +00:00
Colin LeMahieu efa74e0280 [Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
Adding test to show correct instruction selection and encoding.

llvm-svn: 222249
2014-11-18 20:28:11 +00:00
Aditya Nandakumar 3053155652 We can get the TLOF from the TargetMachine - so constructor no longer requires TargetLoweringObjectFile to be passed.
llvm-svn: 221926
2014-11-13 21:29:21 +00:00
Colin LeMahieu b6bbeee744 [Hexagon]
NFC Renaming reserved identifier.

llvm-svn: 221898
2014-11-13 16:36:30 +00:00
Aditya Nandakumar a27193297f This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively
llvm-svn: 221878
2014-11-13 09:26:31 +00:00