Commit Graph

8178 Commits

Author SHA1 Message Date
Evan Cheng ad7c6124e7 Hide a couple of options.
llvm-svn: 86522
2009-11-09 06:49:37 +00:00
Evan Cheng ce29331e10 80 col.
llvm-svn: 86521
2009-11-09 06:49:22 +00:00
Lang Hames 09eeeaf08b Moved some ManagedStatics out of the SlotIndexes header.
llvm-svn: 86446
2009-11-08 08:49:59 +00:00
Anton Korobeynikov f93bb39b03 Add 8 bit libcalls and make use of them for msp430
llvm-svn: 86384
2009-11-07 17:14:39 +00:00
Chris Lattner 8e1d7222a7 Fix PR5421 by APInt'izing switch lowering.
llvm-svn: 86354
2009-11-07 07:50:34 +00:00
Lang Hames bc247dce4d Update some globals to use ManagedStatic.
llvm-svn: 86342
2009-11-07 05:50:28 +00:00
Mon P Wang fc032ced22 Fix memoizing of CvtRndSatSDNode
llvm-svn: 86340
2009-11-07 04:46:25 +00:00
Evan Cheng 7ff831962a - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
except it doesn't care if the definitions' virtual registers differ. This is
  used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
  Since pc relative constantpool entries are always different, this requires it
  it check if the values can actually the same.

llvm-svn: 86328
2009-11-07 03:52:02 +00:00
Kenneth Uildriks 07119737aa Add code to check at SelectionDAGISel::LowerArguments time to see if return values can be lowered to registers. Coming soon, code to perform sret-demotion if return values cannot be lowered to registers
llvm-svn: 86324
2009-11-07 02:11:54 +00:00
Jakob Stoklund Olesen 4141d8ee92 Fix inverted conflict test in -early-coalesce.
A non-identity copy cannot be coalesced when the phi join destination register
is live at the copy site.

Also verify the condition that the PHI join source register is only used in
the PHI join. Otherwise the coalescing is invalid.

llvm-svn: 86322
2009-11-07 01:58:40 +00:00
Bob Wilson b29e155c53 Fix comment typos.
llvm-svn: 86295
2009-11-06 22:38:38 +00:00
Dan Gohman 0080ee2d91 Use WriteAsOperand to print GlobalAddress MachineOperands. This
prints them with the leading '@'.

llvm-svn: 86261
2009-11-06 18:03:10 +00:00
Devang Patel cc11371b77 Do not bother to emit debug info for nameless global variable.
llvm-svn: 86259
2009-11-06 17:58:12 +00:00
Devang Patel 06ce6506d2 Do not try to emit debug info entry for dead global variable.
llvm-svn: 86212
2009-11-06 01:30:04 +00:00
Dan Gohman ee8afcc59d Factor out the printing of the leading tab into printInlineAsm.
llvm-svn: 86199
2009-11-06 00:04:54 +00:00
Dan Gohman d53b5cfe3f Fix the label name generation for address-taken labels to avoid potential
problems with name collisions.

llvm-svn: 86189
2009-11-05 23:14:35 +00:00
Lang Hames 933c541270 Added support for renumbering existing index list elements. Removed some junk from the initial numbering code in runOnMachineFunction.
llvm-svn: 86184
2009-11-05 22:20:57 +00:00
David Goodwin bed7cb6c1d Fix bug in aggressive antidep breaking; liveness was not updated correctly for regions that do not have antidep candidates.
llvm-svn: 86172
2009-11-05 21:06:09 +00:00
Dan Gohman 43bdc260d6 Avoid printing a redundant space in SDNode->dump().
llvm-svn: 86151
2009-11-05 18:49:11 +00:00
David Goodwin 542649463b Replace std::map.at() with std::map[].
llvm-svn: 86102
2009-11-05 01:45:50 +00:00
David Goodwin 7d8878add2 Break anti-dependencies using free registers in a round-robin manner to avoid introducing new anti-dependencies.
llvm-svn: 86098
2009-11-05 01:19:35 +00:00
Evan Cheng 66549b2818 Now that code placement optimization pass is run for JIT, make sure it's before pre-emit passes.
llvm-svn: 86092
2009-11-05 01:16:59 +00:00
Evan Cheng 921152fe9d Code refactoring.
llvm-svn: 86085
2009-11-05 00:51:13 +00:00
David Goodwin 28ba4f27d1 Correctly add chain dependencies around calls and unknown-side-effect instructions.
llvm-svn: 86080
2009-11-05 00:16:44 +00:00
Devang Patel f05d57283e While calculating original type size for a derived type, handle type variants encoded as DIDerivedType appropriately.
This improves bitfield support.

llvm-svn: 86073
2009-11-04 23:48:00 +00:00
Devang Patel 67f56f08c2 Fix DW_AT_data_member_location for bit-fields. It points to the location of annonymous field that covers respective field.
llvm-svn: 86054
2009-11-04 22:06:12 +00:00
Lang Hames 289b8a2bd9 Handle empty/tombstone keys for LiveIndex more cleanly. Check for index sanity when constructing index list entries.
llvm-svn: 86049
2009-11-04 21:24:15 +00:00
Eric Christopher 9196f0c0e8 Add some options to disable various code gen optimizations.
llvm-svn: 86044
2009-11-04 19:57:50 +00:00
Devang Patel 5d3fe2fc77 Array element size does not match array size but array is not a bitfield.
llvm-svn: 86043
2009-11-04 19:37:40 +00:00
Jakob Stoklund Olesen c7cfc94bcc Print out an informative comment for KILL instructions.
The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output.

With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF.

llvm-svn: 86041
2009-11-04 19:24:37 +00:00
Evan Cheng 95bdc5d899 RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,
and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.

llvm-svn: 86022
2009-11-04 08:33:14 +00:00
Douglas Gregor 90790c7781 Fix CMake makefiles
llvm-svn: 85994
2009-11-04 01:32:06 +00:00
Lang Hames 05fb9637f6 The Indexes Patch.
This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.

For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.

The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.

llvm-svn: 85979
2009-11-03 23:52:08 +00:00
Bob Wilson 53a31ad3c1 Fix branch folding bug for indirect branches: for a block containing only
an unconditional branch (possibly from tail merging), this code is
trying to redirect all of its predecessors to go directly to the branch
target, but that isn't feasible for indirect branches.  The other
predecessors (that don't end with indirect branches) could theoretically
still be handled, but that is not easily done right now.

The AnalyzeBranch interface doesn't currently let us distinguish jump table
branches from indirect branches, and this code is currently handling
jump tables.  To avoid punting on address-taken blocks, we would have to give
up handling jump tables.  That seems like a bad tradeoff.

llvm-svn: 85975
2009-11-03 23:44:31 +00:00
Evan Cheng f42b5af549 Re-apply 85799. It turns out my code isn't buggy.
llvm-svn: 85947
2009-11-03 21:40:02 +00:00
David Goodwin 8501dbbe10 Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
llvm-svn: 85939
2009-11-03 20:57:50 +00:00
David Goodwin a86f919763 <rdar://problem/7352605>. When building schedule graph use mayAlias information to avoid chaining loads/stores of spill slots with non-aliased memory ops.
llvm-svn: 85934
2009-11-03 20:15:00 +00:00
Devang Patel ffa7c07352 Ignore unnamed variables.
llvm-svn: 85909
2009-11-03 18:30:27 +00:00
Jeffrey Yasskin 6235b19d7b Fix a funky "declared with greater visibility than the type of its field"
warning from gcc by removing VISIBILITY_HIDDEN attributes.  

llvm-svn: 85873
2009-11-03 06:29:36 +00:00
Evan Cheng a8a58efc03 Revert 85799 for now. It might be breaking llvm-gcc driver.
llvm-svn: 85827
2009-11-02 21:49:14 +00:00
David Goodwin 00822aabf6 Chain dependencies used to enforce memory order should have latency of 0 (except for true dependency of Store followed by aliased Load... we estimate that case with a single cycle of latency assuming the hardware will bypass)
llvm-svn: 85807
2009-11-02 17:06:28 +00:00
Evan Cheng 2729543984 Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.

llvm-svn: 85799
2009-11-02 08:09:49 +00:00
Evan Cheng ea68c7c9a8 Add PseudoSourceValue::mayAlias. It returns true if the object can ever alias any LLVM IR value.
llvm-svn: 85762
2009-11-01 23:50:04 +00:00
Dan Gohman ae6bb61594 Fix a missing newline in the dwarf output code.
llvm-svn: 85684
2009-10-31 20:59:09 +00:00
Dan Gohman 34341e69c4 Make -print-machineinstrs more readable.
- Be consistent when referring to MachineBasicBlocks: BB#0.
 - Be consistent when referring to virtual registers: %reg1024.
 - Be consistent when referring to unknown physical registers: %physreg10.
 - Be consistent when referring to known physical registers: %RAX
 - Be consistent when referring to register 0: %reg0
 - Be consistent when printing alignments: align=16
 - Print jump table contents.
 - Don't print host addresses, in general.
 - and various other cleanups.

llvm-svn: 85682
2009-10-31 20:19:03 +00:00
Dan Gohman 18dc1c5c9e Factor out more code into addCommonCodeGenPasses. The JIT wasn't
previously running CodePlacementOpt. Also print headers before
each dump in -print-machineinstrs mode, so that it's clear which
dump is which.

llvm-svn: 85681
2009-10-31 20:17:39 +00:00
Dan Gohman fb7f0e57b6 Remove CodeGenLICM. It's largely obsoleted by MachineLICM's new ability
to unfold loop-invariant loads.

llvm-svn: 85657
2009-10-31 14:35:41 +00:00
Dan Gohman ba8735d25a When discarding SrcValue information, discard all of it so that code
that uses this information knows to behave conservatively.

llvm-svn: 85654
2009-10-31 14:14:04 +00:00
Dan Gohman 97abba5b6f Fix 80-column violation.
llvm-svn: 85653
2009-10-31 14:12:53 +00:00
Eric Christopher a0ca9e944f Fix warning with gcc-4.0 and signed/unsigned.
llvm-svn: 85648
2009-10-31 09:24:35 +00:00
Dan Gohman 060ee82dab Add assertion checks here to turn silent miscompiles into aborts.
llvm-svn: 85639
2009-10-30 23:59:06 +00:00
Dan Gohman d814e32e57 Don't mark registers dead here when processing nodes with MVT::Flag
results. This works around a problem affecting targets which rely on
MVT::Flag to handle physical register defs.

llvm-svn: 85638
2009-10-30 23:57:47 +00:00
Dan Gohman 49fa51d936 Fix MachineLICM to use the correct virtual register class when
unfolding loads for hoisting.  getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.

llvm-svn: 85622
2009-10-30 22:18:41 +00:00
Lang Hames 94966ca926 Stop the iterator in ValueLiveAt from potentially running off the end of the interval.
llvm-svn: 85599
2009-10-30 18:12:09 +00:00
Dan Gohman 64997909a6 Don't delete blocks which have their address taken.
llvm-svn: 85572
2009-10-30 02:13:27 +00:00
Dan Gohman e0a8b8fc56 Mention if a block has its address taken in debug output.
llvm-svn: 85571
2009-10-30 02:08:26 +00:00
Dan Gohman 4246f00e0c Add support for BlockAddress static initializers.
llvm-svn: 85562
2009-10-30 01:45:18 +00:00
Dan Gohman 2f8ccf2bf4 Add a FIXME comment.
llvm-svn: 85559
2009-10-30 01:38:20 +00:00
Dan Gohman c83dc4b506 Add some comments.
llvm-svn: 85558
2009-10-30 01:34:35 +00:00
Dan Gohman 6c9388011b Initial target-independent CodeGen support for BlockAddresses.
llvm-svn: 85556
2009-10-30 01:27:03 +00:00
David Goodwin faa7660fd0 Between scheduling regions, correctly maintain anti-dep breaking state so that we don't incorrectly rename registers that span these regions.
llvm-svn: 85537
2009-10-29 23:30:59 +00:00
Dan Gohman 05efd893db Remove some unnecessary spaces in debug output.
llvm-svn: 85536
2009-10-29 23:30:06 +00:00
Dan Gohman 554a75a973 Move some code from being emitted as boilerplate duplicated in every
*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.

llvm-svn: 85530
2009-10-29 22:30:23 +00:00
David Goodwin 9f1b2d4619 Fix a couple of bugs in aggressive anti-dep breaking.
llvm-svn: 85522
2009-10-29 19:17:04 +00:00
Bob Wilson 94f8f87890 Refactor complicated predicate into a separate function.
llvm-svn: 85519
2009-10-29 18:40:06 +00:00
Dan Gohman 453d64c9f5 Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.

llvm-svn: 85517
2009-10-29 18:10:34 +00:00
Dan Gohman 104f57cae8 Refactor the code for unfolding a load into a separate function.
llvm-svn: 85515
2009-10-29 17:47:20 +00:00
Bill Wendling c44768ae69 Reapply r85338.
llvm-svn: 85514
2009-10-29 17:39:46 +00:00
Jim Grosbach cad78a7634 When the function is doing dynamic stack realignment, the spill slot will be
indexed via the stack pointer, even if a frame pointer is present. Update the
heuristic to place it nearest the stack pointer in that case, rather than
nearest the frame pointer.

llvm-svn: 85474
2009-10-29 02:33:47 +00:00
Dale Johannesen 8829fc3a18 When there is a 2-instruction spill sequence, record
the second (store) instruction in SpillSlotToUsesMap
consistently.  I don't think this matters functionally,
but it's cleaner and Evan wants it this way.

llvm-svn: 85463
2009-10-29 01:15:40 +00:00
Bill Wendling 3505c94923 Don't put in these EH changes.
llvm-svn: 85460
2009-10-29 00:37:35 +00:00
Bill Wendling a8eceedb82 Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.
--- Reverse-merging r85338 into '.':
U    lib/CodeGen/SimpleRegisterCoalescing.cpp
U    lib/CodeGen/SimpleRegisterCoalescing.h

llvm-svn: 85454
2009-10-29 00:22:16 +00:00
Bob Wilson 3ab552ec74 Reimplement BranchFolding change to avoid tail merging for a 1 instruction
common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.

llvm-svn: 85441
2009-10-28 22:10:20 +00:00
Dale Johannesen 14f162d9dc When we generate spill code, then decide we don't need
to spill after all, we weren't handling 2-instruction
spill sequences correctly (PPC Altivec).  We need to
remove the store in this case.  Removing the other
instruction(s) would be goodness but is not needed for
correctness, and isn't done here.  7331562.

llvm-svn: 85437
2009-10-28 21:56:18 +00:00
Eric Christopher 1fd4c577d2 Make sure we return the right sized type here.
llvm-svn: 85436
2009-10-28 21:32:16 +00:00
Bob Wilson 97b9312663 Revert r85346 change to control tail merging by CodeGenOpt::Level.
I'm going to redo this using the OptimizeForSize function attribute.

llvm-svn: 85426
2009-10-28 20:46:46 +00:00
David Goodwin e30ed53c05 Make AntiDepReg.h internal.
llvm-svn: 85412
2009-10-28 18:29:54 +00:00
Dan Gohman 14ca753e28 Don't call SDNode::isPredecessorOf when it isn't necessary. If the load's
chains have no users, they can't be predecessors of the condition.

llvm-svn: 85394
2009-10-28 15:28:02 +00:00
Dan Gohman 57780dfdfc Simplify this code: if the unfolded load can't be hoisted, just delete
the new instructions and leave the old one in place.

llvm-svn: 85393
2009-10-28 15:23:36 +00:00
Dan Gohman cd139c0373 Rewrite SelectionDAG::isPredecessorOf to be iterative instead of
recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.

llvm-svn: 85369
2009-10-28 03:44:30 +00:00
Dan Gohman 1b44f10ff4 Teach MachineLICM to unfold loads from constant memory from
otherwise unhoistable instructions in order to allow the loads
to be hoisted.

llvm-svn: 85364
2009-10-28 03:21:57 +00:00
Evan Cheng 83896a59e1 Add a second ValueType argument to isFPImmLegal.
llvm-svn: 85361
2009-10-28 01:43:28 +00:00
Dan Gohman 4b46cbfc23 Mark dead physregdefs dead immediately. This helps MachineSink and
MachineLICM and other things which run before LiveVariables is run.

llvm-svn: 85360
2009-10-28 01:13:53 +00:00
Dan Gohman 75d6a4afd2 Allow constants of different types to share constant pool entries
if they have compatible encodings.

llvm-svn: 85359
2009-10-28 01:12:16 +00:00
Chris Lattner d04cb6d0fa rename indbr -> indirectbr to appease the residents of #llvm.
llvm-svn: 85351
2009-10-28 00:19:10 +00:00
Bob Wilson 9693f9d465 Record CodeGen optimization level in the BranchFolding pass so that we can
use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346
2009-10-27 23:49:38 +00:00
Lang Hames cd3939ef0e Fixed a bug in the coalescer where intervals were occasionally merged despite a real interference. This fixes rdar://problem/7157961.
llvm-svn: 85338
2009-10-27 23:16:58 +00:00
Dan Gohman a5e078b677 Update the MachineBasicBlock CFG for an indirect branch.
llvm-svn: 85325
2009-10-27 22:10:34 +00:00
Dan Gohman a4374e66f0 Add CodeGen support for indirect branches.
llvm-svn: 85323
2009-10-27 21:56:26 +00:00
Devang Patel cfeaa48642 Do not held on to DenseMap slot accross map insertion. The insertion may cause the map to grow rending the slot invalid.
Use this opportunity to use ValueMap instead of DenseMap.

llvm-svn: 85298
2009-10-27 20:47:17 +00:00
Chris Lattner 26076a8f10 don't use stdio
llvm-svn: 85296
2009-10-27 20:42:54 +00:00
Evan Cheng 16993aa30b Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
llvm-svn: 85281
2009-10-27 19:56:55 +00:00
Chris Lattner 3ed871fe62 add enough support for indirect branch for the feature test to pass
(assembler,asmprinter, bc reader+writer) and document it.  Codegen
currently aborts on it.

llvm-svn: 85274
2009-10-27 19:13:16 +00:00
Chris Lattner 0997991252 pseudosourcevalue is also still using getGlobalContext(), so it isn't
thread safe either.

llvm-svn: 85253
2009-10-27 17:02:08 +00:00
Eric Christopher 7a50b280c1 Add objectsize intrinsic and hook it up through codegen. Doesn't
do anything than return "I don't know" at the moment.

llvm-svn: 85189
2009-10-27 00:52:25 +00:00
Victor Hernandez de5ad42aa1 Remove FreeInst.
Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.

llvm-svn: 85176
2009-10-26 23:43:48 +00:00
David Goodwin e056d1077e Allow the aggressive anti-dep breaker to process the same region multiple times. This is necessary because new anti-dependencies are exposed when "current" ones are broken.
llvm-svn: 85166
2009-10-26 22:31:16 +00:00
David Goodwin 661ea989e9 Define virtual destructor in *.cpp file.
llvm-svn: 85146
2009-10-26 19:41:00 +00:00
David Goodwin de11f36ab7 Add aggressive anti-dependence breaker. Currently it is not the default for any target. Enable with -break-anti-dependencies=all.
llvm-svn: 85145
2009-10-26 19:32:42 +00:00
Dan Gohman 9aba0d9988 When checking whether a def of an aliased register is dead, ask the
machineinstr whether the aliased register is dead, rather than the original
register is dead. This allows it to get the correct answer when examining
an instruction like this:
  CALLpcrel32 <ga:foo>, %AL<imp-def>, %EAX<imp-def,dead>
where EAX is dead but a subregister of it is still live. This fixes PR5294.

llvm-svn: 85135
2009-10-26 18:26:18 +00:00