Commit Graph

407320 Commits

Author SHA1 Message Date
Alexandros Lamprineas 65033ef9e8 [AArch64] Add a tablegen pattern for UZP1.
Converts concat_vectors(V64 (trunc V128), V64 (trunc V128)), which
would otherwise be lowered as xtn followed by xtn2, to uzp1.

Differential Revision: https://reviews.llvm.org/D115435
2021-12-14 11:51:05 +00:00
Nikolas Klauser f2eab339b9 [libc++][NFC] Remove goto from std::string
Remove `goto` from `std::string`

Reviewed By: Quuxplusone, ldionne, #libc, nilayvaish

Spies: nilayvaish, libcxx-commits

Differential Revision: https://reviews.llvm.org/D115598
2021-12-14 12:35:02 +01:00
John Brawn dc9f65be45 [AArch64][SVE] Fix handling of stack protection with SVE
Fix a couple of things that were causing stack protection to not work
correctly in functions that have scalable vectors on the stack:
 * Use TypeSize when determining if accesses to a variable are
   considered out-of-bounds so that the behaviour is correct for
   scalable vectors.
 * When stack protection is enabled move the stack protector location
   to the top of the SVE locals, so that any overflow in them (or the
   other locals which are below that) will be detected.

Fixes: https://github.com/llvm/llvm-project/issues/51137

Differential Revision: https://reviews.llvm.org/D111631
2021-12-14 11:30:48 +00:00
Nikita Popov b81450afb6 [CodeGen] Add std:: qualifier
Hopefully addresses the buildbot failures.
2021-12-14 12:17:55 +01:00
Nikita Popov b8d121eb1d [CodeGen] Require use of Address::invalid() for invalid address (NFC)
This no longer allows creating an invalid Address through the regular
constructor. There were only two places that did this (AggValueSlot
and EHCleanupScope) which did this by converting a potential nullptr
into an Address. I've fixed both of these by directly storing an
Address instead.

This is intended as a bit of preliminary cleanup for D103465.

Differential Revision: https://reviews.llvm.org/D115630
2021-12-14 12:06:05 +01:00
Florian Hahn ff3b085ab0
[X86] Use bundle for CALL_RVMARKER expansion.
This patch updates expandCALL_RVMARKER to wrap the call, marker and
objc runtime call in an instruction bundle. This ensures later passes,
like machine block placement, cannot break them up.

On AArch64, the instruction sequence is already wrapped in a bundle.
Keeping the whole instruction sequence together is highly desirable for
performance and outweighs potential other benefits from breaking the
sequence up.

Reviewed By: ahatanak

Differential Revision: https://reviews.llvm.org/D115230
2021-12-14 10:53:22 +00:00
Jan Svoboda 47eec789ed [clang][deps] Remove hard-coded resource directory from tests
Dependency scanner test for resource directory deduction doesn't account for LLVM builds with custom `CLANG_RESOURCE_DIR`.

This patch ensures we don't hardcode the default behavior into the test and take into account the actual value. This is done by running `%clang -print-resource-dir` and using that as the expected value in test assertions.
New comment also clarifies this is different from running that command as part of the dependency scan.

Reviewed By: mgorny

Differential Revision: https://reviews.llvm.org/D115628
2021-12-14 10:59:47 +01:00
Alexander Belyaev 15f8f3e20a [mlir] Split std.rank into tensor.rank and memref.rank.
Move `std.rank` similarly to how `std.dim` was moved to TensorOps and MemRefOps.

Differential Revision: https://reviews.llvm.org/D115665
2021-12-14 10:15:55 +01:00
Markus Böck ef5be2bb16 [mlir] Implement `DataLayoutTypeInterface` for `LLVMArrayType`
Implementation of the interface allows querying the size and alignments of an LLVMArrayType as well as query the size and alignment of a struct containing an LLVMArrayType.
The implementation should yield the same results as llvm::DataLayout, including support for over aligned element types.
There is no customization point for adjusting an arrays alignment; it is simply taken from the element type.

Differential Revision: https://reviews.llvm.org/D115704
2021-12-14 09:35:45 +01:00
Jonathan Peyton 9769340905 [OpenMP][libomp] Fix compile errors with new KMP_HW_SUBSET changes
Add missing guards around x86-specific code.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D115664
2021-12-14 08:33:05 +01:00
Kazu Hirata 7787a8f1b7 [llvm] Use llvm::reverse (NFC) 2021-12-13 21:54:51 -08:00
Craig Topper 3cda38796c [RISCV] Add rs2 encoding to the FPUnaryOp_r and FPUnaryOp_r_frm template arguments.
Instead of having unary instruction include a 'let' in their class
body, add rs2val as a template parameter. Then we can use a let
in FPUnaryOp_r and FPUnaryOp_r_frm. This reduces the overall
verbosity of the FP files.

Reviewed By: achieveartificialintelligence

Differential Revision: https://reviews.llvm.org/D115537
2021-12-13 21:38:42 -08:00
Nelson Chu 10a71981e9 [RISCV] Support named opcodes in .insn directive.
This patch is one of the TODO of commit, 283879793d

We build the GenericTable for these opcodes, and also extend class RISCVOpcode, to store the names of opcodes.  Then we call the parseInsnDirectiveOpcode to parse the opcode filed in .insn directive.  We only allow users to write the recognized opcode names, or just write the immediate values in the 7 bits range.

Documentation: https://sourceware.org/binutils/docs-2.37/as/RISC_002dV_002dFormats.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D115224
2021-12-13 20:59:33 -08:00
Fangrui Song e7a95b0674 Reland [ELF] Split scanRelocations into scanRelocations/postScanRelocations
(Fixed an issue about GOT on a copy relocated alias.)

The idea is to make scanRelocations mark some actions are needed (GOT/PLT/etc)
and postpone the real work to postScanRelocations. It gives some flexibility:

* Make it feasible to support .plt.got (PR32938): we need to know whether GLOB_DAT and JUMP_SLOT are both needed.
* Make non-preemptible IFUNC handling slightly cleaner: avoid setting/clearing sym.gotInIgot
* -z nocopyrel: report all copy relocation places for one symbol
* Make GOT deduplication feasible
* Make parallel relocation scanning feasible (if we can avoid all stateful operations and make Symbol attributes atomic), but parallelism may not be the appealing choice

Since this patch moves a large chunk of code out of ELFT templates. My x86-64
executable is actually a few hundred bytes smaller.

For ppc32-ifunc-nonpreemptible-pic.s: I remove absolute relocation references to non-preemptible ifunc
because absolute relocation references are incorrect in -fpie mode.

Reviewed By: peter.smith, ikudrin

Differential Revision: https://reviews.llvm.org/D114783
2021-12-13 20:11:24 -08:00
Fangrui Song d1014d9e6d [ELF] Improve test for copy relocations on aliases 2021-12-13 20:04:24 -08:00
Chen Zheng 062d9b7d43 [LegalizeVectorOps] code refactor for LegalizeOp; NFC
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D115636
2021-12-14 03:45:53 +00:00
Fangrui Song 0b8b86e30f Revert "[ELF] Split scanRelocations into scanRelocations/postScanRelocations"
This reverts commit fc33861d48.

`replaceWithDefined` should copy needsGot, otherwise an alias for a copy
relocated symbol may not have GOT entry if its needsGot was originally true.
2021-12-13 19:29:53 -08:00
David Blaikie 892742907f DWARFVerifier: Verbosely dump DIEs in verifier reports
Seems helpful when you're dealing with invalid/problematic DWARF. Some
diagnostic messages are probably redundant with the verbose dumping and
could be simplified with this.
2021-12-13 19:00:38 -08:00
Ellis Hoag c809da7d9c Revert "[InstrProf] Attach debug info to counters"
This reverts commit 800bf8ed29.

The `Instrumentation/InstrProfiling/debug-info-correlate.ll` test was
failing because I forgot the `llc` commands are architecture specific.
I'll follow up with a fix.

Differential Revision: https://reviews.llvm.org/D115689
2021-12-13 18:15:17 -08:00
Ellis Hoag 800bf8ed29 [InstrProf] Attach debug info to counters
Add the llvm flag `-debug-info-correlate` to attach debug info to instrumentation counters so we can correlate raw profile data to their functions. Raw profiles are dumped as `.proflite` files. The next diff enables `llvm-profdata` to consume `.proflite` and debug info files to produce a normal `.profdata` profile.

Part of the "lightweight instrumentation" work: https://groups.google.com/g/llvm-dev/c/r03Z6JoN7d4

Reviewed By: kyulee

Differential Revision: https://reviews.llvm.org/D114565
2021-12-13 17:51:22 -08:00
Mircea Trofin a290770fa8 [benchmark] Pull latest; disable -Werror
Pulled the latest (b000672), which adds an option to disable -Werror,
which caused issues previously (see for instance
https://reviews.llvm.org/D112012)

Applied https://github.com/google/benchmark/pull/1305 to unblock, as
this issue is causing downstream buildbot failures.

The only change is in llvm/CMakeLists.txt, where we set
BENCHMARK_ENABLE_WERROR to have the same value as LLVM_ENABLE_WERROR.

This patch also introduces a convenience script to pull benchmark from
upstream.

Differential Revision: https://reviews.llvm.org/D115684
2021-12-13 17:09:38 -08:00
Jonas Devlieghere 58473d84e0 [lldb] Use LLDB_VERSION_STRING instead of CLANG_VERSION_STRING 2021-12-13 16:58:39 -08:00
Tony Tye c6be2ad73a [AMDGPU][NFC] Add documentation for location description DWARF extension
Add documentation for the DWARF extension to allow location descriptions
on the DWARF expression stack. This is part of the "DWARF Extensions For
Heterogeneous Debugging" used by the AMD GPU target.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D115587
2021-12-14 00:58:17 +00:00
Philip Reames e6ad9ef4e7 [instcombine] Canonicalize constant index type to i64 for extractelement/insertelement
The basic idea to this is that a) having a single canonical type makes CSE easier, and b) many of our transforms are inconsistent about which types we end up with based on visit order.

I'm restricting this to constants as for non-constants, we'd have to decide whether the simplicity was worth extra instructions. For constants, there are no extra instructions.

We chose the canonical type as i64 arbitrarily.  We might consider changing this to something else in the future if we have cause.

Differential Revision: https://reviews.llvm.org/D115387
2021-12-13 16:56:22 -08:00
Alina Sbirlea ac994f831c [MemorySSA] Document details regarding MemorySSA's precision. 2021-12-13 16:49:24 -08:00
Alina Sbirlea 46fb810955 [NewGVN] Use PredicateInfo info when previously used for the same ssa.copy intrinsic
Symbolic execution using PredicateInfo is only done for the ssa.copy
intrinsic. It's using two potential sources for building the expression:
1. the Value of the instruction for which the instruction is a copy of, and
2. the Value from the contraint in PredicateInfo
It's possible to get into an infinite loop when choosing between these
two, as described in PR31613.

This patch proposes performing swapping of the two values (i.e. choosing
the second one for the expression), if that same second value was chosen
before; this breaks the cycle.

In the testcases provided, where there is a contradiction between the
value from symbolic execution and assume instruction, NewGVN reduces the
assume to assume(false).

Resolves PR31613.

Differential Revision: https://reviews.llvm.org/D110907
2021-12-13 16:49:24 -08:00
Chen Zheng 8c107bee70 [LegalizeVectorOps] fix a typo
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D115637
2021-12-14 00:22:58 +00:00
Shilei Tian d762c3d905 [NFC][Clang][OpenMP] Use switch-case statement to process clauses of atomic directive
This patch makes the process of clauses of atomic directive more clear
and preparation for the support for `atomic compare capture`.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D115586
2021-12-13 19:18:28 -05:00
Nikolas Klauser 3d510343c4 [libc++] Make ThrowingIterator constexpr
Make ThrowingIterator constexpr

Reviewed By: Quuxplusone, ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D115579
2021-12-14 01:13:21 +01:00
Philip Reames eb052f6b8f Reapply: Autogen more vectorizer tests in advance of D115387.
Drop changes to consecutive-ptr-uniforms.ll since that test checks boths IR output and debug messages.  I'd missed this in the original commit, and Florian pointed it out in post-commit review.

Original commit message:

These are the ones my first round of scripting couldn't handle that required a bit of manual messaging.  This should be the last batch in llvm-check.

This reverts commit bbba86764a.
2021-12-13 15:49:14 -08:00
LLVM GN Syncbot bc56ea7c3e [gn build] Port fff876c20e 2021-12-13 23:30:23 +00:00
Arthur Eubanks fff876c20e Revert "[ASan] Shared optimized callbacks implementation."
This reverts commit ebc31d2e72.

Causes test failures on Windows, see comments on D114558.
2021-12-13 15:26:55 -08:00
Arthur Eubanks a357fad868 Revert "[ASan] Added NO_EXEC_STACK_DIRECTIVE to assembly callback file."
This reverts commit e31a5e0ba5.

Reverting dependent change D114558.
2021-12-13 15:26:55 -08:00
Noah Shutty 34491ca729 [Symbolizer][Debuginfo] Add debuginfod client to llvm-symbolizer.
Adds a fallback to use the debuginfod client library (386655) in `findDebugBinary`.
Fixed a cast of Erorr::success() to Expected<> in debuginfod library.
Added Debuginfod to Symbolize deps in gn.
Updates compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh to include Debuginfod library to fix sanitizer-x86_64-linux breakage.

Reviewed By: jhenderson, vitalybuka

Differential Revision: https://reviews.llvm.org/D113717
2021-12-13 23:00:32 +00:00
Arthur O'Dwyer 4dd901f4d3 [libc++] Fix the noexceptness of __decay_copy.
When `a` was an array type, `__decay_copy(a)` was incorrectly marking itself
noexcept(false), because it is false that `int[10]` is nothrow convertible to `int[10]`
(in fact it is not convertible at all).

We have no tests explicitly for `__decay_copy`, but the new ranges::begin
and ranges::end tests fail before this patch.

Differential Revision: https://reviews.llvm.org/D115658
2021-12-13 17:55:38 -05:00
Benoit Jacob aba437ceb2 [mlir][Vector] Patterns flattening vector transfers to 1D
This is the second part of https://reviews.llvm.org/D114993 after slicing
into 2 independent commits.

This is needed at the moment to get good codegen from 2d vector.transfer
ops that aim to compile to SIMD load/store instructions but that can
only do so if the whole 2d transfer shape is handled in one piece, in
particular taking advantage of the memref being contiguous rowmajor.

For instance, if the target architecture has 128bit SIMD then we would
expect that contiguous row-major transfers of <4x4xi8> map to one SIMD
load/store instruction each.

The current generic lowering of multi-dimensional vector.transfer ops
can't achieve that because it peels dimensions one by one, so a transfer
of <4x4xi8> becomes 4 transfers of <4xi8>.

The new patterns here are only enabled for now by
 -test-vector-transfer-flatten-patterns.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114993
2021-12-13 22:39:41 +00:00
Ethan Stewart d1327f8a57 [clang][amdgpu] - Choose when to promote VarDecl to address space 4.
There are instances where clang codegen creates stores to
address space 4 in ctors, which causes a crash in llc.
This store was being optimized out at opt levels > 0.

For example:

pragma omp declare target
static  const double log_smallx = log2(smallx);
pragma omp end declare target

This patch ensures that any global const that does not
have constant initialization stays in address space 1.

Note - a second patch is in the works where all global
constants are placed in address space 1 during
codegen and then the opt pass InferAdressSpaces
will promote to address space 4 where necessary.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D115661
2021-12-13 16:31:24 -06:00
Simon Atanasyan 2de9338587 [MIPS] Allow i1 values for 'r' constraint in inline-asm
The bug was reported in the issue #52638.
2021-12-14 01:19:34 +03:00
Noah Shutty fb6b103daa [lld] Replace Symbolize.h with DIContext.h in lld's COFF lib
lld only needs DIContext.h which it gets through Symbolize.h -> SymbolizableModule.h -> DIContext.h. This replaces it with a direct include of DIContext.h to avoid any confusion and pulling in unnecessary headers.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D115659
2021-12-13 22:16:41 +00:00
Neumann Hon ffad4d777b [z/OS] Implement prologue and epilogue generation for z/OS target.
This patch adds support for prologue and epilogue generation for
the z/OS target under the XPLINK64 ABI for functions with a stack
size of less than 1048576 bytes (huge stack frames).

Reviewed by: uweigand, Kai

Differential Revision: https://reviews.llvm.org/D114457
2021-12-13 17:03:23 -05:00
Michał Górny fd0b00b5c6 [clang] [unitttests] Fix linking Basic test to LLVMTestingSupport
Link BasicTests via explicit target_link_libraries() rather than
clang_target_link_libraries() in order to fix linking when building
clang against libclang-cpp.  The latter requires all listed libraries
to be part of libclang-cpp and omits them if libclang-cpp is used.
However, LLVMTestingSupport is not part of libclang-cpp, so omitting it
causes undefined symbols.  Link to the library explicitly to follow suit
with the 7 other unittest programs.

Differential Revision: https://reviews.llvm.org/D115580
2021-12-13 23:00:31 +01:00
Benoit Jacob 0aea49a730 [mlir][Vector] Patterns flattening vector transfers to 1D
This is the first part of https://reviews.llvm.org/D114993 which has been
split into small independent commits.

This is needed at the moment to get good codegen from 2d vector.transfer
ops that aim to compile to SIMD load/store instructions but that can
only do so if the whole 2d transfer shape is handled in one piece, in
particular taking advantage of the memref being contiguous rowmajor.

For instance, if the target architecture has 128bit SIMD then we would
expect that contiguous row-major transfers of <4x4xi8> map to one SIMD
load/store instruction each.

The current generic lowering of multi-dimensional vector.transfer ops
can't achieve that because it peels dimensions one by one, so a transfer
of <4x4xi8> becomes 4 transfers of <4xi8>.

The new patterns here are only enabled for now by
 -test-vector-transfer-flatten-patterns.

Reviewed By: nicolasvasilache
2021-12-13 21:49:04 +00:00
Stella Laurenzo c10995a8ad Re-apply [NFC] Generalize a couple of passes so they can operate on any FunctionLike op.
* Generalizes passes linalg-detensorize, linalg-fold-unit-extent-dims, convert-elementwise-to-linalg.
* I feel that more work could be done in the future (i.e. make FunctionLike into a proper OpInterface and extend actions in dialect conversion to be trait based), and this patch would be a good record of why that is useful.
* Note for downstreams:
  * Since these passes are now generic, they do not automatically nest with pass managers set up for implicit nesting.
  * The Detensorize pass must run on a FunctionLike, and this requires explicit nesting.
* Addressed missed comments from the original and per-suggestion removed the assert on FunctionLike in ElementwiseToLinalg and DropUnitDims.cpp, which also is what was causing the integration test to fail.

This reverts commit aa8815e42e.

Differential Revision: https://reviews.llvm.org/D115671
2021-12-13 13:33:00 -08:00
Shilei Tian aa0981ba86 Revert "[LTO] Add a function `LTOCodeGenerator::getMergedModule`"
This reverts commit 61051e42c2.
2021-12-13 16:31:22 -05:00
Shilei Tian d6449d0d08 Revert "[NFC][Clang][OpenMP] Use switch-case statement to process clauses of atomic directive"
This reverts commit 5c23acbc02.
2021-12-13 16:31:04 -05:00
John Ericson 5f7afa9607 Simplify AddSphinxTarget.cmake by just including `GNUInstallDirs`
See the discussion in D30906 for how it must be robust to downstream
projects that might not use `GNUInstallDirs`.

I think an easier approach is just to include `GNUInstallDirs` so that
we can always rely on it. Looking at its definition in
https://gitlab.kitware.com/cmake/cmake/-/blob/master/Modules/GNUInstallDirs.cmake
it appears safe to include multiple times.

I am trying this out because we will face the same problem many times
over if we use `GNUInstallDirs` more widely, as proposed in D99484 and
its parent revisions, since we do not know what downstream projects do
and rather not break them.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D115601
2021-12-13 21:27:39 +00:00
Fangrui Song a6a07a514b [MachineOutliner] Don't outline functions starting with PATCHABLE_FUNCTION_ENTER/FENTRL_CALL
MachineOutliner may outline a "patchable-function-entry" function whose body has
a TargetOpcode::PATCHABLE_FUNCTION_ENTER MachineInstr. This is incorrect because
the special code sequence must stay unchanged to be used at run-time.
Avoid outlining PATCHABLE_FUNCTION_ENTER. While here, avoid outlining FENTRY_CALL too
(which doesn't reproduce currently) to allow phase ordering flexibility.

Fixes #52635

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D115614
2021-12-13 13:24:29 -08:00
Jason Molenda f2120328e8 Add support for a "load binary" LC_NOTE in mach-o corefiles
Add lldb support for a Mach-O "load binary" LC_NOTE which provides
a UUID, load address/slide, and possibly a name of a binary that
should be loaded when examining the core.

struct load_binary
{
    uint32_t version;        // currently 1
    uuid_t   uuid;           // all zeroes if uuid not specified
    uint64_t load_address;   // virtual address where the macho is loaded, UINT64_MAX if unavail
    uint64_t slide;          // slide to be applied to file address to get load address, 0 if unavail
    char     name_cstring[]; // must be nul-byte terminated c-string, '\0' alone if name unavail
} __attribute__((packed));

Differential Revision: https://reviews.llvm.org/D115494
rdar://85069250
2021-12-13 13:21:56 -08:00
Shilei Tian 5c23acbc02 [NFC][Clang][OpenMP] Use switch-case statement to process clauses of atomic directive
This patch makes the process of clauses of atomic directive more clear
and preparation for the support for `atomic compare capture`.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D115586
2021-12-13 16:20:10 -05:00
Adrian Prantl b1ef247d05 add missing textual header 2021-12-13 13:19:26 -08:00