Commit Graph

108774 Commits

Author SHA1 Message Date
Chandler Carruth 64d376a8fa Switch all local code and comments from '[Ii]nstantiat(ion|ed)' to
'[Ee]xpan(sion|ded)' in the TextDiagnosticPrinter.

No functionality changed.

llvm-svn: 135136
2011-07-14 08:20:31 +00:00
Chandler Carruth cd7a02ec1b Switch the diagnostic messages about macros to use the terms 'expanded'
and 'expansions' rather than 'instantiated' and 'contexts'.

This is the first of several patches migrating Clang's terminology
surrounding macros from 'instantiation' to 'expansion'.

llvm-svn: 135135
2011-07-14 08:20:28 +00:00
Ted Kremenek ba84cf53bc Reapply r135075, but modify format-strings.c and format-strings-fixit.c test cases to be more portable with an explicit target triple.
llvm-svn: 135134
2011-07-14 06:49:52 +00:00
Eric Christopher 0c666b4664 Add a testcase for r135123.
Part of rdar://9761830

llvm-svn: 135133
2011-07-14 06:23:09 +00:00
Chris Lattner e71ccde249 add C api for hte new type system rewrite API. Patch by Vitaly Lugovskiy!
llvm-svn: 135132
2011-07-14 05:53:17 +00:00
Evan Cheng c7ac690ba2 Unfortunately several files in MC are badly violating layering rule by using
TargetAsmInfo, which in turn pulls in TargetRegisterInfo, etc. :-( There are
other cases of violations, but this is probably the worst.

This patch is but one small step towards fixing this. 500 more steps to go. :-(

llvm-svn: 135131
2011-07-14 05:43:07 +00:00
Jakob Stoklund Olesen a153ca5885 Reapply r135121 with a fixed copy constructor.
Original commit message:

Count references to interference cache entries.

Each InterferenceCache::Cursor instance references a cache entry. A
non-zero reference count guarantees that the entry won't be reused for a
new register.

This makes it possible to have multiple live cursors examining
interference for different physregs.

The total number of live cursors into a cache must be kept below
InterferenceCache::getMaxCursors().

Code generation should be unaffected by this change, and it doesn't seem
to affect the cache replacement strategy either.

llvm-svn: 135130
2011-07-14 05:35:11 +00:00
NAKAMURA Takumi 91d831bc2d Revert r135075, "format string checking: long and int have the same widths on 32-bit, so we shouldn't warn about using"
It fails on freebsd, mingw and msvc10.

llvm-svn: 135129
2011-07-14 05:16:18 +00:00
Douglas Gregor 5cf0e1534a Add a hackaround to avoid the crash in PR10355. However, our recovery
is still terrible here because typo correction is not behaving well in
the presence of overloaded functions.

llvm-svn: 135128
2011-07-14 04:54:23 +00:00
Devang Patel d5234bbced Simplify.
llvm-svn: 135127
2011-07-14 01:52:45 +00:00
Benjamin Kramer 15cd5a3f12 Don't emit a bit test if there is only one case the test can yield false. A simple SETNE is sufficient.
llvm-svn: 135126
2011-07-14 01:38:42 +00:00
Howard Hinnant 93a16c0f37 http://llvm.org/bugs/show_bug.cgi?id=10353
llvm-svn: 135125
2011-07-14 01:34:46 +00:00
Devang Patel 07d61edc30 Simplify and delay extracting DebugLoc elements, scope and InlinedAt, as much as possible.
llvm-svn: 135124
2011-07-14 01:14:57 +00:00
Eric Christopher d6300d2956 Add a dag combine pattern for folding C2-(A+C1) -> (C2-C1)-A
Fixes rdar://9761830

llvm-svn: 135123
2011-07-14 01:12:15 +00:00
Jakob Stoklund Olesen 1d4badae74 Revert r135121 which broke a gcc-4.2 builder.
llvm-svn: 135122
2011-07-14 00:58:38 +00:00
Jakob Stoklund Olesen c270cb6e94 Count references to interference cache entries.
Each InterferenceCache::Cursor instance references a cache entry. A
non-zero reference count guarantees that the entry won't be reused for a
new register.

This makes it possible to have multiple live cursors examining
interference for different physregs.

The total number of live cursors into a cache must be kept below
InterferenceCache::getMaxCursors().

Code generation should be unaffected by this change, and it doesn't seem
to affect the cache replacement strategy either.

llvm-svn: 135121
2011-07-14 00:31:14 +00:00
Eli Friedman bc2ae1c865 Fix up assertion in r135018 so it doesn't trigger on 32-bit; when we're in 32-bit, it doesn't matter whether the operation overflows because the computed address is not wider than the immediate.
llvm-svn: 135120
2011-07-14 00:22:31 +00:00
Jim Grosbach e6f8b1fac6 ARM tests for EOR instruction parsing and encoding.
llvm-svn: 135119
2011-07-14 00:22:21 +00:00
Devang Patel e07ebe32bf Simplify. Compile unit check inside hasValidLocation() did not add any value.
llvm-svn: 135118
2011-07-14 00:20:24 +00:00
Jim Grosbach f34e35da1c Remove duplicate tests.
llvm-svn: 135117
2011-07-14 00:19:19 +00:00
Jim Grosbach a0958d7abf ARM Assembler support for DSB instruction.
Add instalias for default 'sy' option. Add tests.

llvm-svn: 135116
2011-07-14 00:18:13 +00:00
Argyrios Kyrtzidis e2e40b4dc7 [arcmt] Make sure migrating to ARC works even if '-fobjc-arc' is included in command-line flags. rdar://9567824
llvm-svn: 135115
2011-07-14 00:17:54 +00:00
Johnny Chen fa181f4fdb Add some more docstrings (includng example usages) to SBTarget.h.
Add logic to modify-python-lldb to correct swig's transformation of 'char **argv' and 'char **envp'
to 'char argv' and 'char envp' by morphing them into the 'list argv' and 'list envp' (as a list of
Python strings).

llvm-svn: 135114
2011-07-14 00:17:49 +00:00
Jakob Stoklund Olesen d7e9937175 Reapply r135074 and r135080 with a fix.
The cache entry referenced by the best split candidate could become
clobbered by an unsuccessful candidate.

The correct fix here is to use reference counts on the cache entries.
Coming up.

llvm-svn: 135113
2011-07-14 00:17:10 +00:00
Jim Grosbach 56a20a492b DMB instalias needs the same predicate as the instruction.
llvm-svn: 135112
2011-07-14 00:10:26 +00:00
Devang Patel a9195bcff0 Fix typo in DEBUG message.
llvm-svn: 135111
2011-07-14 00:04:53 +00:00
Devang Patel 2cce0d103d Add DEBUG messages.
llvm-svn: 135110
2011-07-14 00:03:58 +00:00
Jim Grosbach 44c3f08e85 ARM Assembler support for DMB instruction.
Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".

llvm-svn: 135109
2011-07-13 23:40:38 +00:00
Johnny Chen 3fe166dfd3 Add some more docstrings for SBTarget.
llvm-svn: 135108
2011-07-13 23:35:33 +00:00
Jim Grosbach 199b683a6e Update comments. These are for assembler, too.
llvm-svn: 135107
2011-07-13 23:33:10 +00:00
Owen Anderson 651b230ca0 Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits.
llvm-svn: 135106
2011-07-13 23:22:26 +00:00
Johnny Chen 97ef3fc5bf Use %feature("docstring") for methods of SBModule class so that the methods signature also gets generated in the Python docstring.
llvm-svn: 135105
2011-07-13 23:17:13 +00:00
John McCall 7c3ed3d0c5 Document the behavior of property modifiers in ARC.
rdar://problem/9768338

llvm-svn: 135104
2011-07-13 23:15:32 +00:00
Bill Wendling d11ea81db0 Add code to handle a "frameless" unwind stack.
The frameless unwind stack has a special encoding, the algorithm for which is in
"permuteEncode".

llvm-svn: 135103
2011-07-13 23:03:31 +00:00
Jim Grosbach 507ba77465 ARM Assembler support for DBG instruction.
Add range checking and testing for parsing and encoding of DBG instruction.

llvm-svn: 135102
2011-07-13 22:59:38 +00:00
Richard Smith 48d2464c3f PR8800: When building a conversion to A& using a member operatorA&(), do not require A to be a complete type.
llvm-svn: 135101
2011-07-13 22:53:21 +00:00
Johnny Chen 13ea11afde Modify the test script to better handle the different inlining behaviors of
clang/gcc/llvm-gcc.  If the first breakpoint is due to stop at an inlined
frame, test that the call site corresponds to where it should be.  Also add
an expecr for a second break stop, if the first break stop corresponds to an
inlined call frame #0.

rdar://problem/9741470

llvm-svn: 135100
2011-07-13 22:34:29 +00:00
Bruno Cardoso Lopes 3c4d652210 We already support 256-bit packed ADD, SUB, DIV, MUL. Add testcases.
llvm-svn: 135099
2011-07-13 22:28:55 +00:00
Jim Grosbach 307de01867 ARM parsing and encoding tests for CMN/CMP.
llvm-svn: 135098
2011-07-13 22:26:58 +00:00
David Greene 9908c17666 struct Init -> class Init
Rename struct Init to class Init for consistency and in preparation
for making Init a FoldingSetNode.

llvm-svn: 135097
2011-07-13 22:25:51 +00:00
Jakob Stoklund Olesen fae30b240b Revert r135074 and r135080. They broke clamscan.
llvm-svn: 135096
2011-07-13 22:20:09 +00:00
Jim Grosbach 9559d360e5 Shuffle ARM assembly tests a bit.
llvm-svn: 135095
2011-07-13 22:19:10 +00:00
Jim Grosbach c5b4019a0d Revert 135093. Think-o.
llvm-svn: 135094
2011-07-13 22:06:11 +00:00
Jim Grosbach ccc207773d Correct range for thumb co-processor immediate
llvm-svn: 135093
2011-07-13 22:03:11 +00:00
Jim Grosbach 31756c2283 Range checking for CDP[2] immediates.
llvm-svn: 135092
2011-07-13 22:01:08 +00:00
Bruno Cardoso Lopes 98154a76fd Reapply r134946 with fixes. Tested on Benjamin testcase and other test-suite failures.
llvm-svn: 135091
2011-07-13 21:58:55 +00:00
Douglas Gregor ad69e65a39 Add 'mutable' to the function declarator chunk, to be used when
parsing lambda expressions, from John Freeman!

llvm-svn: 135090
2011-07-13 21:47:47 +00:00
Bruno Cardoso Lopes 9613b64916 Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A more
general version of X86ISD::ANDNP also opened the room for a little bit
of refactoring.

llvm-svn: 135088
2011-07-13 21:36:51 +00:00
Bruno Cardoso Lopes 7ba479d22f The target specific node PANDN name is misleading. That happens because
it's later selected to a ANDNPD/ANDNPS instruction instead of the PANDN
instruction. Rename it.

llvm-svn: 135087
2011-07-13 21:36:47 +00:00
Douglas Gregor 385cfc073e Fix an incorrect namespace typo-correction diagnostic, from Kaelyn
Uhrain! Fixes PR10318.

llvm-svn: 135086
2011-07-13 21:36:26 +00:00