Commit Graph

273588 Commits

Author SHA1 Message Date
Benjamin Kramer 3f8c1189c7 Make more constructors constexpr or use =default.
This lets the compiler reason about the type more easily. No
functionality change intended.

llvm-svn: 315180
2017-10-08 15:59:35 +00:00
Amara Emerson 1f83777bd3 [AArch64][GlobalISel] Add a test case for G_PHI of p0 instruction selection.
llvm-svn: 315179
2017-10-08 15:29:35 +00:00
Amara Emerson e205cab66f [AArch64][GlobalISel] Add a test case for G_PHI of p0 regbank selection.
llvm-svn: 315178
2017-10-08 15:29:31 +00:00
Amara Emerson 1cd89ca669 [AArch64][GlobalISel] Make G_PHI of p0 types legal.
Differential Revision: https://reviews.llvm.org/D38621

llvm-svn: 315177
2017-10-08 15:29:11 +00:00
Simon Pilgrim 6410ca70aa [X86][XOP] Add XOP oddshuffles tests
XOP codegen is often different to generic AVX - thank you vpperm!

llvm-svn: 315176
2017-10-08 12:58:15 +00:00
Gadi Haber 684944b822 [X86][SKX] Adding the scheduling information for the SKX target.
Adding the scheduling information for the SkylakeServer (SKX) target.

This patch adds the instruction scheduling information for the SkylakeServer (SKX) architecture target by adding the file X86SchedSkylakeServer.td located under the X86 Target.
We used the scheduling information retrieved from the Skylake architects in order to create the file.
The scheduling information includes latency, number of micro-Ops and used ports by each SKL instruction.

The patch continues the scheduling replacement and insertion effort started with the SNB target in r310792, the HSW target in r311879 and the SkylakeClient (SKL) target in rL313613.

Please expect some performance fluctuations due to code alignment effects.

Reviewers: zvi, RKSimon, craig.topper, chandlerc, aymanmu
Differential Revision: https://reviews.llvm.org/D38443

Change-Id: I5c228fcc09e9e5a99b6116e62b356c4f9b971185
llvm-svn: 315175
2017-10-08 12:52:54 +00:00
Ayman Musa 1170deb9c8 [X86] Add missing entries in 'MemoryFoldTable2Addr' to get complete form of the table.
Get the folding table 'MemoryFoldTable2Addr' to a complete state as part of the process explained in https://reviews.llvm.org/D38028

Differential Revision: https://reviews.llvm.org/D38500

llvm-svn: 315174
2017-10-08 09:46:50 +00:00
Ayman Musa 993339b941 [X86][TableGen] Recommitting the X86 memory folding tables TableGen backend while disabling it by default.
After the original commit ([[ https://reviews.llvm.org/rL304088 | rL304088 ]]) was reverted, a discussion in llvm-dev was opened on 'how to accomplish this task'.
In the discussion we concluded that the best way to achieve our goal (which is to automate the folding tables and remove the manually maintained tables) is:

 # Commit the tablegen backend disabled by default.

 # Proceed with an incremental updating of the manual tables - while checking the validity of each added entry.

 # Repeat previous step until we reach a state where the generated and the manual tables are identical. Then we can safely remove the manual tables and include the generated tables instead.

 # Schedule periodical (1 week/2 weeks/1 month) runs of the pass:

   - if changes appear (new entries):
      - make sure the entries are legal
      - If they are not, mark them as illegal to folding
   - Commit the changes (if there are any).

CMake flag added for this purpose is "X86_GEN_FOLD_TABLES". Building with this flags will run the pass and emit the X86GenFoldTables.inc file under build/lib/Target/X86/ directory which is a good reference for any developer who wants to take part in the effort of completing the current folding tables.

Differential Revision: https://reviews.llvm.org/D38028

llvm-svn: 315173
2017-10-08 09:20:32 +00:00
Craig Topper bbca2f2978 [X86] Stop LowerSIGN_EXTEND_AVX512 from creating v8i16/v16i16/v16i8 vselects with a v8i1/v16i1 condition when BWI is not available.
Some of the tests in vector-shuffle-v1.ll would get into an infinite loop without this.

llvm-svn: 315172
2017-10-08 08:50:59 +00:00
Ayman Musa 5fc6dc58d7 [X86] Add new attribute to X86 instructions to enable marking them as "not memory foldable"
This attribute will be used in a tablegen backend that generated the X86 memory folding tables which will be added in a future pass.
Instructions with this attribute unset will be excluded from the full set of X86 instructions available for the pass.

Differential Revision: https://reviews.llvm.org/D38027

llvm-svn: 315171
2017-10-08 08:32:56 +00:00
Jan Vesely beb6591753 ldexp: Fix double precision function return type
Fixes ~1200 external calls from nvtpx library.

Reviewer: Jeroen Ketema
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 315170
2017-10-08 06:56:14 +00:00
Rui Ueyama e03ba02348 Rename ignoreInterpSection -> needsInterpSection.
This should improve consistency. Also added comment.

llvm-svn: 315169
2017-10-08 03:52:15 +00:00
Rui Ueyama 0ae2c24c5d Use llvm::Optional instead of UINT_MAX to represent a null value.
llvm-svn: 315168
2017-10-08 03:45:49 +00:00
Rui Ueyama 656be31174 Make a helper function a non-member function. NFC.
llvm-svn: 315167
2017-10-08 02:54:42 +00:00
Rui Ueyama 872235743d Use llvm::Optional instead of a magic number -1 to represent "no result".
llvm-svn: 315166
2017-10-08 02:44:08 +00:00
Rui Ueyama 617e2f98a0 Make ScriptParser::checkSection a non-member function.
This patch also make its return type to `void` because
it always returns a given value as-is.

llvm-svn: 315165
2017-10-08 02:27:02 +00:00
Rui Ueyama 9b18f50f79 Remove a trivial function.
llvm-svn: 315164
2017-10-08 02:06:03 +00:00
Rui Ueyama e8936bca72 Add comment.
llvm-svn: 315163
2017-10-08 01:55:29 +00:00
Craig Topper 9563cab961 [X86] Simplify some code in getInsertVINSERTImmediate and getExtractVEXTRACTImmediate. NFC
Replace one of the divides with a multiply.

llvm-svn: 315162
2017-10-08 01:33:42 +00:00
Craig Topper 27170fee8d [X86] If we see an insert of a bitcast into zero vector, canonicalize it to move the bitcast to the other side of the insert.
This improves detection of zeroing of upper bits during isel.

llvm-svn: 315161
2017-10-08 01:33:41 +00:00
Craig Topper f7a19db649 [X86] Remove ISD::INSERT_SUBVECTOR handling from combineBitcastForMaskedOp. Add isel patterns to make up for it.
This will allow for some flexibility in canonicalizing bitcasts around insert_subvector.

llvm-svn: 315160
2017-10-08 01:33:40 +00:00
Craig Topper 16f2044fa8 [X86] Use getConstantOperandVal to simplify some code. NFC
llvm-svn: 315159
2017-10-08 01:33:38 +00:00
Rui Ueyama 10f5867135 Remove redundant initialization code.
llvm-svn: 315158
2017-10-08 00:45:34 +00:00
Vedant Kumar 2465e64846 cmake: Fix one more usage of append()
append() isn't available with some cmake versions, so I need to use a
different construct. I missed this case in r315144.

http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA/39355

llvm-svn: 315157
2017-10-07 20:20:42 +00:00
Simon Pilgrim 9508fe7924 [X86][SSE] Match bitcasted BUILD_VECTOR of constants for v2i64 shifts on 64-bit targets (PR34855)
Extension to rL315155, generate constant shifts on 64-bits as well as 32-bits.

llvm-svn: 315156
2017-10-07 17:57:22 +00:00
Simon Pilgrim 70e1db78db [X86][SSE] Match bitcasted v4i32 BUILD_VECTORS for v2i64 shifts on 64-bit targets (PR34855)
We were already doing this for 32-bit targets, but we can generate these on 64-bits as well.

llvm-svn: 315155
2017-10-07 17:42:17 +00:00
Craig Topper 90b76211d3 [SelectionDAG} Use KnownBits::isUnknown and hasConflict. NFC
llvm-svn: 315154
2017-10-07 17:07:48 +00:00
Craig Topper 2f60295364 [X86] Add X86ISD::CMOV to computeKnownBitsForTargetNode and ComputeNumSignBitsForTargetNode.
Summary: Implementations based on ISD::SELECT.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38663

llvm-svn: 315153
2017-10-07 16:51:19 +00:00
Sanjay Patel 865e6c852b [InstSimplify] add tests to show we can do better at folding poison; NFC
llvm-svn: 315152
2017-10-07 15:39:06 +00:00
Simon Pilgrim b021b13aac [TableGen] Avoid repeated find calls in CodeGenDAGPatterns getters. NFCI.
The assertion tests were using count() instead of testing the find result, resulting in double the number of searches in debug/assert builds.

Instead, call find once (like the release builds do) and assert the result against end().

llvm-svn: 315151
2017-10-07 14:34:24 +00:00
Simon Pilgrim 73f143e774 [X86][SSE] Improve shuffling combining with horizontal operations
Recognise cases when we can merge the shuffles with their horizontal (HADD/HSUB/PACK) instruction inputs.

Replaces an older implementation which performed some of this during lowering, expanding an existing target shuffle combine stage instead.

Differential Revision: https://reviews.llvm.org/D38506

llvm-svn: 315150
2017-10-07 12:42:23 +00:00
Simon Pilgrim a3aa724fb7 Fix signed/unsigned warning
llvm-svn: 315149
2017-10-07 12:24:10 +00:00
Simon Pilgrim 5e030f9cdc [TableGen] Avoid unnecessary std::string creations
Avoid unnecessary std::string creations in the TreePredicateFn getters and in CodeGenDAGPatterns::getSDNodeNamed

Differential Revision: https://reviews.llvm.org/D38624

llvm-svn: 315148
2017-10-07 12:08:43 +00:00
Jeroen Ketema e428528c4b Delete empy directory
llvm-svn: 315147
2017-10-07 09:10:44 +00:00
Martin Storsjo 5e9d482b0a [X86] Update an outdated comment about SjLj
The SjLj intrinsics in the X86 backend are intended for use with
SjLj exception handling as well, since SVN r271244.

Differential Revision: https://reviews.llvm.org/D38532

llvm-svn: 315146
2017-10-07 06:00:32 +00:00
Craig Topper e79eff3bb5 [X86] Correct result type for the flag result of RDSEED and RDRAND nodes. Correct the CC type for the CMOV used with RDSEED/RDRAND.
The flag result was MVT::Glue, but should be MVT::i32. The CC type was MVT::i8, but should be MVT::i32.

llvm-svn: 315145
2017-10-07 05:11:59 +00:00
Vedant Kumar 16d41609ab Use list(APPEND) instead of append()
append() seems to be available with the version of cmake I'm using, but
not on the bots:

http://green.lab.llvm.org/green//job/clang-stage1-configure-RA/39354

llvm-svn: 315144
2017-10-07 03:44:46 +00:00
Vedant Kumar 074a997b13 [ubsan] Add a static runtime on Darwin
As a follow-up to r315142, this makes it possible to use ubsan with a
static runtime on Darwin. I've also added a new StandaloneStatic testing
configuration so the new setup can be tested.

llvm-svn: 315143
2017-10-07 01:46:36 +00:00
Vedant Kumar 358d642f65 [Driver] Fix -static-libsan / -shared-libsan on Darwin
Don't ignore these flags on Darwin. The old behavior of using the
dynamic runtime when neither flag is passed is preserved.

llvm-svn: 315142
2017-10-07 01:42:09 +00:00
Rafael Espindola 8bd0c45c7a Inline small function. NFC.
llvm-svn: 315141
2017-10-07 01:08:28 +00:00
Rui Ueyama 8befefb2ea Remove OutputSection::updateAlignment.
I feel it is easier to understand without this function.

llvm-svn: 315140
2017-10-07 00:58:34 +00:00
Rui Ueyama c8e0f79b90 Clarify code by adding a comment.
llvm-svn: 315139
2017-10-07 00:58:19 +00:00
Rui Ueyama 0e2bfb1e3b Merge addInputSec with OutputSection::addSection.
Previously, when we added an input section to an output section, we
called `OutputSectionFactory::addInputSec`. This isn't a good design
because, a factory class is intended to create a new object and
return it, but in this use case, it will never create a new object.
This patch fixes the design flaw.

llvm-svn: 315138
2017-10-07 00:43:31 +00:00
Rui Ueyama 850b554399 Return early. NFC.
llvm-svn: 315137
2017-10-07 00:22:59 +00:00
Jessica Paquette 13593843f6 [MachineOutliner] Disable outlining from LinkOnceODRs by default
Say you have two identical linkonceodr functions, one in M1 and one in M2.
Say that the outliner outlines A,B,C from one function, and D,E,F from another
function (where letters are instructions). Now those functions are not
identical, and cannot be deduped. Locally to M1 and M2, these outlining
choices would be good-- to the whole program, however, this might not be true!

To mitigate this, this commit makes it so that the outliner sees linkonceodr
functions as unsafe to outline from. It also adds a flag,
-enable-linkonceodr-outlining, which allows the user to specify that they
want to outline from such functions when they know what they're doing.

Changing this handles most code size regressions in the test suite caused by
competing with linker dedupe. It also doesn't have a huge impact on the code
size improvements from the outliner. There are 6 tests that regress > 5% from
outlining WITH linkonceodrs to outlining WITHOUT linkonceodrs. Overall, most
tests either improve or are not impacted.

Not outlined vs outlined without linkonceodrs:
https://hastebin.com/raw/qeguxavuda

Not outlined vs outlined with linkonceodrs:
https://hastebin.com/raw/edepoqoqic

Outlined with linkonceodrs vs outlined without linkonceodrs:
https://hastebin.com/raw/awiqifiheb

Numbers generated using compare.py with -m size.__text. Tests run for AArch64
with -Oz -mllvm -enable-machine-outliner -mno-red-zone.

llvm-svn: 315136
2017-10-07 00:16:34 +00:00
Jason Molenda c1b1655871 Remove the input file specification from the
"Prepare Swig Bindings" shell script phase; it
wasn't the actual input file and could lead
to incorrect dependency analysis by the build
system.
<rdar://problem/34751196> 

llvm-svn: 315135
2017-10-07 00:13:10 +00:00
Rui Ueyama b4175edf16 Remove unused parameters.
llvm-svn: 315133
2017-10-07 00:08:30 +00:00
Evgeniy Stepanov 729bcd1f6e [asan] Disable wcslen test on 32-bit Android.
llvm-svn: 315132
2017-10-07 00:04:24 +00:00
Rui Ueyama cc6738a439 Use error() instead of warn() to report undefined symbols.
I believe the reason why we used warn() instead of error() to report
undefined symbols is because the older implementation of error() exitted
immediately. Here, we want to find as many undefined symbols as we can,
so I chose to use warn() instead of error().

Now error() does not exit immediately, so it doesn't make sense to keep
them as warnings.

Differential Revision: https://reviews.llvm.org/D38652

llvm-svn: 315131
2017-10-06 23:43:54 +00:00
Sanjay Patel 72d339abb7 [InstCombine] use correct type when propagating constant condition in simplifyDivRemOfSelectWithZeroOp (PR34856)
llvm-svn: 315130
2017-10-06 23:43:06 +00:00