4 Commits

Author	SHA1	Message	Date
Peter Smith	353a2286e2	[ARM] Incorrect relocation type for Thumb2 B<cond>.w ... The Thumb2 conditional branch B<cond>.W has a different encoding (T3) to the unconditional branch B.W (T4) as it needs to record <cond>. As the encoding is different the B<cond>.W is given a different relocation type. ELF for the ARM Architecture 4.6.1.6 (Table-13) states that R_ARM_THM_JUMP19 should be used for B<cond>.W. At present the MC layer is using the R_ARM_THM_JUMP24 from B.W. This change makes B<cond>.W use R_ARM_THM_JUMP19 and alters the existing test that checks for R_ARM_THM_JUMP24 to expect R_ARM_THM_JUMP19. llvm-svn: 271997	2016-06-07 10:34:33 +00:00
Colin LeMahieu	efe3732883	Revert r265817 ... lld tests need to be addressed. llvm-svn: 265822	2016-04-08 18:15:37 +00:00
Colin LeMahieu	4a1975ba8e	[llvm-objdump] Printing hex instead of dec by default ... Differential Revision: http://reviews.llvm.org/D18770 llvm-svn: 265817	2016-04-08 17:55:03 +00:00
Tim Northover	42335572bb	ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available. ... After recognising that a certain narrow instruction might need a relocation to be represented, we used to unconditionally relax it to a Thumb2 instruction to permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2 instructions, so we end up emitting a completely invalid instruction. Theoretically, ELF does have relocations for these situations; but they are fairly unusable with such short ranges and the ABI document even says they're documented "for completeness". So an error is probably better there too. rdar://20391953 llvm-svn: 234195	2015-04-06 18:44:42 +00:00