Commit Graph

3785 Commits

Author SHA1 Message Date
Wolfgang Pieb 002df71dd3 Correcting the previous fix for test submitted with r275115.
llvm-svn: 275128
2016-07-11 23:27:19 +00:00
Wolfgang Pieb c72930dba5 Fix test submitted with r275115 (failed on ppc64 buildbots).
llvm-svn: 275127
2016-07-11 23:20:28 +00:00
Wolfgang Pieb 5675c96987 Prevent the creation of empty (forwarding) blocks resulting from nested ifs.
Summary:
Nested if statements can generate empty BBs whose terminator branches 
unconditionally to its successor. These branches are not eliminated
to help generate better line number information in some cases, but there
is no reason to keep the empty blocks that result from nested ifs.

Reviewers: mehdi_amini, dblaikie, echristo

Subscribers: mehdi_amini, cfe-commits

Differential review: http://reviews.llvm.org/D11360
 

llvm-svn: 275115
2016-07-11 22:22:23 +00:00
Craig Topper 4d61a3c2d8 [AVX512] Replace masked AND/OR/XOR intrinsics with native code and remove the builtins.
llvm-svn: 275049
2016-07-11 06:14:18 +00:00
Hal Finkel 9a17d7ac6e Revert r275029 - Update Clang tests after adding inference for the returned argument attribute
The associated backend change is causing miscompiles from the AArch64 backend.

llvm-svn: 275043
2016-07-11 04:52:07 +00:00
Hal Finkel 617c962752 Update Clang tests after adding inference for the returned argument attribute
Adjusting tests after r275027.

llvm-svn: 275029
2016-07-10 22:26:52 +00:00
Craig Topper 6e76fb61a7 [X86] Use __butilin_shufflevector for 512-bit shufps intrinsics.
llvm-svn: 275012
2016-07-10 05:57:21 +00:00
Craig Topper 95b61b0544 [X86] Use __builtin_ia32_vec_ext_v4hi and __builtin_ia32_vec_set_v4hi to implement pextrw/pinsertw MMX intrinsics instead of trying to use native IR.
Without this we end up generating code that doesn't use mmx registers and probably doesn't work well with other mmx intrinsics.

llvm-svn: 274968
2016-07-09 05:30:41 +00:00
Craig Topper 83c65d7889 [X86] Uncomment the _mm_extract_ps test and add checks.
llvm-svn: 274965
2016-07-09 04:38:17 +00:00
Saleem Abdulrasool 0295f8ce39 CodeGen: tweak CFString section for COFF, ELF
Place the structure data into `cfstring`.  This both isolates the structures to
permit coalescing in the future (by the linker) as well as ensures that it
doesnt get marked as read-only data.  The structures themselves are not
read-only, only the string contents.

llvm-svn: 274956
2016-07-09 01:59:51 +00:00
Craig Topper a1bee4398c [X86] Remove dead builtins that don't exist in the backend intrinsic file and don't have custom handling in CGBuiltins.cpp either.
llvm-svn: 274825
2016-07-08 05:11:47 +00:00
Chad Rosier 4c077aaabb [AArch64] Change the preferred alignment for char and short.
This reinstates commits r273280 and r273289.

Original Review: http://reviews.llvm.org/D21414.

llvm-svn: 274791
2016-07-07 20:02:25 +00:00
Justin Lebar 495f1a22af [CUDA] Rename the __nvvm_bar0 builtin back to __syncthreads.
The builtin was renamed in r274770.  But __syncthreads is part of our
user-facing API, so we need to keep the name as-is.

Patch by Justin Bogner.

llvm-svn: 274780
2016-07-07 18:15:03 +00:00
Justin Bogner 2d5de7e568 NVPTX: Use the nvvm builtins to read SRegs rather than the legacy ptx ones
The ptx spellings were removed from LLVM in r274769.

llvm-svn: 274770
2016-07-07 16:41:08 +00:00
Chad Rosier 5ba1d11b5c Revert "[aarch64] Update datalayout for aarch64 tests"
This reverts commit r273289, which was a follow to r273280, which was
reverted because the change was not properly approved.

llvm-svn: 274767
2016-07-07 16:37:21 +00:00
Roger Ferrer Ibanez c487614bc0 Add negative test for TBAA
Revision r178818 added tests for TBAA but was missing negative tests to ensure
that TBAA markers are not emitted when TBAA is off.

Differential Revision: http://reviews.llvm.org/D21295

llvm-svn: 274610
2016-07-06 07:13:49 +00:00
Craig Topper 425d02d33e [X86] Use native IR for immediate values 0-7 of packed fp cmp builtins. This makes them the same as what is done when using the SSE builtins for these same encodings.
llvm-svn: 274608
2016-07-06 06:27:31 +00:00
Craig Topper 46e7555d4b [AVX512] Use the generic ctlz intrinsic to implement the vplzcntd/q builtins.
llvm-svn: 274603
2016-07-06 04:24:29 +00:00
Michael Zuckerman b920665493 [Clang][Feature] Adding CLFLUSHOPT feature and intrinsic to clang
Differential Revision: http://reviews.llvm.org/D21792

llvm-svn: 274559
2016-07-05 15:56:03 +00:00
Simon Pilgrim f5a8837e1b [X86][AVX512] Converted the VBROADCAST intrinsics to generic IR
llvm-svn: 274544
2016-07-05 12:59:33 +00:00
Asaf Badouh 136332888a [X86][AVX512F] add float/double abs intrinsics
add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic

Differential Revision: http://reviews.llvm.org/D21973

llvm-svn: 274542
2016-07-05 12:24:14 +00:00
Michael Zuckerman 7dac6fbdf8 [Clang][BuiltIn][AVX512] adding _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics
Differential Revision: http://reviews.llvm.org/D21729

llvm-svn: 274532
2016-07-05 08:08:01 +00:00
Craig Topper 2a383c9273 [X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z.
llvm-svn: 274525
2016-07-04 22:18:01 +00:00
Simon Pilgrim 427154db2a [X86][AVX512] Converted the VSHUFPD intrinsics to generic IR
llvm-svn: 274523
2016-07-04 21:30:47 +00:00
Simon Pilgrim 30db811526 [X86][AVX512] Converted the VPERMPD/VPERMQ intrinsics to generic IR
llvm-svn: 274502
2016-07-04 13:34:44 +00:00
Simon Pilgrim 17388f2569 [X86][AVX512] Converted the VPERMILPD/VPERMILPS intrinsics to generic IR
llvm-svn: 274492
2016-07-04 11:06:15 +00:00
Craig Topper ac1823f6e9 [AVX512] Modify what indices we emit for the zero vector we use for zero extension of the result of a v2i1 or v4i1 masked compare. This way we emit something that the backend easily interprets as a concatenation rather than a true shuffle. This delivers slightly better codegen with the current backend capabilities.
llvm-svn: 274484
2016-07-04 07:09:46 +00:00
Simon Pilgrim 275d721485 [X86][AVX512] Converted the MOVDDUP/MOVSLDUP/MOVSHDUP masked intrinsics to generic IR
llvm companion patch imminent

llvm-svn: 274442
2016-07-02 17:16:25 +00:00
Craig Topper b3a4477b13 [X86] Replace 128-bit and 256 masked vpermilps/vpermilpd builtins with native IR.
llvm-svn: 274425
2016-07-02 05:36:43 +00:00
Pirama Arumuga Nainar 54a213d280 Add TargetInfo for 32-bit and 64-bit RenderScript
Summary:
The TargetInfo for 'renderscript32' and 'renderscript64' ArchTypes are
subclasses of ARMleTargetInfo and AArch64leTargetInfo respectively.

RenderScript32TargetInfo modifies the ARM ABI to set LongWidth and
LongAlign to be 64-bits.  Other than this modification, the underlying
TargetInfo base classes is initialized as if they have "armv7" and
"aarch64" architecture type respectively.

Reviewers: rsmith, echristo

Subscribers: aemerson, tberghammer, cfe-commits, danalbert, mehdi_amini, srhines

Differential Revision: http://reviews.llvm.org/D21334

llvm-svn: 274409
2016-07-02 00:05:42 +00:00
Tim Shen 53547d95ca Removes CHECKs for symbolic label names (as Debug Clang will generate).
Differential Revision: http://reviews.llvm.org/D20499

llvm-svn: 274396
2016-07-01 22:50:00 +00:00
Tim Shen ff12edbff4 Remove unncessary CHECKs from r274385
llvm-svn: 274387
2016-07-01 21:16:58 +00:00
Tim Shen 421119fd89 [Temporary, Lifetime] Add lifetime marks for temporaries
With all MaterializeTemporaryExprs coming with a ExprWithCleanups, it's
easy to add correct lifetime.end marks into the right RunCleanupsScope.

Differential Revision: http://reviews.llvm.org/D20499

llvm-svn: 274385
2016-07-01 21:08:47 +00:00
Matt Arsenault f652caea65 Emit more intrinsics for builtin functions
This is important for building libclc. Since r273039 tests are failing
due to now emitting calls to these functions instead of emitting the
DAG node. The libm function names are implemented for OpenCL, and should
call the locally defined versions, so -fno-builtin is used. The IR
Some functions use the __builtins and expect the intrinsics to be
emitted. Without this we end up with nobuiltin calls to intrinsics
or to unsupported library calls.

llvm-svn: 274370
2016-07-01 17:38:14 +00:00
Michael Zuckerman 3f316abdce [Clang][Intrinsics][AVX512][BuiltIn] adding intrinsics for vrangesd instruction set
Differential Revision: http://reviews.llvm.org/D21734

llvm-svn: 274218
2016-06-30 08:05:46 +00:00
David Majnemer b4b671e4a8 [CodeView] Implement support for bitfields in Clang
Emit the underlying storage offset in addition to the starting bit
position of the field.

This fixes PR28162.

Differential Revision: http://reviews.llvm.org/D21783

llvm-svn: 274201
2016-06-30 03:01:59 +00:00
Simon Pilgrim 6350054017 [X86][SSE2] Updated tests to match llvm\test\CodeGen\X86\sse2-intrinsics-fast-isel-x86_64.ll
llvm-svn: 274126
2016-06-29 14:04:08 +00:00
Igor Breger 2c880cf9b1 [AVX512] Zero extend cmp intrinsic return value.
Differential Revision: http://reviews.llvm.org/D21746

llvm-svn: 274110
2016-06-29 08:14:17 +00:00
Artur Pilipenko 70d4bb566c Update the expected masked load/store intrinsics names in tests
The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043.

llvm-svn: 274044
2016-06-28 18:28:45 +00:00
Chris Dewhurst 7cc4cfe4fc [SPARC] Allows inlining of atomics for Sparc32 with appropriate store barrier.
The final change is required to extend the back-end's AtomicExpandPass that was implemented for Sparc (64 bit) and later extended for Sparc (32 bit).

llvm-svn: 274012
2016-06-28 12:55:55 +00:00
Asaf Badouh 57819aa185 [X86] add _mm_loadu_si64
Differential Revision: http://reviews.llvm.org/D21504

llvm-svn: 273812
2016-06-26 13:51:54 +00:00
Craig Topper 50e3dfe9d0 [X86] Fix pslldq/psrldq intrinsics to not fail compilation with immediates larger than 16. This was accidentally broken in r272246.
llvm-svn: 273775
2016-06-25 07:31:14 +00:00
Rafael Espindola 0fa668072f Add support for musl-libc on ARM Linux.
Patch by Lei Zhang!

llvm-svn: 273735
2016-06-24 21:35:06 +00:00
Peter Collingbourne 8dd14da0dc CodeGen: Update Clang to use the new type metadata.
Differential Revision: http://reviews.llvm.org/D21054

llvm-svn: 273730
2016-06-24 21:21:46 +00:00
Strahinja Petrovic 7ba5bf5dc7 Fix make-check issues
Fixing build issue for test test/CodeGen/struct-union-BE.c.

llvm-svn: 273675
2016-06-24 13:11:15 +00:00
Strahinja Petrovic 515a1eb44c This patch fixes problem with passing structures and unions
smaller than register as argument in variadic functions on
big endian architectures.
Differential Revision: http://reviews.llvm.org/D21611

llvm-svn: 273665
2016-06-24 12:12:41 +00:00
Dehao Chen bd3ed3c55b Invoke simplifycfg and sroa before instcombine.
Summary: InstCombine needs to be performed after simplifycfg and sroa, otherwise it may make bad optimization decisions.

Reviewers: davidxl, wmi, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21568

llvm-svn: 273606
2016-06-23 20:13:10 +00:00
Saleem Abdulrasool 6e9e88b30a CodeGen: support linker options on Windows ARM
We would incorrectly emit the directive sections due to the missing overridden
methods.  We now emit the expected "/DEFAULTLIB" rather than "-l" options for
requested linkage

llvm-svn: 273558
2016-06-23 13:45:33 +00:00
Craig Topper 79f53ca0b5 [AVX512] Replace masked unpack builtins with shufflevector and selects.
llvm-svn: 273533
2016-06-23 06:36:42 +00:00
Hans Wennborg 44d061a471 Add support for /Ob1 and -finline-hint-functions flags
Add support for /Ob1 (and equivalent -finline-hint-functions), which enable
inlining only for functions marked inline, either explicitly (via inline
keyword, for example), or implicitly (function definition in class body,
for example).

This works by enabling inlining pass, and adding noinline attribute to
every function not marked inline.

Patch by Rudy Pons <rudy.pons@ilod.org>!

Differential Revision: http://reviews.llvm.org/D20647

llvm-svn: 273440
2016-06-22 16:56:16 +00:00