eac5e381cc
Speculatively revert 116753 and 116756 to attempt to fix the bots.
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llvm-svn: 116777
2010-10-19 00:19:49 +00:00
49843c0162
Added a few tweaks to the Intel Descriptor-table support instructions to allow
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word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes. This is again for use just with assembly source for llvm-mc .
llvm-svn: 116773
2010-10-19 00:01:44 +00:00
eae048885d
Changed elf-dump to output hex format by default.
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Also updated tests.
llvm-svn: 116753
2010-10-18 21:32:41 +00:00
fba9f74932
Implement R_386_GOT32.
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llvm-svn: 116744
2010-10-18 20:47:21 +00:00
0a5314fdb3
Relocate with .bss instead of using the symbol. Matches gas behavior.
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llvm-svn: 116741
2010-10-18 20:25:33 +00:00
e3dc9e2ea1
Produce ELF::R_386_GOTPC relocations.
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llvm-svn: 116728
2010-10-18 18:36:12 +00:00
b9783dd9bc
Added a handful of x86-32 instructions that were missing so that llvm-mc would
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be more complete. These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files. Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added. Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records. More missing instructions will be coming.
llvm-svn: 116716
2010-10-18 17:04:36 +00:00
3521f8467d
Produce a R_386_PLT32 when needed. Moved the default cases of switches to the
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start for consistency.
llvm-svn: 116715
2010-10-18 16:58:03 +00:00
4464e0858f
Handle GOTOFF correctly on i386.
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llvm-svn: 116711
2010-10-18 16:38:04 +00:00
4262a22225
Add a MCObjectFormat class so that code common to all targets that use a
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single object format can be shared.
This also adds support for
mov zed+(bar-foo), %eax
on ELF and COFF targets.
llvm-svn: 116675
2010-10-16 18:23:53 +00:00
0d14b5b0fa
Unbreak test on non-COFF targets.
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llvm-svn: 116669
2010-10-16 11:27:13 +00:00
17990d5690
MC-COFF: Add support for default-null weak externals.
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llvm-svn: 116666
2010-10-16 08:25:57 +00:00
68a335e185
ARM mode encoding information for UBFX and SBFX instructions.
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llvm-svn: 116588
2010-10-15 17:15:16 +00:00
fbcf0db7ee
Refactor code a bit and avoid creating unnecessary entries in the string
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map.
llvm-svn: 116579
2010-10-15 15:39:06 +00:00
59351844e1
ARM instructions that are both predicated and set the condition codes
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have been printed with the "S" modifier after the predicate. With ARM's
unified syntax, they are supposed to go in the other order. We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM. Apparently we don't generate these instructions often because no one
noticed until now. Thanks to Bill Wendling for the testcase!
llvm-svn: 116563
2010-10-15 03:23:44 +00:00
0b5c743811
Simplify test file a bit.
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llvm-svn: 116540
2010-10-14 23:32:44 +00:00
89efff3763
Add testcase for RRX and ASRS (which effectively tests MOVs, since those
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are just forms of that instruction).
llvm-svn: 116538
2010-10-14 23:29:18 +00:00
eafcb27ded
MOVi16 and MOVT ARM mode encodings.
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llvm-svn: 116498
2010-10-14 18:54:27 +00:00
bee6e9f8e0
Remove some code duplication.
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llvm-svn: 116484
2010-10-14 16:34:44 +00:00
6f52f8a87d
Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on
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here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.
llvm-svn: 116471
2010-10-14 02:33:26 +00:00
0441c6cba0
Add encoding for 'fmstat'.
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llvm-svn: 116466
2010-10-14 01:19:34 +00:00
0825f3e441
- Add encodings for multiply add/subtract instructions in all their glory.
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- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.
llvm-svn: 116464
2010-10-14 01:02:08 +00:00
7e72ec6626
Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
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and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.
llvm-svn: 116432
2010-10-13 21:00:04 +00:00
f106ecfa59
Add MC encodings for VCVT* instrunctions.
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llvm-svn: 116431
2010-10-13 20:58:46 +00:00
1e7db68774
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
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llvm-svn: 116421
2010-10-13 19:56:10 +00:00
651dc7c9e9
Add ARM mode operand encoding information for ADDE/SUBE instructions.
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llvm-svn: 116412
2010-10-13 18:00:52 +00:00
6e27b4f530
Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test
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just yet.
llvm-svn: 116386
2010-10-13 01:17:33 +00:00
576fd0b110
Add encodings for VCVT instructions.
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llvm-svn: 116385
2010-10-13 00:56:35 +00:00
8c519c0d4b
Add ARM encoding information for comparisons, forced-cc-out arithmetics, and
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arithmetic-with-carry-in instructions.
llvm-svn: 116384
2010-10-13 00:50:27 +00:00
da4ddf0fcf
Add VCMPZ and VABS.
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llvm-svn: 116383
2010-10-13 00:38:07 +00:00
f9ca535495
Refactor VCMP instructions.
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llvm-svn: 116379
2010-10-13 00:04:29 +00:00
7dd8c0b991
Add encodings for VNMUL[SD].
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llvm-svn: 116375
2010-10-12 23:47:37 +00:00
a06aee826c
Add encodings for VDIV and VMUL.
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llvm-svn: 116370
2010-10-12 23:22:27 +00:00
d5f8c3350d
Be nitpicky and line up the comments.
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llvm-svn: 116365
2010-10-12 23:14:03 +00:00
646a506724
Add encoding for VSUB and VCMP.
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Fear not! I'm going to try a refactoring right now. :)
llvm-svn: 116359
2010-10-12 22:55:35 +00:00
9513a7e87f
Don't need to specify calling convention. Add 'readnone' to functions.
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llvm-svn: 116354
2010-10-12 22:24:10 +00:00
ac6cd00706
Encoding for VADDD. Plus a test for the VFP instructions.
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llvm-svn: 116348
2010-10-12 22:08:41 +00:00
6fead930af
Add encoding information for the remainder of the generic arithmetic
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ARM instructions.
llvm-svn: 116313
2010-10-12 17:11:26 +00:00
b7c2962d20
MC machine encoding for simple aritmetic instructions that use a shifted
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register operand.
llvm-svn: 116259
2010-10-11 23:16:21 +00:00
a6a984bd96
MC-COFF: Fix .bss section size. Fixes PR8335. Patch by NAKAMUTA Takumi!
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llvm-svn: 116155
2010-10-09 16:04:45 +00:00
86bbd71088
MC-COFF: Implement InitSections. Fixes PR8335.
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llvm-svn: 116151
2010-10-09 15:44:27 +00:00
c8dbdfd4ba
MC-COFF: Add COFFAsmParser. Completes PR8343.
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llvm-svn: 116150
2010-10-09 11:01:07 +00:00
c43c930690
Implement a few more binary encoding bits. Still very early stage proof-of-
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concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.
This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.
llvm-svn: 116112
2010-10-08 21:45:55 +00:00
af8b4871a8
Call InitSections in llc and clang so that the binaries produced by them
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are easier to diff with those produced by llvm-mc.
llvm-svn: 116095
2010-10-08 19:37:38 +00:00
42a07e8545
Add test file for simple ARM binary encodings with MC
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llvm-svn: 116024
2010-10-08 00:47:59 +00:00
00be34d009
MC-COFF: Add test for my last commit.
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llvm-svn: 116015
2010-10-08 00:00:28 +00:00
1666b61357
MC-COFF: Fix symbol aliases. Fixes PR8251.
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llvm-svn: 115909
2010-10-07 06:29:33 +00:00
5f2d6a5cd9
Get binding and visibility info from the the alias, but Type from the symbol
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being aliased.
llvm-svn: 115836
2010-10-06 21:02:29 +00:00
d444577382
If a symbol is global, reloc against it even if it is in a mergeable section.
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llvm-svn: 115817
2010-10-06 19:27:21 +00:00
83b2a3337f
Make sure weak symbols are listed after the local ones.
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llvm-svn: 115795
2010-10-06 16:47:31 +00:00
Eric Christopher