63849cbd32
grammar
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llvm-svn: 83483
2009-10-07 19:08:36 +00:00
3dcb5377ef
Add codegen support for NEON vst2 intrinsics with 128-bit vectors.
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llvm-svn: 83482
2009-10-07 18:47:39 +00:00
2af2253e49
add initializers for clarity. Add missing assignment of PrevLastUseOp.
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llvm-svn: 83481
2009-10-07 18:44:24 +00:00
de1cb40eb4
Remove LazyLiveness from the tree. It doesn't work right now, and I'm not going to have the time
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to finish it any time soon. If someone's interested it, they can resurrect it from SVN history.
llvm-svn: 83480
2009-10-07 18:40:17 +00:00
ab3a9474d6
Add codegen support for NEON vld4 intrinsics with 128-bit vectors.
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llvm-svn: 83479
2009-10-07 18:09:32 +00:00
2207e5fc7b
Add another bit of the ARM target assembler to llvm-mc to parse registers
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with writeback, things like "sp!", etc. Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.
llvm-svn: 83477
2009-10-07 18:01:35 +00:00
9b60992120
Replace some code for aggressive-remat with MachineInstr::isInvariantLoad, and
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teach it how to recognize invariant physical registers.
llvm-svn: 83476
2009-10-07 17:47:20 +00:00
be8137b0b4
Replace TargetInstrInfo::isInvariantLoad and its target-specific
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implementations with a new MachineInstr::isInvariantLoad, which uses
MachineMemOperands and is target-independent. This brings MachineLICM
and other functionality to targets which previously lacked an
isInvariantLoad implementation.
llvm-svn: 83475
2009-10-07 17:38:06 +00:00
db9493ce68
Add a few simple MachineVerifier checks for MachineMemOperands.
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llvm-svn: 83474
2009-10-07 17:36:00 +00:00
6bbefc2f67
Add codegen support for NEON vld3 intrinsics with 128-bit vectors.
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llvm-svn: 83471
2009-10-07 17:24:55 +00:00
99e80228a9
Rearrange code for selecting vld2 intrinsics. No functionality change.
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This is just to be more consistent with the forthcoming code for vld3/4.
llvm-svn: 83470
2009-10-07 17:23:09 +00:00
fa14dd430c
Add register-reuse to frame-index register scavenging. When a target uses
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a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.
eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.
ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.
llvm-svn: 83467
2009-10-07 17:12:56 +00:00
bcdb02587e
Do not assume that the module is set.
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llvm-svn: 83462
2009-10-07 16:37:55 +00:00
a4560bad97
Add PR to this FIXME, looks like I didn't commit this change after all.
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llvm-svn: 83457
2009-10-07 09:22:55 +00:00
986742a14f
Make getPointerTo return a const PointerType* rather than
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an unqualified PointerType* because it seems more correct.
llvm-svn: 83454
2009-10-07 07:35:19 +00:00
e666bc9f64
Add FreeInst to the "is a call" check for Insts that are calls, but
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not intrinsics.
llvm-svn: 83441
2009-10-07 00:54:08 +00:00
f8e4410994
Fix this comment. The loop header is the loop entry point.
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llvm-svn: 83437
2009-10-07 00:33:10 +00:00
75b59fb055
Add PseudoSourceValues for constpool stuff on ELF (Darwin should use something similar)
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and register spills.
llvm-svn: 83435
2009-10-07 00:06:35 +00:00
6ba26317ce
While we still have a MallocInst treat it as a call like any other
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for inlining.
When MallocInst goes away this code will be subsumed as part of
calls and work just fine...
llvm-svn: 83434
2009-10-07 00:02:18 +00:00
febe39b488
Added bits of the ARM target assembler to llvm-mc to parse some load instruction
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operands. Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts. This is a work in progress.
llvm-svn: 83424
2009-10-06 22:26:42 +00:00
e6b778d5ff
Add codegen support for NEON vld2 operations on quad registers.
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llvm-svn: 83422
2009-10-06 22:01:59 +00:00
74b3d284f2
Use copyRegToReg hook to copy registers.
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llvm-svn: 83421
2009-10-06 22:01:15 +00:00
e2595b5be6
r83391 was completely broken since Twines keep references to their inputs, and
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some of the inputs were temporaries. Here's a real fix for the miscompilation.
Thanks to sabre for pointing out the problem.
llvm-svn: 83417
2009-10-06 21:45:26 +00:00
dc7d1ce575
Fix a comment typo.
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Patch by Johnny Chen.
llvm-svn: 83407
2009-10-06 20:18:46 +00:00
08506ee6b0
Bugfix for the CommaSeparated option. The original code was adding the whole
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string at the end of the list, instead of the last comma-separated string.
llvm-svn: 83405
2009-10-06 19:55:53 +00:00
2275a7dfef
Update CMake file.
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llvm-svn: 83404
2009-10-06 19:45:38 +00:00
4598eb6214
Add support to handle debug info attached to an instruction.
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This is not yet enabled.
llvm-svn: 83400
2009-10-06 18:37:31 +00:00
10d3dc569b
Instead of printing unnecessary basic block labels as labels in
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verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.
Also, factor out the relevant code out of all the targets and into
target-independent code.
llvm-svn: 83392
2009-10-06 17:38:38 +00:00
92e3a06623
Fix PR5112, a miscompilation on gcc-4.0.3. Patch by Collin Winter!
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llvm-svn: 83391
2009-10-06 17:25:50 +00:00
a893f5bdf5
remove predicate simplifier, it never got the last bugs beaten
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out of it, and jump threading, condprop and gvn are now getting
most of the benefit. This was approved by Nicholas and Nicolas.
llvm-svn: 83390
2009-10-06 16:59:46 +00:00
692f6e7f9d
Remove xs1b predicate since it is no longer needed to differentiate betweem
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xs1a and xs1b.
llvm-svn: 83383
2009-10-06 16:17:57 +00:00
d7b887410d
Remove xs1a subtarget. xs1a is a preproduction device used in
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early development boards which is no longer supported in the
XMOS toolchain.
llvm-svn: 83381
2009-10-06 16:01:09 +00:00
29e8555056
Default to the xs1b subtarget
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llvm-svn: 83380
2009-10-06 15:41:52 +00:00
9ed7b16bf3
Introduce and use convenience methods for getting pointer types
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where the element is of a basic builtin type. For example, to get
an i8* use getInt8PtrTy.
llvm-svn: 83379
2009-10-06 15:40:36 +00:00
fa21fe7c3d
grammar
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llvm-svn: 83378
2009-10-06 15:03:44 +00:00
7d838bb66e
Fix cut-n-pasto.
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llvm-svn: 83367
2009-10-06 03:15:38 +00:00
eb43b17074
Update processDebugLoc() to handle requests to process debug info, before and after emitting instructions.
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llvm-svn: 83364
2009-10-06 03:04:58 +00:00
051454a16f
Update processDebugLoc() so that it can be used to process debug info before and after printing an instruction.
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llvm-svn: 83363
2009-10-06 02:19:11 +00:00
2980a22028
Remove dead code.
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llvm-svn: 83362
2009-10-06 02:01:32 +00:00
8db360da7b
Add utility routine to set begin and end labels for DbgScopes.
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This will be used by processDebugLoc().
llvm-svn: 83361
2009-10-06 01:50:42 +00:00
849e59abb2
Remove unintentional function decl.
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llvm-svn: 83356
2009-10-06 01:31:35 +00:00
475d32a987
Add utility routine to collect variable debug info. This is not yet used.
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llvm-svn: 83355
2009-10-06 01:26:37 +00:00
e97fe329e9
Fix http://llvm.org/PR5116 by rolling back r60822. This passes `make unittests
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check-lit` on both x86-64 Linux and x86-32 Darwin.
llvm-svn: 83353
2009-10-06 00:35:55 +00:00
bb802206d2
Set default location for the function if it is not already set.
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This code is not yet enabled.
llvm-svn: 83349
2009-10-06 00:09:08 +00:00
d859d86538
Existence of a compile unit for input source file is a good indicator to check debug info's presence in a module.
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llvm-svn: 83348
2009-10-06 00:03:14 +00:00
1c9eef72b4
If subprogram die is not available then construct new one.
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This can happen if debug info is processed lazily.
llvm-svn: 83347
2009-10-05 23:59:00 +00:00
4c420eca41
Adjust context for the global variables that are not at file scope, e.g.
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void foo() { static int bar = 42; }
Here, foo's DIE is parent of bar's DIE.
llvm-svn: 83344
2009-10-05 23:40:42 +00:00
4144a82154
Set address while constructing DIE.
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llvm-svn: 83343
2009-10-05 23:22:08 +00:00
44e5dbcaf0
Extend ConstantFolding to understand signed overflow variants
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llvm-svn: 83338
2009-10-05 22:53:52 +00:00
2dfb5da6bb
In Thumb1, the register scavenger is not always able to use an emergency
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spill slot. When frame references are via the frame pointer, they will be
negative, but Thumb1 load/store instructions only allow positive immediate
offsets. Instead, Thumb1 will spill to R12.
llvm-svn: 83336
2009-10-05 22:30:23 +00:00
Jim Grosbach