2 Commits

Author	SHA1	Message	Date
Shiva Chen	f78fc3842f	[RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxation ... Differential Revision: https://reviews.llvm.org/D44888 llvm-svn: 333385	2018-05-29 00:44:15 +00:00
Alex Bradbury	71f45455e1	[RISCV] Add the RISCV target and compiler driver ... As RV64 codegen has not yet been upstreamed into LLVM, we focus on RV32 driver support (RV64 to follow). Differential Revision: https://reviews.llvm.org/D39963 llvm-svn: 322276	2018-01-11 13:36:56 +00:00