Jyotsna Verma
1b056e422c
Hexagon: SelectionDAG should not use MVT::Other to check the legality of BR_CC.
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llvm-svn: 182390
2013-05-21 15:54:32 +00:00
Matt Arsenault
75865923c9
Add LLVMContext argument to getSetCCResultType
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llvm-svn: 182180
2013-05-18 00:21:46 +00:00
Benjamin Kramer
2057a2b86f
Don't cast away constness.
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llvm-svn: 182086
2013-05-17 11:39:41 +00:00
Rafael Espindola
63d2e0ad9a
Remove dead calls to addFrameMove.
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Without a PROLOG_LABEL present, the cfi instructions are never printed.
llvm-svn: 182016
2013-05-16 15:08:37 +00:00
Jyotsna Verma
803e506fec
Hexagon: Pass to replace tranfer/copy instructions into combine instruction
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where possible.
llvm-svn: 181817
2013-05-14 18:54:06 +00:00
Jyotsna Verma
2dca82ad1c
Hexagon: Add patterns to generate 'combine' instructions.
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llvm-svn: 181805
2013-05-14 17:16:38 +00:00
Jyotsna Verma
11bd54afd6
Hexagon: ArePredicatesComplement should not restrict itself to TFRs.
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llvm-svn: 181803
2013-05-14 16:36:34 +00:00
Jyotsna Verma
c61e350a7d
Hexagon: Remove dead-code after unconditional return from addPreSched2.
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llvm-svn: 181797
2013-05-14 15:33:27 +00:00
Duncan Sands
0480b9b54e
Suppress GCC compiler warnings in release builds about variables that are only
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read in asserts.
llvm-svn: 181689
2013-05-13 07:50:47 +00:00
Rafael Espindola
227144c23c
Remove the MachineMove class.
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It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.
I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.
llvm-svn: 181680
2013-05-13 01:16:13 +00:00
Rafael Espindola
1b09836bc3
Change getFrameMoves to return a const reference.
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To add a frame now there is a dedicated addFrameMove which also takes
care of constructing the move itself.
llvm-svn: 181657
2013-05-11 02:38:11 +00:00
Jyotsna Verma
bf0bd1f4ab
Fix unused variable error.
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Earlier, this variable was used in an assert and was causing failure on
darwin.
llvm-svn: 181630
2013-05-10 21:44:02 +00:00
Jyotsna Verma
438cec566b
Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
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No functionality change.
llvm-svn: 181628
2013-05-10 20:58:11 +00:00
Jyotsna Verma
300f0b966c
Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
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llvm-svn: 181624
2013-05-10 20:27:34 +00:00
Rafael Espindola
140a837acd
Remove unused argument.
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llvm-svn: 181618
2013-05-10 18:16:59 +00:00
Rafael Espindola
7501a81a50
Remove unused function.
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llvm-svn: 181606
2013-05-10 16:53:12 +00:00
Jyotsna Verma
00681dc1f0
Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.
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No functionality change.
llvm-svn: 181535
2013-05-09 19:16:07 +00:00
Jyotsna Verma
978e972ff9
Hexagon: Use relation map for getMatchingCondBranchOpcode() and
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getInvertedPredicatedOpcode() functions instead of switch cases.
llvm-svn: 181530
2013-05-09 18:25:44 +00:00
Jyotsna Verma
5eb598001c
Hexagon: Fix Small Data support to handle -G 0 correctly.
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llvm-svn: 181344
2013-05-07 19:53:00 +00:00
Jyotsna Verma
03c6ca905c
Reverting r181331.
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Missing file, HexagonSplitConst32AndConst64.cpp, from lib/Target/Hexagon/CMakeLists.txt.
llvm-svn: 181334
2013-05-07 17:12:35 +00:00
Jyotsna Verma
19f0b40dcf
Hexagon: Fix Small Data support to handle -G 0 correctly.
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llvm-svn: 181331
2013-05-07 16:42:15 +00:00
Jyotsna Verma
a03eb9b5d5
Hexagon: Set accessSize and addrMode on all load/store instructions.
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llvm-svn: 181324
2013-05-07 15:06:29 +00:00
Krzysztof Parzyszek
18ee1193bf
Print IR from Hexagon MI passes with -print-before/after-all.
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llvm-svn: 181255
2013-05-06 21:58:00 +00:00
Krzysztof Parzyszek
59df52c585
Cleanup of the HexagonTargetMachine setup.
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llvm-svn: 181250
2013-05-06 21:25:45 +00:00
Jyotsna Verma
84c471029b
Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
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llvm-svn: 181235
2013-05-06 18:49:23 +00:00
Krzysztof Parzyszek
d50074712f
Make references to HexagonTargetMachine "const".
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llvm-svn: 181233
2013-05-06 18:38:37 +00:00
Krzysztof Parzyszek
cd410d04db
Use consistent function names.
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llvm-svn: 181090
2013-05-04 01:30:49 +00:00
Reid Kleckner
1c76f155b1
Fix missing include in Hexagon code for Release+Asserts
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llvm-svn: 180983
2013-05-03 00:54:56 +00:00
Jyotsna Verma
a841af7556
reverting r180953
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llvm-svn: 180964
2013-05-02 22:10:59 +00:00
Jyotsna Verma
7e7c730c4f
Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
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llvm-svn: 180953
2013-05-02 21:21:57 +00:00
Pranav Bhandarkar
7dda912cd7
Hexagon - Add peephole optimizations for zero extends.
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* lib/Target/Hexagon/HexagonInstrInfo.td: Add patterns to combine a
sequence of a pair of i32->i64 extensions followed by a "bitwise or"
into COMBINE_rr.
* lib/Target/Hexagon/HexagonPeephole.cpp: Copy propagate Rx in the
instruction Rp = COMBINE_Ir_V4(0, Rx) to the uses of Rp:subreg_loreg.
* test/CodeGen/Hexagon/union-1.ll: New test.
* test/CodeGen/Hexagon/combine_ir.ll: Fix test.
llvm-svn: 180946
2013-05-02 20:22:51 +00:00
Jyotsna Verma
1d29750b7d
Hexagon: Honor __builtin_expect by using branch probabilities.
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* lib/Target/Hexagon/HexagonInstrInfo.cpp (GetDotNewPredOp):
Given a jump opcode return the right pred.new jump opcode with
a taken vs not-taken hint based on branch probabilities provided
by the target independent module.
* lib/Target/Hexagon/HexagonVLIWPacketizer.cpp: Use the above function.
* lib/Target/Hexagon/HexagonNewValueJump.cpp(getNewvalueJumpOpcode):
Enhance existing function use branch probabilities like
HexagonInstrInfo::GetDotNewPredOp but for New Value (GPR) Jumps.
llvm-svn: 180923
2013-05-02 15:39:30 +00:00
Jyotsna Verma
5ed5181178
Hexagon: Use multiclass for Jump instructions.
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llvm-svn: 180885
2013-05-01 21:37:34 +00:00
Jyotsna Verma
cd66c0a270
Hexagon: Clear isKill flag on the predicate register in
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PredicateInstruction function.
llvm-svn: 180884
2013-05-01 21:27:30 +00:00
Jyotsna Verma
af2359b98c
Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.
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llvm-svn: 180145
2013-04-23 21:17:40 +00:00
Jyotsna Verma
f00aab98a0
Hexagon: Define relations for GP-relative instructions.
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No functionality change.
llvm-svn: 180144
2013-04-23 21:05:55 +00:00
Jyotsna Verma
89c84821ea
Hexagon: Remove assembler mapped instruction definitions.
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llvm-svn: 180133
2013-04-23 19:15:55 +00:00
Jyotsna Verma
a696239bec
Hexagon: Remove duplicate instructions to handle global/immediate values
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for absolute/absolute-set addressing modes.
llvm-svn: 180120
2013-04-23 17:11:46 +00:00
Tim Northover
a2b533906a
Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
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llvm-svn: 179939
2013-04-20 12:32:17 +00:00
Michael Liao
b53d8963ce
ArrayRefize getMachineNode(). No functionality change.
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llvm-svn: 179901
2013-04-19 22:22:57 +00:00
Jyotsna Verma
ce1be1130f
Hexagon: Set isPredicatedNew flag on predicate new instructions.
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llvm-svn: 179388
2013-04-12 18:01:06 +00:00
Jyotsna Verma
bea8327fcb
Hexagon: Set isPredicatedFlase flag for all the instructions with negated predication.
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llvm-svn: 179387
2013-04-12 17:46:52 +00:00
Jyotsna Verma
a929ab58c0
Hexagon: Expand br_cc.
...
It fixes following tests for Hexagon:
CodeGen/Generic/2003-07-29-BadConstSbyte.ll
CodeGen/Generic/2005-10-21-longlonggtu.ll
CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
CodeGen/Generic/MachineBranchProb.ll
CodeGen/Generic/builtin-expect.ll
CodeGen/Generic/pr12507.ll
llvm-svn: 178794
2013-04-04 21:18:26 +00:00
Duncan Sands
fee96f832d
Remove unused typedef.
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llvm-svn: 178462
2013-04-01 13:46:15 +00:00
Duncan Sands
e1aa194aab
There is no longer any need to silence this compiler warning as the warning has
...
been turned off globally.
llvm-svn: 178451
2013-03-31 17:44:09 +00:00
Jyotsna Verma
add82b3c75
Hexagon: Add emitFrameIndexDebugValue function to emit debug information.
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llvm-svn: 178368
2013-03-29 21:09:53 +00:00
Jyotsna Verma
26226cea4b
Hexagon: Disable DwarfUsesInlineInfoSection flag.
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llvm-svn: 178345
2013-03-29 15:46:12 +00:00
Jyotsna Verma
a46059b74d
Hexagon: Replace switch-case in isDotNewInst with TSFlags.
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llvm-svn: 178281
2013-03-28 19:44:04 +00:00
Jyotsna Verma
27c06f3322
Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.
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llvm-svn: 178279
2013-03-28 19:34:49 +00:00
Jyotsna Verma
93e740485f
Hexagon: Use multiclass for gp-relative instructions.
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Remove noV4T gp-relative instructions.
llvm-svn: 178246
2013-03-28 16:25:57 +00:00