Commit Graph

3 Commits

Author SHA1 Message Date
Oliver Stannard cd3306f62f [ARM, Asm] Add diagnostics for floating-point register operands
This adds diagnostic strings for the ARM floating-point register
classes, which will be used when these classes are expected by the
assembler, but the provided operand is not valid.

One of these, DPR, requires C++ code to select the correct error
message, as that class contains different registers depending on the
FPU. The rest can all have their diagnostic strings stored in the
tablegen decription of them.

Differential revision: https://reviews.llvm.org/D36693

llvm-svn: 315304
2017-10-10 12:35:09 +00:00
Sjoerd Meijer 4e6df15962 [ARM] Fix for indexed dot product instruction descriptions
The indexed dot product instructions only accept the lower 16 D-registers as
the indexed register, but we were e.g. incorrectly accepting:

vudot.u8 d16,d16,d18[0]

Differential Revision: https://reviews.llvm.org/D37968

llvm-svn: 313531
2017-09-18 14:17:57 +00:00
Sjoerd Meijer 7426c97bc6 [ARM] Assembler support for the ARMv8.2a dot product instructions
Commit r310480 added the AArch64 ARMv8.2a dot product instructions;
this adds the AArch32 instructions.

Differential Revision: https://reviews.llvm.org/D36575

llvm-svn: 310701
2017-08-11 09:52:30 +00:00