Commit Graph

385431 Commits

Author SHA1 Message Date
Simon Pilgrim 62af2af85d [X86] Regenerate PR32284.ll test case prefixes. NFC.
Use X64 for 64-bit targets and X86 for 32-bit targets
2021-04-14 11:02:01 +01:00
Simon Pilgrim 016ceb8382 [X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in MOVMSK(SHUFFLE(X,u)) -> MOVMSK(X) fold
Extension to rG74f98391a7a4, we can also include any of the upper (known zero) bits in the comparison in the shuffle removal fold, just as long as we demand all the elements of the movmsk source vector.
2021-04-14 11:02:01 +01:00
Nemanja Ivanovic 8be3181df6 [PowerPC] Fix incorrect subreg typo from 0148bf53f0 2021-04-14 05:01:12 -05:00
Martin Storsjö 37935405ef [lit] Always quote arguments containing '[' on windows
This avoids breaking clang-tidy/infrastructure/validate-check-names.cpp
if 'not' is evaluated as a lit internal tool (making TestRunner
invoke 'grep' directly in that test, instead of invoking 'not', which
then invokes 'grep').

The quoting of arguments is still brittle if the executable is an
MSYS based tool though, as MSYS based tools incorrectly unescape
backslashes in quoted arguments (contrary to regular win32 argument
parsing rules), see D99406 and
https://github.com/msys2/msys2-runtime/issues/36 for more examples
of the issues.

Differential Revision: https://reviews.llvm.org/D99938
2021-04-14 12:32:48 +03:00
Martin Storsjö 3b32dc4b84 [ARM] [COFF] Properly produce cross-section relative relocations
Differential Revision: https://reviews.llvm.org/D99574
2021-04-14 12:31:28 +03:00
Martin Storsjö d5c5cf5ce8 [AArch64] [COFF] Properly produce cross-section relative relocations
This fixes breakage on Windows/ARM64 after D94355.

Modelled after the corresponding code for X86; not entirely familiar
with those aspects of that layer otherwise.

Differential Revision: https://reviews.llvm.org/D99572
2021-04-14 12:31:26 +03:00
Martin Storsjö 127322ddeb [lldb] Silence GCC warnings about control reaching the end of non-void functions. NFC.
Also remove a superfluous semicolon after the braces for a switch
statement (that wasn't warned about).

Differential Revision: https://reviews.llvm.org/D100447
2021-04-14 11:54:45 +03:00
Liu, Chen3 1c4108ab66 [i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi.
According to i386 System V ABI:

1. when __m256 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 32 byte boundary at the time of the call.
2. when __m512 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 64 byte boundary at the time of the call.

The current method of clang passing __m512 parameter are as follow:

1. when target supports avx512, passing it with 64 byte alignment;
2. when target supports avx, passing it with 32 byte alignment;
3. Otherwise, passing it with 16 byte alignment.

Passing __m256 parameter are as follow:

1. when target supports avx or avx512, passing it with 32 byte alignment;
2. Otherwise, passing it with 16 byte alignment.

This pach will passing __m128/__m256/__m512 following i386 System V ABI and
apply it to Linux only since other System V OS (e.g Darwin, PS4 and FreeBSD) don't
want to spend any effort dealing with the ramifications of ABI breaks at present.

Differential Revision: https://reviews.llvm.org/D78564
2021-04-14 16:44:54 +08:00
Balázs Kéri bda20282cb [clang-tidy] Add exception flag to bugprone-unhandled-exception-at-new test. 2021-04-14 10:01:05 +02:00
Bogdan Graur 7975dd033c
[NFC] Fix unused variable warning.
Differential Revision: https://reviews.llvm.org/D100451
2021-04-14 09:36:12 +02:00
Tres Popp d80178f7c1 [mlir] Change verification order to prevent null dereference
Differential Revision: https://reviews.llvm.org/D100390
2021-04-14 09:33:17 +02:00
LLVM GN Syncbot 096857426e [gn build] Port 530456caf9 2021-04-14 07:28:18 +00:00
Serguei Katkov cf0d3477aa [GreedyRA ORE] Separate Folder Reloads and Zero Cost Folder Reloads
Patchpoint instructions have operands which is actually zero cost
(or the same as register) to use the value from the stack.
In terms of statistic it makes same to separate them.

Move from computation instructions related to stack spill/reload to
number of stack slot referenced.

Reviewers: reames, MatzeB, anemet, thegameg
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100016
2021-04-14 14:25:28 +07:00
Balázs Kéri 530456caf9 [clang-tidy] Add new check 'bugprone-unhandled-exception-at-new'.
Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D97196
2021-04-14 09:33:11 +02:00
Jan Svoboda 09d1f6e6b7 [clang] Fix copy constructor of CompilerInvocation
The `CompilerInvocationBase` class factors out members of `CompilerInvocation` that need special handling (initialization or copy constructor), so that `CompilerInvocation` can be implemented as a simple value object.

Currently, the `AnalyzerOpts` member of `CompilerInvocation` violates that setup. This patch extracts the member to `CompilerInvocationBase` and handles it in the copy constructor the same way other it handles other members.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D99568
2021-04-14 09:13:35 +02:00
Bogdan Graur 0acf4e5005
[NFC] Fix unused warning.
Differential Revision: https://reviews.llvm.org/D100449
2021-04-14 09:09:20 +02:00
Pengfei Wang 184377da5c [LLD] Implement /guard:[no]ehcont
Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D99078
2021-04-14 15:06:49 +08:00
Harald van Dijk e1e2c9d404
Revert "Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper Differential Revision : https://reviews.llvm.org/D100115"
This reverts commit 4d9ccb18f5.
2021-04-14 08:04:37 +01:00
LLVM GN Syncbot 9052920676 [gn build] Port cbc9c4ea90 2021-04-14 06:32:13 +00:00
Nathan Ridge cbc9c4ea90 [clangd] Add support for inline parameter hints
Differential Revision: https://reviews.llvm.org/D98748
2021-04-14 02:31:20 -04:00
Serguei Katkov 02265ed7ad [Live Intervals] Teach Greedy RA to recognize special case live-through
Statepoint instruction has a deopt section which is actually live-through the call.
Currently this is handled by special post pass after RA - fixup-statepoint-caller-saved.

This change teaches Greedy RA that if segment of live interval is ended with statepoint
instruction and its reg is used in deopt bundle then this live interval interferes regmask of this statepoint
and as a result caller-saved register cannot be assigned to this live interval.

Reviewers: reames, dantrushin
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100296
2021-04-14 13:26:49 +07:00
Hanhan Wang d9b03ef2e8 [mlir][StandardToSPIRV] Add support for lowering math.powf to SPIR-V.
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D100403
2021-04-13 22:36:47 -07:00
Min-Yih Hsu 91b6ef64db [M68k] Put M68kInfo as the direct library dependency for AsmParser
M68kAsmParser uses `llvm::getTheM68kTarget` from M68kInfo, therefore we
should put M68kInfo as its direct dependency. Otherwise the build will
fail when building LLVM libraries as shared objects (building LLVM
libraries statically won't have this problem though).
2021-04-13 21:21:02 -07:00
Serguei Katkov d5ed0d4816 [Live Intervals] Factor-out unionBitMask. NFC.
For further re-usage in other place.
2021-04-14 10:39:01 +07:00
Jonas Devlieghere accb095512 [lldb] Disable TestClangModulesUpdate.py because it's flaky
The test is failing intermittently on GreenDragon.

rdar://76540904
2021-04-13 20:37:17 -07:00
Jonas Devlieghere e825effe9b [lldb] Build debugserver 2-way fat on AS
When compiling for arm, build debugserver 2 way fat with an arm64 and
arm64e slice. You can only debug arm64e processes using an arm64e
debugserver.
2021-04-13 19:55:13 -07:00
Wang, Pengfei a3b52a9d13 [X86][AMX] Refactor for PostRA ldtilecfg pass.
This is a follow up of D99010. We didn't consider the live range of shape registers when hoist ldtilecfg. There maybe risks, e.g. we happen to insert it to an invalid range of some registers and get unexpected error.

This patch fixes this problem by storing the value to corresponding stack place of ldtilecfg after all its definition immediately.

This patch also fix a problem in previous code: If we don't have a ldtilecfg which dominates all AMX instructions, we cannot initialize shapes for other ldtilecfg.

There're still some optimization points left. E.g. eliminate unused mov instructions, break the def-use dependency before RA etc.

Reviewed By: LuoYuanke, xiangzhangllvm

Differential Revision: https://reviews.llvm.org/D99966
2021-04-14 10:08:23 +08:00
Mehdi Amini 597207a3c3 Expose parseXInDimensionList() to the `DialectAsmParser`
This allows custom types and attribute to parse a dimension list that
isn't necessarily terminated with `xtype`, for example something like:

#tf.shape<4x5>

Differential Revision: https://reviews.llvm.org/D100432
2021-04-14 02:07:34 +00:00
Philip Reames 00c8be3f93 fix whitespace type 2021-04-13 19:02:41 -07:00
Jonas Devlieghere 479b672ff9 [lldb] Pretend host architecture is arm64 on AS
The arm64e architecture is a preview. On Apple Silicon, pretend the host
architecture is arm64.
2021-04-13 18:57:23 -07:00
ShihPo Hung d5e962f1f2 [RISCV] Implement COPY for Zvlsseg registers
When copying Zvlsseg register tuples, we split the COPY to NF whole register moves
as below:

  $v10m2_v12m2 = COPY $v4m2_v6m2 # NF = 2
=>
  $v10m2 = PseudoVMV2R_V $v4m2
  $v12m2 = PseudoVMV2R_V $v6m2

This patch copies forwardCopyWillClobberTuple from AArch64 to check
register overlapping.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D100280
2021-04-13 18:55:51 -07:00
Roland McGrath 5c500c9f01 [scudo] Make MTE inline asm compatible with GNU assembler
The GNU assembler can't parse `.arch_extension ...` before a `;`.
So instead uniformly use raw string syntax with separate lines
instead of `;` separators in the assembly code.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D100413
2021-04-13 18:11:42 -07:00
Zoe Carver 0f0149b8d3 [libc++][docs] Add status docs for ranges.
The added documents have two tables: 1 containing links to issues and papers related to ranges. And the other contains most of the sections from the One Ranges Proposal, with their dependencies linked. This will allow us to assign work that can be done in parallel.

Differential Revision: https://reviews.llvm.org/D100393
2021-04-13 17:59:42 -07:00
Nemanja Ivanovic 0148bf53f0 [PowerPC] Use correct node to get a super register from a subreg
The VSX tablegen file has some rather eggregious uses of
COPY_TO_REGCLASS even in situations where it needs to use
SUBREG_TO_REG. While this produces correct code, it often doesn't
allow the register coalescer to coalesce copies and the resulting
code ends up being suboptimal. This patch just changes over
patterns that should use SUBREG_TO_REG.
2021-04-13 19:52:21 -05:00
Sterling Augustine 32e264921b Revert "[GlobalOpt] Revert valgrind hacks"
This reverts commit dbc16ed199.
2021-04-13 17:47:07 -07:00
Matthias Springer 3f4c1e13bc [mlir] Fix return values of AMX tests
Differential Revision: https://reviews.llvm.org/D100422
2021-04-14 09:40:49 +09:00
Arjun P eff067440e [MLIR] PresburgerSet subtraction: add documentation and assertion saying we don't support divisions yet
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D100324
2021-04-14 05:56:35 +05:30
Hongtao Yu ac955452ab [CSSPGO] Fix a test issue due to portablity of std::hash
As a follow-up to D99815, this patch enables the test by using a DAG order instead of a sequential order to mitigate the platform portability issue due to `std:: _Hash_bytes`.

Reviewed By: wenlei, jsji

Differential Revision: https://reviews.llvm.org/D100351
2021-04-13 17:19:15 -07:00
Stella Stamenova bcef28621a Fix resolution-err.ll
chmod tries to be very helpful on some platforms and prevent naive mistakes, by warning the user. This results in the following error during the test:

```chmod: ...resolution-err.ll.tmp.resolution.txt: new permissions are r--rw-rw-, not r--r--r--```

To fix the test, call chmod with u.

Differential Revision: https://reviews.llvm.org/D100417
2021-04-13 16:11:58 -07:00
Anton Bikineev 69545154cc [Sema] Move 'char-expression-as-unsigned < 0' into a separate diagnostic
This change splits '-Wtautological-unsigned-zero-compare' by reporting
char-expressions-interpreted-as-unsigned under a separate diagnostic
'-Wtautological-unsigned-char-zero-compare'. This is beneficial for
projects that want to enable '-Wtautological-unsigned-zero-compare' but at
the same time want to keep code portable for platforms with char being
signed or unsigned, such as Chromium.

Differential Revision: https://reviews.llvm.org/D99808
2021-04-14 01:01:40 +02:00
peter klausler f4ecd5a128 [flang] More precise enforcement of runtime constraint
An OPEN statement that affects an already connected unit
without changing its external file is required to have
STATUS="OLD" or default STATUS=.  The code was eliciting
spurious runtime errors in situations where an OPEN statement
pertained to an existing unit number but did not need to have
STATUS="OLD'.

Differential Revision: https://reviews.llvm.org/D100352
2021-04-13 16:00:32 -07:00
root 4d9ccb18f5 Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper Differential Revision : https://reviews.llvm.org/D100115 2021-04-14 06:41:59 +08:00
root d7297a736c Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper Differential Revision : https://reviews.llvm.org/D100115 2021-04-14 06:41:59 +08:00
root 645ce31c20 Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper Differential Revision : https://reviews.llvm.org/D100115 2021-04-14 06:41:59 +08:00
Sumesh Udayakumaran f56791ae2e [mlir] Prevent operations with users from being hoisted
This patch collects operations that have users in a for loop and uses
them  when loop invariant operations are detected and hoisted.

Reviewed By: bondhugula, vinayaka-polymage

Differential Revision: https://reviews.llvm.org/D99761
2021-04-13 15:29:17 -07:00
Daniel Sanders be50657c6a [TableGen] Resolve concrete but not complete field access initializers
This fixes the resolution of Rec10.Zero in ListSlices.td.

As part of this, correct the definition of complete for ListInit such that
it's complete iff all the elements in the list are complete rather than
always being complete regardless of the elements. This is the reason
Rec10.TwoFive from ListSlices.td previously resolved despite being
incomplete like Rec10.Zero was

Depends on D100247

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D100253
2021-04-13 15:14:56 -07:00
Artur Gainullin 192c6023e1 [Driver] Make the findVCToolChainViaEnvironment case-insensitive
PATH usage on Windows is case-insensitive. There could be situations
when toolchain path can't be obtained from PATH because of
case-sensitivity of the findVCToolChainViaEnvironment.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D100361
2021-04-13 13:36:37 -07:00
Rob Suderman 7e1fb9a0d2 [mlir][tosa] Add conv2d lowering to linalg.conv2d operator for FP
Handles lowering conv2d to linalg's convolution operator. This implementation
only supports floating point values but handles all strides, dilations, and
padding values.

Differential Revision: https://reviews.llvm.org/D100061
2021-04-13 13:26:02 -07:00
Sander de Smalen 204aaf8795 [AArch64][SVE] Always use overloaded methods instead of preprocessor macro.
This fixes a subtle issue where:

  svprf(pg, ptr, SV_ALL /*is sv_pattern instead of sv_prfop*/)

would be quietly accepted. With this change, the function declaration
guards that the third parameter is a `enum sv_prfop`. Previously `svprf`
would map directly to `__builtin_sve_svprfb`, which accepts the enum
operand as a signed integer and only checks that the incoming range is
valid, meaning that SV_ALL would be discarded as being outside the valid
immediate range, but would have allowed SV_VL1 without issuing a warning
(C) or error (C++).

Reviewed By: c-rhodes

Differential Revision: https://reviews.llvm.org/D100297
2021-04-13 21:12:53 +01:00
Hana Dusíková 64c24f493e Remove warning "suggest braces" for aggregate initialization of an empty class with an aggregate base class.
I recently ran into issues with aggregates and inheritance, I'm using
it for creating a type-safe library where most of the types are build
over "tagged" std::array. After bit of cleaning and enabling -Wall
-Wextra -pedantic I noticed clang only in my pipeline gives me warning.
After a bit of focusing on it I found it's not helpful, and contemplate
disabling the warning all together. After a discussion with other
library authors I found it's bothering more people and decided to fix
it.

Removes this warning:

template<typename T, int N> struct StdArray {
    T contents[N];
  };

template<typename T, int N> struct AggregateAndEmpty : StdArray<T,N> { };

AggregateAndEmpty<int, 3> p = {1, 2, 3}; // <-- warning here about omitted braces
2021-04-13 15:45:09 -04:00