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16669 Commits

Author SHA1 Message Date
Jim Grosbach 6233189713 Add a textual message to the assert. 
llvm-svn: 121349
 2010-12-09 01:23:51 +00:00
Jim Grosbach ed40288eb4 Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really are 
referencing the stack pointer as they say they are.

llvm-svn: 121347
 2010-12-09 01:22:19 +00:00
Jim Grosbach bd30afe4c2 When using multiple instructions to reference a frame index, make sure to 
update the opcode when necessary as well as the source register.

llvm-svn: 121346
 2010-12-09 01:22:13 +00:00
Jim Grosbach 0b2630c500 The add/sub SP instructions are really pseudos. The assembler should ignore 
them.

llvm-svn: 121345
 2010-12-09 01:21:27 +00:00
Matt Beaumont-Gay eb369f84ec Remove unused variables 
llvm-svn: 121343
 2010-12-09 01:04:43 +00:00
Owen Anderson 14e41271b7 Fix typo in Thumb2 branch fixup. 
llvm-svn: 121342
 2010-12-09 01:02:09 +00:00
Eric Christopher 8783074091 Stop confusing people, it's not really a chain, or a tumor. 
llvm-svn: 121340
 2010-12-09 00:57:19 +00:00
Bill Wendling f75412dec7 Remove extraneous semicolon. 
llvm-svn: 121338
 2010-12-09 00:51:54 +00:00
Bill Wendling c4d333f02a Attempt to make the bit-twiddling readable resulted in the binary value being 
overwritten.

llvm-svn: 121337
 2010-12-09 00:44:33 +00:00
Bill Wendling 3392bfc8f3 The BLX instruction is encoded differently than the BL, because why not? In 
particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.

Attempt to get the encoding at slightly more correct with this.

llvm-svn: 121336
 2010-12-09 00:39:08 +00:00
Eric Christopher d84970ae8b Remove extraneous copy from DAG conversion for darwin tls. This was 
popping up at O0 when it wasn't folded and the fast allocator would
complain.

llvm-svn: 121330
 2010-12-09 00:27:58 +00:00
Owen Anderson 302d5fd0d8 Fix Thumb2 BCC encoding and fixups. 
llvm-svn: 121329
 2010-12-09 00:27:41 +00:00
Eric Christopher c2dc95ae00 Add rsp to the uses for the same reason as 32-bit. 
llvm-svn: 121328
 2010-12-09 00:26:41 +00:00
Kevin Enderby 87bc591fc5 Allow a slash, '/', as a prefix separator for X86. rdar://8741045 
llvm-svn: 121320
 2010-12-08 23:57:59 +00:00
Jason W Kim e296ee830a Style nit and whitespace cleanup 
llvm-svn: 121317
 2010-12-08 23:35:25 +00:00
Jim Grosbach 9672c9a793 Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXME 
for more thorough cleanup.

llvm-svn: 121315
 2010-12-08 23:30:19 +00:00
Jim Grosbach a5c666654e Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends. 
llvm-svn: 121314
 2010-12-08 23:24:29 +00:00
Jason W Kim ba8b6d9a1c Removed dead comment. 
llvm-svn: 121313
 2010-12-08 23:19:44 +00:00
Jason W Kim c79c5f6e8c ARM/MC/ELF TPsoft is now a proper pseudo inst. 
Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM
as well as ELF/OBJ (including fixup)

Also added support for ELF::R_ARM_TLS_IE32

llvm-svn: 121312
 2010-12-08 23:14:44 +00:00
Jim Grosbach e829c674bb T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead. 
llvm-svn: 121311
 2010-12-08 23:13:01 +00:00
Jim Grosbach fd0e4c0fe9 Add operand encoding for Thumb2 subw SP + imm. rdar://8745434 
llvm-svn: 121310
 2010-12-08 23:12:09 +00:00
Jim Grosbach 51937f9963 Add operand encoding for Thumb2 addw Rn + imm. rdar://8745434 
llvm-svn: 121309
 2010-12-08 23:04:16 +00:00
Bill Wendling a7d6aa902a Support the "target" encodings for the CB[N]Z instructions. 
llvm-svn: 121308
 2010-12-08 23:01:43 +00:00
Evan Cheng 7f3e9150d0 Fix an obvious cut-n-paste error. 
llvm-svn: 121307
 2010-12-08 23:01:18 +00:00
Jim Grosbach 663e4ce357 Add operand encoding for Thumb2 addw SP + imm. rdar://8745434 
llvm-svn: 121305
 2010-12-08 22:50:19 +00:00
Jim Grosbach 47e3cc54f8 Parameterize opcode encoding bits for Thumb2 extended precision integer 
multiply instructions.

llvm-svn: 121301
 2010-12-08 22:38:41 +00:00
Jim Grosbach c3b0b10708 Fix operand encoding for Thumb2 extended precision multiplies. rdar://8745555 
llvm-svn: 121297
 2010-12-08 22:29:28 +00:00
Jim Grosbach 572e56dfb2 Simplify T2 operand assignment notation a bit. No need to specify a bit range 
for the source field when it's the whole thing that's being referenced.

llvm-svn: 121291
 2010-12-08 22:10:43 +00:00
Jim Grosbach 3c68561453 Tweak ARM fixup value adjustments for Thumb to better handle the half-word 
ordering of thumb mode.

llvm-svn: 121280
 2010-12-08 20:32:07 +00:00
Andrew Trick 00067fb147 Generalize PostRAHazardRecognizer so it can be used in any pass for 
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.

llvm-svn: 121274
 2010-12-08 20:04:29 +00:00
Owen Anderson dae32fd206 Improve comment. 
llvm-svn: 121272
 2010-12-08 19:31:11 +00:00
Jim Grosbach d18f98b969 Add initializer. 
llvm-svn: 121262
 2010-12-08 15:36:45 +00:00
Evan Cheng 9d54ae6332 Add comments. 
llvm-svn: 121238
 2010-12-08 06:29:02 +00:00
Bill Wendling 8a6449c46e Add support for loading from a constant pool. 
llvm-svn: 121226
 2010-12-08 01:57:09 +00:00
Jim Grosbach 87055ed6f4 Let target asm backends see assembler flags as they go by. Use that to handle 
thumb vs. arm mode differences in WriteNopData().

llvm-svn: 121219
 2010-12-08 01:16:55 +00:00
Owen Anderson 72ce453c73 Simplify the byte reordering logic slightly. 
llvm-svn: 121216
 2010-12-08 00:21:33 +00:00
Owen Anderson 0f7142d808 VLDR fixups need special handling under Thumb. While the encoding is the same, 
the order of the bytes in the data stream is flipped around.

llvm-svn: 121215
 2010-12-08 00:18:36 +00:00
Matt Beaumont-Gay 56de7c2773 Fix a warning about a variable which is only used in an assertion. 
llvm-svn: 121206
 2010-12-07 23:26:21 +00:00
Bill Wendling f09c44c7ab Cleanup in the Darwin end. No functionality change. 
llvm-svn: 121198
 2010-12-07 23:11:00 +00:00
Evan Cheng 775ead3293 Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal 
vpush instructions to save / restore VFP / NEON registers like this:
vpush {d8,d10,d11}
vpop {d8,d10,d11}

vpush and vpop do not allow gaps in the register list.
rdar://8728956

llvm-svn: 121197
 2010-12-07 23:08:38 +00:00
Bill Wendling 721724e643 A bit of cleanup: early exit ApplyFixup and cache the Fixup offset. No 
functionality change.

llvm-svn: 121195
 2010-12-07 23:05:20 +00:00
Jim Grosbach 49bcd6ff85 Binary encoding for ARM tLDRspi and tSTRspi. 
llvm-svn: 121186
 2010-12-07 21:50:47 +00:00
Owen Anderson cf096a431a Fix Thumb2 encoding of the S bit. 
llvm-svn: 121182
 2010-12-07 20:50:15 +00:00
Jim Grosbach 327cf8ee5f Refactor the ARM CMPz* patterns to just use the normal CMP instructions when 
possible. They were duplicates for everything exception the source pattern
before.

llvm-svn: 121179
 2010-12-07 20:41:06 +00:00
Evan Cheng de75ab9a09 Code clean up; no functionality change. 
llvm-svn: 121176
 2010-12-07 20:11:46 +00:00
Evan Cheng c27c956966 Code clean up; no functionality change. 
llvm-svn: 121172
 2010-12-07 19:59:34 +00:00
Bruno Cardoso Lopes b9bfd0945a Remove target specific node MipsISD::CMov, which is not used because all conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again 
llvm-svn: 121164
 2010-12-07 19:04:14 +00:00
Bruno Cardoso Lopes f0c6e3780d Match a pattern generated by a dag combiner opt where: 
(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))

Thanks to Akira for pointing that.

llvm-svn: 121163
 2010-12-07 19:00:20 +00:00
Jim Grosbach 6e517d658e Encode the literal field for tCMPzi instruction. 
llvm-svn: 121153
 2010-12-07 17:48:24 +00:00
Benjamin Kramer cfa9a893df Add parens to pacify gcc. 
llvm-svn: 121142
 2010-12-07 15:50:35 +00:00