f359fed9f9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
...
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
llvm-svn: 44037
2007-11-13 00:44:25 +00:00
933b5b7e62
Add a flag for indirect branch instructions.
...
Target maintainers: please check that the instructions for your target are correctly marked.
llvm-svn: 44012
2007-11-12 07:39:39 +00:00
4edfea438a
Use TableGen to emit information for dwarf register numbers.
...
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
b988e7e8cd
Add CCAssignToStackABISizeAlign for convenience in
...
dealing with types whose size & alignment are
different on different subtargets. Use it for x86 f80.
llvm-svn: 43988
2007-11-10 22:07:15 +00:00
d2c16ff905
Update tailcall code to include inline attribute operand for memcpy.
...
llvm-svn: 43978
2007-11-10 10:48:01 +00:00
fb13fd6f93
Unbreak x86-64 jumptable.
...
llvm-svn: 43955
2007-11-09 19:11:23 +00:00
dfb85c7831
Revert previous rewrite per chris's comments.
...
llvm-svn: 43950
2007-11-09 18:07:11 +00:00
797d56ff17
Much improved pic jumptable codegen:
...
Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
llvm-svn: 43924
2007-11-09 01:32:10 +00:00
04fd82088e
Rewrite Dwarf number handling per review comments.
...
llvm-svn: 43918
2007-11-09 00:47:10 +00:00
1b9de4dd6f
Complete conditionalization of Dwarf reg numbers.
...
Would somebody not on Darwin please make sure this
doesn't break anything. Exception handling failures
would be the most likely symptom.
llvm-svn: 43844
2007-11-07 21:48:35 +00:00
fbe69d2cd6
Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
...
Much improvement in exception handling.
llvm-svn: 43794
2007-11-07 00:25:05 +00:00
fa0df55bdd
Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
...
Thanks for the suggestions Bill :-)
llvm-svn: 43742
2007-11-05 23:12:20 +00:00
9337929aae
Use movups to spill / restore SSE registers on targets where stacks alignment is
...
less than 16. This is a temporary solution until dynamic stack alignment is
implemented.
llvm-svn: 43703
2007-11-05 07:30:01 +00:00
283207a71c
Eliminate the remaining uses of getTypeSize. This
...
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
2007-11-05 00:04:43 +00:00
9329e780cd
Fix PR1761 by not printing (rip) suffix when in -static mode.
...
Evan, please review this.
llvm-svn: 43680
2007-11-04 19:23:28 +00:00
296160d443
Fix PR1763 by allowing the 'q' constraint to work with 64-bit
...
regs on x86-64.
llvm-svn: 43669
2007-11-04 06:51:12 +00:00
2b93a20b09
Unbreak tailcall opt.
...
llvm-svn: 43646
2007-11-02 17:45:40 +00:00
389d430c49
add a note
...
llvm-svn: 43642
2007-11-02 17:04:20 +00:00
e453ff4913
Missing a getNumOperands check.
...
llvm-svn: 43630
2007-11-02 01:26:22 +00:00
b7cabbe295
Silence, accersed warning
...
llvm-svn: 43609
2007-11-01 08:51:44 +00:00
419b6d7ce4
Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold
...
and by restructuring the X86 version.
New I just have to move this to a common place :-)
llvm-svn: 43554
2007-10-31 14:39:58 +00:00
063f177300
Make ARM an X86 memcpy expansion more similar to each other.
...
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.
This should not change generated code.
llvm-svn: 43552
2007-10-31 11:52:06 +00:00
b066c1f216
Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
...
llvm-svn: 43535
2007-10-31 00:32:36 +00:00
d50c8bcef6
Add missing SSE builtins: CVTPD2PI, CVTPS2PI,
...
CVTTPD2PI, CVTTPS2PI, CVTPI2PD, CVTPI2PS.
llvm-svn: 43523
2007-10-30 22:15:38 +00:00
b508c53c63
Fix for visibility warnings generated by gcc-4.2.
...
llvm-svn: 43500
2007-10-30 13:14:37 +00:00
6aa304e529
Add missing MMX PSUBQ.
...
llvm-svn: 43488
2007-10-30 01:18:38 +00:00
e106e2f142
Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
...
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).
llvm-svn: 43465
2007-10-29 19:58:20 +00:00
7b3f7feaea
Avoid doing something dumb like rewriting using a 64-bit iv in 32-bit mode.
...
llvm-svn: 43446
2007-10-29 07:57:50 +00:00
909a54ccd4
add a note.
...
llvm-svn: 43444
2007-10-29 06:19:48 +00:00
5e99fd8c0d
Add support for the x86-64 'q' regigster modifier, and add support for the
...
b/h/w/k/q inline asm memory modifiers, which are just ignored. This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
llvm-svn: 43430
2007-10-29 03:09:07 +00:00
c826ac533b
New entry.
...
llvm-svn: 43420
2007-10-28 04:01:09 +00:00
d07d6a411c
Fix off-by-one stack offset computations (dwarf information) for callee-saved
...
registers in case, when FP pointer was eliminated. This should fixes misc. random
EH-related crahses, when stuff is compiled with -fomit-frame-pointer.
Thanks Duncan for nailing this bug!
llvm-svn: 43381
2007-10-26 09:13:24 +00:00
7f3d02471d
Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free.
...
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
xorl %ecx, %ecx
xorw %dx, %dx
movw %dx, %si
LBB1_2: # bb
movl L_X$non_lazy_ptr, %edi
movw %si, (%edi)
movl L_Y$non_lazy_ptr, %edi
movw %dx, (%edi)
addw $4, %dx
incw %si
incl %ecx
cmpl %eax, %ecx
jne LBB1_2 # bb
into
LBB1_1: # entry.bb_crit_edge
xorl %ecx, %ecx
xorw %dx, %dx
LBB1_2: # bb
movl L_X$non_lazy_ptr, %esi
movw %cx, (%esi)
movl L_Y$non_lazy_ptr, %esi
movw %dx, (%esi)
addw $4, %dx
incl %ecx
cmpl %eax, %ecx
jne LBB1_2 # bb
llvm-svn: 43375
2007-10-26 01:56:11 +00:00
bf474959a3
Fix the folding of multiplication into addresses on x86, which was broken
...
by the recent {U,S}MUL_LOHI changes.
llvm-svn: 43230
2007-10-22 20:22:24 +00:00
c92446af1f
Fix an unfolding bug.
...
llvm-svn: 43212
2007-10-22 03:03:20 +00:00
8ee70112ea
Allow for copysign having f80 second argument.
...
Fixes 5550319.
llvm-svn: 43205
2007-10-21 01:07:44 +00:00
45e096c77e
Resolve unfold tables ambiguity.
...
llvm-svn: 43194
2007-10-19 23:50:58 +00:00
35ff79370b
Local spiller optimization:
...
Turn a store folding instruction into a load folding instruction. e.g.
xorl %edi, %eax
movl %eax, -32(%ebp)
movl -36(%ebp), %eax
orl %eax, -32(%ebp)
=>
xorl %edi, %eax
orl -36(%ebp), %eax
mov %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.
llvm-svn: 43192
2007-10-19 21:23:22 +00:00
846c19dd70
Add support for byval function whose argument is not 32 bit aligned.
...
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset. I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)
llvm-svn: 43172
2007-10-19 10:41:11 +00:00
463e2ab0ac
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
...
- Fix some copy+paste bugs.
llvm-svn: 43153
2007-10-18 22:40:57 +00:00
aa9a225699
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
...
llvm-svn: 43150
2007-10-18 21:29:24 +00:00
7f68cf0d57
Fix a typo
...
llvm-svn: 43144
2007-10-18 19:28:55 +00:00
12d5da49d3
Change fp to sint legalization on x86-32 to do 2 x i32
...
loads instead of 1 x i64 loads. This doesn't change any functionality yet.
llvm-svn: 43068
2007-10-17 06:17:29 +00:00
693cbeadff
fix some funny indentation, add comments.
...
llvm-svn: 43066
2007-10-17 06:02:13 +00:00
e5530a35d4
Check for invalid cc's in f80 select.
...
llvm-svn: 43033
2007-10-16 18:09:08 +00:00
b3d58b98d0
Correction to tail call optimization code. The new return address
...
was stored to the acutal stack slot before the parameters were
lowered to their stack slot. This could cause arguments to be
overwritten by the return address if the called function had less
parameters than the caller function. The update should remove the
last failing test case of llc-beta: SPASS.
llvm-svn: 43027
2007-10-16 09:05:00 +00:00
7bcfd8f880
LowerFP_TO_SINT must not create a stack object if it's not needed.
...
llvm-svn: 43004
2007-10-15 20:11:21 +00:00
4099f4f91a
Unbreak x86-64.
...
llvm-svn: 42962
2007-10-14 10:09:39 +00:00
cdf3609130
Revert 42908 for now.
...
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
29af26f147
Clarify that fastcc has a problem with nested function
...
trampolines, rather than with nested functions themselves.
llvm-svn: 42955
2007-10-13 07:38:37 +00:00
Bill Wendling