d76b9b766c
Add a comment to describe letters used in multiclass name suffixes.
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llvm-svn: 83257
2009-10-03 04:44:16 +00:00
a9abf57409
Fix encoding problem for VMLS instruction.
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Thanks to Johnny Chen for pointing this out!
llvm-svn: 83256
2009-10-03 04:41:21 +00:00
a7780905e7
Oops. Renamed remaining MachineInstrIndex references.
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llvm-svn: 83255
2009-10-03 04:31:31 +00:00
920301ecc5
Renamed MachineInstrIndex to LiveIndex.
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llvm-svn: 83254
2009-10-03 04:21:37 +00:00
f01ee30328
MingW build fixes
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- MingW needs -lpsapi (in ${LIBS}) linked after -lLLVMSystem.
Noticed by Ronald Pijnacker!
- Some parts of the System library must be build with exceptions on windows.
Based on a patch by Jay Foad!
llvm-svn: 83251
2009-10-02 19:36:31 +00:00
3b008a3a65
Fix a use-after-free in post-ra-scheduling.
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MI->addOperand invalidates references to it's operands, avoid touching
the operand after a new one was added.
llvm-svn: 83249
2009-10-02 15:59:52 +00:00
32a47ea7b6
getFunctionAlignment should return log2 alignment.
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llvm-svn: 83242
2009-10-02 06:57:25 +00:00
b659dff4eb
Forgot about ARM::tPUSH. It also has a new writeback operand.
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llvm-svn: 83237
2009-10-02 05:03:07 +00:00
2dcee28a61
Move load / store multiple before post-alloc scheduling.
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llvm-svn: 83236
2009-10-02 04:57:15 +00:00
d725159d9d
All callee-saved registers are live-out of a return block.
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llvm-svn: 83223
2009-10-01 23:28:47 +00:00
1cc6dd97da
Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.
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llvm-svn: 83218
2009-10-01 22:19:57 +00:00
70cb67fcf4
Expand api out in the usual inserter way, though, I do have a
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question, can we get rid of the BasicBlock versions of all inserters
and use Head == 0 to indicate the old case when GetInsertBlock == 0?
llvm-svn: 83216
2009-10-01 22:08:58 +00:00
9a051a5922
Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
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llvm-svn: 83215
2009-10-01 21:46:35 +00:00
6f012d83f2
ARM::tPOP and tPOP_RET each has an extra writeback operand now.
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llvm-svn: 83214
2009-10-01 20:54:53 +00:00
75cc16c0f2
Add support to extract lexical scope information from DebugLoc attached with an machine instruction.
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This is not yet enabled.
llvm-svn: 83210
2009-10-01 20:31:14 +00:00
be3039e776
Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup.
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llvm-svn: 83208
2009-10-01 19:45:32 +00:00
787f94c28d
Record first and last instruction of a scope in DbgScope.
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llvm-svn: 83207
2009-10-01 18:25:23 +00:00
4fb2891396
Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change
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operands of instructions with these properties while breaking anti-dep.
llvm-svn: 83198
2009-10-01 08:26:23 +00:00
1b2b64f618
Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple,
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ld / st pairs, etc.
llvm-svn: 83197
2009-10-01 08:22:27 +00:00
d846fbf20d
Remove GVNPRE.cpp from the CMake makefile
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llvm-svn: 83194
2009-10-01 05:30:05 +00:00
5f3cc06cd2
remove the GVNPRE pass. It has been subsumed by the GVN pass.
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Ok'd by Owen.
llvm-svn: 83193
2009-10-01 02:18:36 +00:00
4bcd523acb
Update ARM JIT emitter to account for ld/st multiple changes.
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llvm-svn: 83192
2009-10-01 01:39:21 +00:00
3bbc6c3ae6
Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions.
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llvm-svn: 83191
2009-10-01 01:33:39 +00:00
34986f12e6
Add another MDNode into DebugLocTuple. This will be used to keep track of inlined functions.
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llvm-svn: 83190
2009-10-01 01:15:28 +00:00
4dbca6dfd4
If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.
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llvm-svn: 83189
2009-10-01 01:03:26 +00:00
e0709cfc92
Use MachineInstr as an processDebugLoc() argument.
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This will allow processDebugLoc() to handle scopes for DWARF debug info.
llvm-svn: 83183
2009-09-30 23:12:50 +00:00
3256c751f5
Use MDNode * directly as an RecordSourceLine() argument.
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llvm-svn: 83182
2009-09-30 22:51:28 +00:00
5c13c2d392
Remove dead code.
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llvm-svn: 83181
2009-09-30 22:43:52 +00:00
a49be76f43
Add isFOO() helpers. Fix getDirectory() and getFilename() for DIScope.
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llvm-svn: 83180
2009-09-30 22:34:41 +00:00
b2120755a2
Use OutStreamer.SwitchSection instead of writing out textual section directives.
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Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to
get access to that section.
llvm-svn: 83178
2009-09-30 22:25:37 +00:00
b633d7a665
Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this
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to emit target-specific things at the beginning of the asm output. This
fixes a problem for PPC, where the text sections are not being kept together
as expected. The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives. The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text. With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.
llvm-svn: 83176
2009-09-30 22:06:26 +00:00
64c8d5a004
Fix a comment typo.
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llvm-svn: 83174
2009-09-30 21:44:42 +00:00
48575e3f2e
Check for null MDNode element while printing comment.
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llvm-svn: 83172
2009-09-30 21:26:51 +00:00
53904987ae
Fix a comment.
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llvm-svn: 83171
2009-09-30 21:26:13 +00:00
699702e0a8
The AsmPrinter base class contains a DwarfWriter member, so there's no need
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for derived AsmPrinters to add another one. In some cases, fixing this
removes the need to override the doInitialization method.
llvm-svn: 83170
2009-09-30 21:24:45 +00:00
8ce67f83bc
Assert that ConstantArrays are created with correctly-typed elements.
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llvm-svn: 83168
2009-09-30 21:08:08 +00:00
ea0bb8f555
Fix this code so that it doesn't try to iterate through a std::vector
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while calling changeImmediateDominator, which removes elements from the
vector. This fixes PR5097.
llvm-svn: 83166
2009-09-30 20:54:16 +00:00
cea8dab1d1
Silence comparison always false warning in -Asserts mode.
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llvm-svn: 83164
2009-09-30 20:43:07 +00:00
c87197784a
Add additional assert() to verify no extraneous use of a scavenged register.
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llvm-svn: 83163
2009-09-30 20:35:36 +00:00
711ab5b8ec
Print tag name for MDNodes that are used to encode debug info.
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llvm-svn: 83160
2009-09-30 20:16:54 +00:00
8ff5c19ebd
Fix integer overflow in instruction scheduling. This can happen if we have
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basic blocks that are so long that their size overflows a short.
Also assert that overflow does not happen in the future, as requested by Evan.
This fixes PR4401.
llvm-svn: 83159
2009-09-30 20:15:38 +00:00
a2fe1a6811
Clarify comment phrasing.
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llvm-svn: 83148
2009-09-30 15:23:38 +00:00
ce5a8ca3ef
Add a option which would move ld/st multiple pass before post-alloc scheduling.
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llvm-svn: 83145
2009-09-30 08:53:01 +00:00
f305ead1cc
Add a target hook to add pre- post-regalloc scheduling passes.
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llvm-svn: 83144
2009-09-30 08:49:50 +00:00
6d59690c3e
Fix compile error as debug interface changed.
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By the way, this code is buggy. You can't keep a map<MDNode *, something>
because the MDNode may be destroyed and reused for something else.
llvm-svn: 83141
2009-09-30 04:50:26 +00:00
882f4c11ed
replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
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per customary usage
llvm-svn: 83137
2009-09-30 01:47:59 +00:00
70ce8a03b1
When checking whether we need to reserve a register for the scavenger,
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the size of the saved frame pointer needs to be taken into account.
llvm-svn: 83136
2009-09-30 01:43:29 +00:00
bcad0c8421
Add "isBarrier = 1" to return instructions.
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Patch by Sylvere Teissier.
llvm-svn: 83135
2009-09-30 01:35:11 +00:00
cdd3e35005
fix compiler warning
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llvm-svn: 83132
2009-09-30 00:37:40 +00:00
20e5f5ed79
For Darwin, emit all the text section directives together before the dwarf
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section directives. This causes the assembler to put the text sections at
the beginning of the object file, which helps work around a limitation of the
Darwin ARM relocations. Radar 7255355.
llvm-svn: 83127
2009-09-30 00:23:42 +00:00
Bob Wilson