Pengxuan Zheng
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79702dd349
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[RISCV] Add instruction definition for dret
Summary:
The instruction dret is used to return from debug mode and is defined in the
RISC-V debug mode spec.
https://github.com/riscv/riscv-opcodes/blob/master/opcodes-system
Reviewers: apazos, asb, lenary, luismarques
Reviewed By: apazos
Subscribers: jfb, hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, sameer.abuasal, evandro, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D78583
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2020-04-24 13:27:43 -07:00 |