9c6456e82e
Clean whitespace.
...
llvm-svn: 127900
2011-03-18 19:47:14 +00:00
6d55745d2f
Reduce code duplication.
...
llvm-svn: 127899
2011-03-18 19:46:58 +00:00
0984dcc077
PTX: Fix various codegen issues
...
- Emit mad instead of mad.rn for shader model 1.0
- Emit explicit mov.u32 instructions for reading global variables
- (most PTX instructions cannot take global variable immediates)
llvm-svn: 127895
2011-03-18 19:24:28 +00:00
486e57f694
Add llvm-rtdyld support for loading 32-bit code.
...
Factor out the 64-bit specific bits into a helper function and add an
equivalent that loads the 32-bit sections. This allows using llvm-rtdyld on ARM.
llvm-svn: 127892
2011-03-18 18:54:32 +00:00
806d507b0f
setExecutable() should default to success if there's nothing custom for it.
...
llvm-svn: 127891
2011-03-18 18:51:03 +00:00
eb4b63d66e
Thumb2 PC-relative loads require a fixup rather than just an immediate.
...
llvm-svn: 127888
2011-03-18 17:42:55 +00:00
9d8ffa9dba
Update list of link components for llvm-rtdyld.
...
llvm-svn: 127887
2011-03-18 17:27:04 +00:00
4d5284b44b
Naming conventional tidy up.
...
llvm-svn: 127886
2011-03-18 17:24:21 +00:00
0072cdbc50
MachO file loader and execution utility.
...
Add a bone-simple utility to load a MachO object into memory, look for
a function (main) in it, and run that function directly. This will be used
as a test and development platform for MC-JIT work regarding symbol resolution,
dynamic lookup, etc..
Code by Daniel Dunbar.
llvm-svn: 127885
2011-03-18 17:11:39 +00:00
1c4b42d00f
Avoid creating canonical induction variables for non-native types.
...
For example, on 32-bit architecture, don't promote all uses of the IV
to 64-bits just because one use is a 64-bit cast.
Alternate implementation of the patch by Arnaud de Grandmaison.
llvm-svn: 127884
2011-03-18 16:50:32 +00:00
6e31408af1
Tidy up.
...
llvm-svn: 127883
2011-03-18 16:39:36 +00:00
3fbfcc0e1e
Support explicit argument forms for the X86 string instructions.
...
For now, only the default segments are supported.
llvm-svn: 127875
2011-03-18 11:59:40 +00:00
b1df0fe1cc
ptx: fix parameter order that is reversed
...
llvm-svn: 127874
2011-03-18 11:23:56 +00:00
ff9d938e33
ptx: add unconditional and conditional branch
...
llvm-svn: 127873
2011-03-18 11:08:52 +00:00
bac0d769cd
raw_ostream: [PR6745] Tweak formatting (double)%e for Windows hosts.
...
On MSVCRT and compatible, output of %e is incompatible to Posix by default. Number of exponent digits should be at least 2. "%+03d"
FIXME: Implement our formatter in future!
llvm-svn: 127872
2011-03-18 09:30:10 +00:00
a50db6544f
Initialize the only-used-with-PPC-double-double parts of the APFloat class. This
...
makes valgrind stop complaining about uninitialized variables being read when it
accesses a bitfield (category) that shares its bits with these variables.
llvm-svn: 127871
2011-03-18 09:09:44 +00:00
c78f65775a
Simplify the computation of undefined symbols. Instead of walking
...
functions and initializers, just report the declarations present in
the module.
The motivation is to open the way for using the lazy module parsing,
which should speed up clients that just want a symbol list (nm, ar).
This is slightly less precise, but since both -strip-dead-prototypes
and -globaldce are part of the standard pipeline, this shouldn't
change the result for clang/dragonegg produced binaries.
Any decl in an IL file was also put there because a FE expected it
to be necessary, so this should not be a problem for "-O0 -emit-llvm".
As a sanity check, I have bootstrapped clang on linux and built
firefox on both linux and darwin. A clang bootstrap on darwin
with LTO fails with or without this patch because, ironically,
the linker doesn't like the combination of dead_strip and LTO
when building libLTO.so :-)
llvm-svn: 127870
2011-03-18 05:12:38 +00:00
27320cb864
Hoist spills when the same value is known to be in less loopy sibling registers.
...
Stack slot real estate is virtually free compared to registers, so it is
advantageous to spill earlier even though the same value is now kept in both a
register and a stack slot.
Also eliminate redundant spills by extending the stack slot live range
underneath reloaded registers.
This can trigger a dead code elimination, removing copies and even reloads that
were only feeding spills.
llvm-svn: 127868
2011-03-18 04:23:06 +00:00
01fb4b018e
Some release notes.
...
llvm-svn: 127867
2011-03-18 04:07:44 +00:00
153b19f8a7
Tweak CrashRecoveryContextCleanup::createCleanup() to use the 'delete' cleanup as opposed to the 'destructor' cleanup (reclaims more memory).
...
llvm-svn: 127865
2011-03-18 03:46:21 +00:00
f4d5346fb4
tools/lto/LTOModule.cpp: Eliminate an unused variable.
...
llvm-svn: 127859
2011-03-18 03:21:11 +00:00
ce60d4cd4d
llvm-bcanalyzer.cpp: Tweak format string to suppress warnings on mingw32-g++.
...
llvm-svn: 127858
2011-03-18 03:21:04 +00:00
fdc09941f2
Accept instructions that read undefined values.
...
This is not supposed to happen, but I have seen the x86 rematter getting
confused when rematerializing partial redefs.
llvm-svn: 127857
2011-03-18 03:06:04 +00:00
c099dde918
Be more accurate about the slot index reading a register when dealing with defs
...
and early clobbers.
Assert when trying to find an undefined value.
llvm-svn: 127856
2011-03-18 03:06:02 +00:00
fca6fd4aed
Add new CrashRecoveryContextCleanup subclass: CrashRecoveryContextDeleteCleanup. This deletes the object, not just calls its destructor.
...
llvm-svn: 127855
2011-03-18 03:04:18 +00:00
7c9cc46165
Check RequiresNullTerminator first, or we might read from an invalid address.
...
llvm-svn: 127853
2011-03-18 02:55:51 +00:00
1a916a3c0c
Add a target-specific branchless method for double-width relational
...
comparisons on x86. Essentially, the way this works is that SUB+SBB sets
the relevant flags the same way a double-width CMP would.
This is a substantial improvement over the generic lowering in LLVM. The output
is also shorter than the gcc-generated output; I haven't done any detailed
benchmarking, though.
llvm-svn: 127852
2011-03-18 02:34:11 +00:00
c44d3cf581
Augment CrashRecoveryContext to have registered "cleanup" objects that can be used to release resources during a crash.
...
llvm-svn: 127849
2011-03-18 02:05:11 +00:00
c17c9a78aa
FileCheck-ize and update test.
...
llvm-svn: 127845
2011-03-18 01:10:31 +00:00
e387f8a5e9
The disassembler for Thumb was wrongly adding 4 to the computed imm32 offset.
...
Remove the offending logic and update the test cases.
llvm-svn: 127843
2011-03-18 00:38:03 +00:00
f8f67f0188
Remove TargetData and ValueTracking includes. I didn't mean for them to sneak in my last checkin.
...
llvm-svn: 127842
2011-03-18 00:36:39 +00:00
38aa83fa24
There are two pseudos in this case that are Thumb mode, not one.
...
llvm-svn: 127840
2011-03-17 23:52:05 +00:00
87716c93c2
Added isValidRewrite() to check the result of ScalarEvolutionExpander.
...
SCEV may generate expressions composed of multiple pointers, which can
lead to invalid GEP expansion. Until we can teach SCEV to follow strict
pointer rules, make sure no bad GEPs creep into IR.
Fixes rdar://problem/9038671.
llvm-svn: 127839
2011-03-17 23:51:11 +00:00
e44f0d94f6
whitespace
...
llvm-svn: 127837
2011-03-17 23:46:48 +00:00
ab959a2e68
Use RequiresNullTerminator to create buffers without a null terminator
...
instead of copying.
llvm-svn: 127835
2011-03-17 22:18:42 +00:00
aad34d882d
Try to not lose variable's debug info during instcombine.
...
This is done by lowering dbg.declare intrinsic into dbg.value intrinsic.
Radar 9143931.
llvm-svn: 127834
2011-03-17 22:18:16 +00:00
221a014ea3
It used to be that t_addrmode_s4 was used for both:
...
o A8.6.195 STR (register) -- Encoding T1
o A8.6.193 STR (immediate, Thumb) -- Encoding T1
It has been changed so that now they use different addressing modes
and thus different MC representation (Operand Infos). Modify the
disassembler to reflect the change, and add relevant tests.
llvm-svn: 127833
2011-03-17 22:04:05 +00:00
8c0b16b0aa
Refactor into a separate utility function.
...
llvm-svn: 127832
2011-03-17 21:58:19 +00:00
cfcea12fe2
BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift.
...
This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into
shrl $2, %edi
imulq $613566757, %rdi, %rax
shrq $32, %rax
ret
instead of
movl %edi, %eax
imulq $613566757, %rax, %rcx
shrq $32, %rcx
subl %ecx, %eax
shrl %eax
addl %ecx, %eax
shrl $4, %eax
on x86_64
llvm-svn: 127829
2011-03-17 20:39:14 +00:00
09a51bab5d
Add an argument to APInt's magic udiv calculation to specify the number of bits that are known zero in the divided number.
...
This will come in handy soon.
llvm-svn: 127828
2011-03-17 20:39:06 +00:00
8630840c30
Dead code elimination may separate the live interval into multiple connected components.
...
I have convinced myself that it can only happen when a phi value dies. When it
happens, allocate new virtual registers for the components.
llvm-svn: 127827
2011-03-17 20:37:07 +00:00
ec54bd755f
Reapply: Add type output to llvm-dis annotations. Patch by Yuri!
...
llvm-svn: 127824
2011-03-17 19:50:04 +00:00
6120962d7d
Add XCore intrinsic for setpsc.
...
llvm-svn: 127821
2011-03-17 18:42:05 +00:00
ead01c40e1
Revert 127813 while fixing broken test.
...
llvm-svn: 127814
2011-03-17 16:54:27 +00:00
8e08a786bf
Add type output to llvm-dis. Patch by Yuri!
...
llvm-svn: 127813
2011-03-17 16:30:14 +00:00
f1d62cfc8f
MC/Mach-O: Fix regression introduced in r126127, this assignment shouldn't have
...
been removed.
llvm-svn: 127812
2011-03-17 16:25:24 +00:00
2ef0c69df1
Move more logic into getTypeForExtArgOrReturn.
...
llvm-svn: 127809
2011-03-17 14:53:37 +00:00
341c36dc8b
Change the signext language in LangRef to closer match zeroext.
...
llvm-svn: 127808
2011-03-17 14:21:58 +00:00
34e7b3f77e
Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn().
...
llvm-svn: 127807
2011-03-17 14:21:56 +00:00
b4d763b37d
Add comments for the demanglings. Correct mangled form of operator delete!
...
llvm-svn: 127801
2011-03-17 05:20:12 +00:00
bf9ff6f63b
test/CodeGen/X86/h-registers-1.ll: Add explicit -mtriple=x86_64-linux. It does not need to be checked on x86_64-win32 (aka Win64).
...
llvm-svn: 127800
2011-03-17 04:24:40 +00:00
881e1871dd
Add "swi" which is an obsolete mnemonic for "svc".
...
llvm-svn: 127788
2011-03-17 01:46:14 +00:00
e8f2be0c10
A couple new README entries.
...
llvm-svn: 127786
2011-03-17 01:22:09 +00:00
b39c7c7b17
Add support in the LTO library for loading an object from the middle
...
of an file.
llvm-svn: 127781
2011-03-17 00:36:11 +00:00
07de07eeea
Fix handling of @IDNTPOFF relocations, they need to get STT_TLS.
...
While here, add VK_ARM_TPOFF and VK_ARM_GOTTPOFF, too.
llvm-svn: 127780
2011-03-17 00:35:10 +00:00
315b42c354
Rewrite instructions as part of ConnectedVNInfoEqClasses::Distribute.
...
llvm-svn: 127779
2011-03-17 00:23:45 +00:00
5b6198dfb9
test/CodeGen/X86/constant-pool-remat-0.ll: FileCheck-ize and add explicit -mtriple=x86_64-linux.
...
llvm-svn: 127775
2011-03-16 23:01:31 +00:00
e14b2b226f
Add a LiveRangeEdit delegate callback before shrinking a live range.
...
The register allocator needs to adjust its live interval unions when that happens.
llvm-svn: 127774
2011-03-16 22:56:16 +00:00
c738c96519
Erase virtual registers that are unused after DCE.
...
llvm-svn: 127773
2011-03-16 22:56:13 +00:00
e29d63e98a
Tag cached interference with a user-provided tag instead of the virtual register number.
...
The live range of a virtual register may change which invalidates the cached
interference information.
llvm-svn: 127772
2011-03-16 22:56:11 +00:00
557a82c099
Clarify debugging output.
...
llvm-svn: 127771
2011-03-16 22:56:08 +00:00
ac106273d4
The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte
...
rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.
This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.
llvm-svn: 127766
2011-03-16 22:20:18 +00:00
40a9200357
Rename a test to be more inclusive.
...
llvm-svn: 127765
2011-03-16 22:20:12 +00:00
d1ad9bc277
Don't recompute something that we already have in a local variable.
...
llvm-svn: 127764
2011-03-16 22:20:07 +00:00
fd95b016fb
Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fix
...
plus the test where it used to break.", which broke Clang self-host of a
Debug+Asserts compiler, on OS X.
llvm-svn: 127763
2011-03-16 22:16:39 +00:00
c871eff3f5
Add XCore intrinsics for setclk, setrdy.
...
llvm-svn: 127761
2011-03-16 21:56:00 +00:00
a3aeafeb35
Patch to a fix dwarf relocation problem on ARM. One-line fix plus the test where it used to break.
...
llvm-svn: 127757
2011-03-16 21:05:52 +00:00
49e354bcb6
Add a test for i1 zeroext arguments on x86-64. We currently generate code that
...
conforms to the ABI, but DAGCombine could in theory recognize the sequence of
zext asserts and truncates and generate incorrect code.
llvm-svn: 127754
2011-03-16 20:15:44 +00:00
d4346f2388
Add checkevent intrinsic to check if any resources owned by the current thread
...
can event.
llvm-svn: 127741
2011-03-16 18:34:00 +00:00
d60e4101e6
test/CodeGen/X86: FileCheck-ize and add actions for x86_64-linux and x86_64-win32.
...
llvm-svn: 127734
2011-03-16 13:53:07 +00:00
0b9e2b0257
test/CodeGen/X86: Add a pattern for Win64.
...
llvm-svn: 127733
2011-03-16 13:52:51 +00:00
c10801e8a5
test/CodeGen/X86: FileCheck-ize and add explicit -mtriple=x86_64-linux. They are useless to Win64 target.
...
llvm-svn: 127732
2011-03-16 13:52:38 +00:00
662892df27
test/CodeGen/X86/byval*.ll: Win64 has not supported byval yet.
...
llvm-svn: 127731
2011-03-16 13:52:20 +00:00
406f02c9ea
test/CodeGen/X86/dyn-stackalloc.ll: FileCheck-ize.
...
llvm-svn: 127730
2011-03-16 13:52:08 +00:00
7599b106b7
Fix a comment.
...
llvm-svn: 127728
2011-03-16 08:13:42 +00:00
76e68ea916
lib/Support/raw_ostream.cpp: On mingw, report_fatal_error() should not be called at dtor context.
...
report_fatal_error() invokes exit(). We know report_fatal_error() might not write messages to stderr when any errors were detected on FD == 2.
llvm-svn: 127726
2011-03-16 02:53:39 +00:00
a3d4749e24
Windows/PathV2.inc: [PR8520] Recognize "NUL" as special (character) file.
...
FIXME: It is a temporal hack. We should detect as many "special file name" as possible.
llvm-svn: 127724
2011-03-16 02:53:32 +00:00
aaa9b4f824
Windows/Path.inc: [PR6270] PathV1::makeUnique(): Give arbitrary initial seed for workaround.
...
FIXME: We should use sys::fs::unique_file() in future.
llvm-svn: 127723
2011-03-16 02:53:24 +00:00
c91fa6d19f
Tidy up. Whitespace and 80 column.
...
llvm-svn: 127721
2011-03-16 01:21:55 +00:00
39c041cae7
Do not accidently initialize NumDbgValueLost and NumDbgLineLost counts.
...
llvm-svn: 127720
2011-03-16 00:27:57 +00:00
0454253d7a
Only convert allocas to scalars if it is profitable. The profitability metric I
...
chose is having a non-memcpy/memset use and being larger than any native integer
type. Originally I chose having an access of a size smaller than the total size
of the alloca, but this caused some minor issues on the spirit benchmark where
SRoA runs again after some inlining.
This fixes <rdar://problem/8613163>.
llvm-svn: 127718
2011-03-16 00:13:44 +00:00
7b0f3c6a1a
Add native integer type TargetData to some existing tests.
...
llvm-svn: 127717
2011-03-16 00:13:40 +00:00
b51c830f7c
Better use initializer lists.
...
llvm-svn: 127716
2011-03-16 00:13:37 +00:00
63062ccf85
Add a clarifying comment.
...
llvm-svn: 127715
2011-03-16 00:13:35 +00:00
51e76763c7
Add TargetData::fitsInLegalInteger().
...
llvm-svn: 127714
2011-03-16 00:13:28 +00:00
a4c3154fca
There were two issues fixed:
...
1. The ARM Darwin *r9 call instructions were pseudo-ized recently.
Modify the ARMDisassemblerCore.cpp file to accomodate the change.
2. The disassembler was unnecessarily adding 8 to the sign-extended imm24:
imm32 = SignExtend(imm24:'00', 32); // A8.6.23 BL, BLX (immediate)
// Encoding A1
It has no business doing such. Removed the offending logic.
Add test cases to arm-tests.txt.
llvm-svn: 127707
2011-03-15 22:27:33 +00:00
d0332e4efe
Add scei vendor
...
llvm-svn: 127705
2011-03-15 21:51:56 +00:00
865f8b592a
The VTBL (and VTBX) instructions are rather permissive concerning the masks they
...
accept. If a value in the mask is out of range, it uses the value 0, for VTBL,
or leaves the value unchanged, for VTBX.
llvm-svn: 127700
2011-03-15 21:15:20 +00:00
a0d5ec10d1
Trace back through sibling copies to hoist spills and find rematerializable defs.
...
After live range splitting, an original value may be available in multiple
registers. Tracing back through the registers containing the same value, find
the best place to insert a spill, determine if the value has already been
spilled, or discover a reaching def that may be rematerialized.
This is only the analysis part. The information is not used for anything yet.
llvm-svn: 127698
2011-03-15 21:13:25 +00:00
32210de3e4
Preserve both isPHIDef and isDefByCopy bits when copying parent values.
...
llvm-svn: 127697
2011-03-15 21:13:22 +00:00
920139ca08
lit/ProgressBar.py: [PR7919] Improve line wrap for XN-incapable terminals.
...
On Win32 console, emitting char to col#79 causes linefeed, and the cursor will not return to col#79 upper line with backspace.
llvm-svn: 127696
2011-03-15 21:07:44 +00:00
ebecb33307
Some minor cleanups based on feedback.
...
llvm-svn: 127694
2011-03-15 20:47:26 +00:00
4ae30b6785
Trailing whitespae.
...
llvm-svn: 127691
2011-03-15 20:25:54 +00:00
dbb27393cc
Clean up something noticed by Fritz.
...
llvm-svn: 127684
2011-03-15 18:42:33 +00:00
42401d6af2
Do not form thumb2 ldrd / strd if the offset is by multiple of 4. rdar://9133587
...
llvm-svn: 127683
2011-03-15 18:41:52 +00:00
024932fc77
Don't indent cases in a switch, no functionality change.
...
llvm-svn: 127681
2011-03-15 15:55:30 +00:00
5f1a26ea39
On the XCore the scavenging slot should be closest to the SP.
...
llvm-svn: 127680
2011-03-15 15:10:11 +00:00
638b8b783f
is_llvm_target_library: recognize libraries without the LLVM prefix.
...
Without this cmake fails at configuration when some target pass
"native" on LLVM_LINK_COMPONENTS and that is expanded to "X86".
llvm-svn: 127679
2011-03-15 14:53:53 +00:00
3a68eb150b
Add XCore intrinsics for getps, setps, setsr and clrsr.
...
llvm-svn: 127678
2011-03-15 13:45:47 +00:00
94751fbf32
PTX: Set PTX 2.0 as the minimum supported version
...
- Remove PTX 1.4 code generation
- Change type of intrinsics to .v4.i32 instead of .v4.i16
- Add and/or/xor integer instructions
llvm-svn: 127677
2011-03-15 13:24:15 +00:00
Owen Anderson